2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
35 compatible = "arm,cortex-a8";
42 compatible = "arm,cortex-a8-pmu";
43 reg = <0x54000000 0x800000>;
45 ti,hwmods = "debugss";
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
53 compatible = "ti,omap-infra";
55 compatible = "ti,omap3-mpu";
60 compatible = "ti,iva2.2";
64 compatible = "ti,omap3-c64";
70 * XXX: Use a flat representation of the OMAP3 interconnect.
71 * The real OMAP interconnect network is quite complex.
72 * Since that will not bring real advantage to represent that in DT for
73 * the moment, just use a fake OCP bus entry to represent the whole bus
77 compatible = "simple-bus";
78 reg = <0x68000000 0x10000>;
83 ti,hwmods = "l3_main";
86 compatible = "ti,omap3-aes";
88 reg = <0x480c5000 0x50>;
92 counter32k: counter@48320000 {
93 compatible = "ti,omap-counter32k";
94 reg = <0x48320000 0x20>;
95 ti,hwmods = "counter_32k";
98 intc: interrupt-controller@48200000 {
99 compatible = "ti,omap2-intc";
100 interrupt-controller;
101 #interrupt-cells = <1>;
103 reg = <0x48200000 0x1000>;
106 sdma: dma-controller@48056000 {
107 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
108 reg = <0x48056000 0x1000>;
114 #dma-channels = <32>;
115 #dma-requests = <96>;
118 omap3_pmx_core: pinmux@48002030 {
119 compatible = "ti,omap3-padconf", "pinctrl-single";
120 reg = <0x48002030 0x0238>;
121 #address-cells = <1>;
123 #interrupt-cells = <1>;
124 interrupt-controller;
125 pinctrl-single,register-width = <16>;
126 pinctrl-single,function-mask = <0xff1f>;
129 omap3_pmx_wkup: pinmux@48002a00 {
130 compatible = "ti,omap3-padconf", "pinctrl-single";
131 reg = <0x48002a00 0x5c>;
132 #address-cells = <1>;
134 #interrupt-cells = <1>;
135 interrupt-controller;
136 pinctrl-single,register-width = <16>;
137 pinctrl-single,function-mask = <0xff1f>;
140 gpio1: gpio@48310000 {
141 compatible = "ti,omap3-gpio";
142 reg = <0x48310000 0x200>;
148 interrupt-controller;
149 #interrupt-cells = <2>;
152 gpio2: gpio@49050000 {
153 compatible = "ti,omap3-gpio";
154 reg = <0x49050000 0x200>;
159 interrupt-controller;
160 #interrupt-cells = <2>;
163 gpio3: gpio@49052000 {
164 compatible = "ti,omap3-gpio";
165 reg = <0x49052000 0x200>;
170 interrupt-controller;
171 #interrupt-cells = <2>;
174 gpio4: gpio@49054000 {
175 compatible = "ti,omap3-gpio";
176 reg = <0x49054000 0x200>;
181 interrupt-controller;
182 #interrupt-cells = <2>;
185 gpio5: gpio@49056000 {
186 compatible = "ti,omap3-gpio";
187 reg = <0x49056000 0x200>;
192 interrupt-controller;
193 #interrupt-cells = <2>;
196 gpio6: gpio@49058000 {
197 compatible = "ti,omap3-gpio";
198 reg = <0x49058000 0x200>;
203 interrupt-controller;
204 #interrupt-cells = <2>;
207 uart1: serial@4806a000 {
208 compatible = "ti,omap3-uart";
209 reg = <0x4806a000 0x2000>;
211 dmas = <&sdma 49 &sdma 50>;
212 dma-names = "tx", "rx";
214 clock-frequency = <48000000>;
217 uart2: serial@4806c000 {
218 compatible = "ti,omap3-uart";
219 reg = <0x4806c000 0x400>;
221 dmas = <&sdma 51 &sdma 52>;
222 dma-names = "tx", "rx";
224 clock-frequency = <48000000>;
227 uart3: serial@49020000 {
228 compatible = "ti,omap3-uart";
229 reg = <0x49020000 0x400>;
231 dmas = <&sdma 53 &sdma 54>;
232 dma-names = "tx", "rx";
234 clock-frequency = <48000000>;
238 compatible = "ti,omap3-i2c";
239 reg = <0x48070000 0x80>;
241 dmas = <&sdma 27 &sdma 28>;
242 dma-names = "tx", "rx";
243 #address-cells = <1>;
249 compatible = "ti,omap3-i2c";
250 reg = <0x48072000 0x80>;
252 dmas = <&sdma 29 &sdma 30>;
253 dma-names = "tx", "rx";
254 #address-cells = <1>;
260 compatible = "ti,omap3-i2c";
261 reg = <0x48060000 0x80>;
263 dmas = <&sdma 25 &sdma 26>;
264 dma-names = "tx", "rx";
265 #address-cells = <1>;
270 mailbox: mailbox@48094000 {
271 compatible = "ti,omap3-mailbox";
272 ti,hwmods = "mailbox";
273 reg = <0x48094000 0x200>;
277 mcspi1: spi@48098000 {
278 compatible = "ti,omap2-mcspi";
279 reg = <0x48098000 0x100>;
281 #address-cells = <1>;
283 ti,hwmods = "mcspi1";
293 dma-names = "tx0", "rx0", "tx1", "rx1",
294 "tx2", "rx2", "tx3", "rx3";
297 mcspi2: spi@4809a000 {
298 compatible = "ti,omap2-mcspi";
299 reg = <0x4809a000 0x100>;
301 #address-cells = <1>;
303 ti,hwmods = "mcspi2";
309 dma-names = "tx0", "rx0", "tx1", "rx1";
312 mcspi3: spi@480b8000 {
313 compatible = "ti,omap2-mcspi";
314 reg = <0x480b8000 0x100>;
316 #address-cells = <1>;
318 ti,hwmods = "mcspi3";
324 dma-names = "tx0", "rx0", "tx1", "rx1";
327 mcspi4: spi@480ba000 {
328 compatible = "ti,omap2-mcspi";
329 reg = <0x480ba000 0x100>;
331 #address-cells = <1>;
333 ti,hwmods = "mcspi4";
335 dmas = <&sdma 70>, <&sdma 71>;
336 dma-names = "tx0", "rx0";
339 hdqw1w: 1w@480b2000 {
340 compatible = "ti,omap3-1w";
341 reg = <0x480b2000 0x1000>;
347 compatible = "ti,omap3-hsmmc";
348 reg = <0x4809c000 0x200>;
352 dmas = <&sdma 61>, <&sdma 62>;
353 dma-names = "tx", "rx";
357 compatible = "ti,omap3-hsmmc";
358 reg = <0x480b4000 0x200>;
361 dmas = <&sdma 47>, <&sdma 48>;
362 dma-names = "tx", "rx";
366 compatible = "ti,omap3-hsmmc";
367 reg = <0x480ad000 0x200>;
370 dmas = <&sdma 77>, <&sdma 78>;
371 dma-names = "tx", "rx";
374 mmu_isp: mmu@480bd400 {
375 compatible = "ti,omap3-mmu-isp";
376 ti,hwmods = "mmu_isp";
377 reg = <0x480bd400 0x80>;
382 compatible = "ti,omap3-wdt";
383 reg = <0x48314000 0x80>;
384 ti,hwmods = "wd_timer2";
387 mcbsp1: mcbsp@48074000 {
388 compatible = "ti,omap3-mcbsp";
389 reg = <0x48074000 0xff>;
391 interrupts = <16>, /* OCP compliant interrupt */
392 <59>, /* TX interrupt */
393 <60>; /* RX interrupt */
394 interrupt-names = "common", "tx", "rx";
395 ti,buffer-size = <128>;
396 ti,hwmods = "mcbsp1";
399 dma-names = "tx", "rx";
402 mcbsp2: mcbsp@49022000 {
403 compatible = "ti,omap3-mcbsp";
404 reg = <0x49022000 0xff>,
406 reg-names = "mpu", "sidetone";
407 interrupts = <17>, /* OCP compliant interrupt */
408 <62>, /* TX interrupt */
409 <63>, /* RX interrupt */
411 interrupt-names = "common", "tx", "rx", "sidetone";
412 ti,buffer-size = <1280>;
413 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
416 dma-names = "tx", "rx";
419 mcbsp3: mcbsp@49024000 {
420 compatible = "ti,omap3-mcbsp";
421 reg = <0x49024000 0xff>,
423 reg-names = "mpu", "sidetone";
424 interrupts = <22>, /* OCP compliant interrupt */
425 <89>, /* TX interrupt */
426 <90>, /* RX interrupt */
428 interrupt-names = "common", "tx", "rx", "sidetone";
429 ti,buffer-size = <128>;
430 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
433 dma-names = "tx", "rx";
436 mcbsp4: mcbsp@49026000 {
437 compatible = "ti,omap3-mcbsp";
438 reg = <0x49026000 0xff>;
440 interrupts = <23>, /* OCP compliant interrupt */
441 <54>, /* TX interrupt */
442 <55>; /* RX interrupt */
443 interrupt-names = "common", "tx", "rx";
444 ti,buffer-size = <128>;
445 ti,hwmods = "mcbsp4";
448 dma-names = "tx", "rx";
451 mcbsp5: mcbsp@48096000 {
452 compatible = "ti,omap3-mcbsp";
453 reg = <0x48096000 0xff>;
455 interrupts = <27>, /* OCP compliant interrupt */
456 <81>, /* TX interrupt */
457 <82>; /* RX interrupt */
458 interrupt-names = "common", "tx", "rx";
459 ti,buffer-size = <128>;
460 ti,hwmods = "mcbsp5";
463 dma-names = "tx", "rx";
466 sham: sham@480c3000 {
467 compatible = "ti,omap3-sham";
469 reg = <0x480c3000 0x64>;
473 smartreflex_core: smartreflex@480cb000 {
474 compatible = "ti,omap3-smartreflex-core";
475 ti,hwmods = "smartreflex_core";
476 reg = <0x480cb000 0x400>;
480 smartreflex_mpu_iva: smartreflex@480c9000 {
481 compatible = "ti,omap3-smartreflex-iva";
482 ti,hwmods = "smartreflex_mpu_iva";
483 reg = <0x480c9000 0x400>;
487 timer1: timer@48318000 {
488 compatible = "ti,omap3430-timer";
489 reg = <0x48318000 0x400>;
491 ti,hwmods = "timer1";
495 timer2: timer@49032000 {
496 compatible = "ti,omap3430-timer";
497 reg = <0x49032000 0x400>;
499 ti,hwmods = "timer2";
502 timer3: timer@49034000 {
503 compatible = "ti,omap3430-timer";
504 reg = <0x49034000 0x400>;
506 ti,hwmods = "timer3";
509 timer4: timer@49036000 {
510 compatible = "ti,omap3430-timer";
511 reg = <0x49036000 0x400>;
513 ti,hwmods = "timer4";
516 timer5: timer@49038000 {
517 compatible = "ti,omap3430-timer";
518 reg = <0x49038000 0x400>;
520 ti,hwmods = "timer5";
524 timer6: timer@4903a000 {
525 compatible = "ti,omap3430-timer";
526 reg = <0x4903a000 0x400>;
528 ti,hwmods = "timer6";
532 timer7: timer@4903c000 {
533 compatible = "ti,omap3430-timer";
534 reg = <0x4903c000 0x400>;
536 ti,hwmods = "timer7";
540 timer8: timer@4903e000 {
541 compatible = "ti,omap3430-timer";
542 reg = <0x4903e000 0x400>;
544 ti,hwmods = "timer8";
549 timer9: timer@49040000 {
550 compatible = "ti,omap3430-timer";
551 reg = <0x49040000 0x400>;
553 ti,hwmods = "timer9";
557 timer10: timer@48086000 {
558 compatible = "ti,omap3430-timer";
559 reg = <0x48086000 0x400>;
561 ti,hwmods = "timer10";
565 timer11: timer@48088000 {
566 compatible = "ti,omap3430-timer";
567 reg = <0x48088000 0x400>;
569 ti,hwmods = "timer11";
573 timer12: timer@48304000 {
574 compatible = "ti,omap3430-timer";
575 reg = <0x48304000 0x400>;
577 ti,hwmods = "timer12";
582 usbhstll: usbhstll@48062000 {
583 compatible = "ti,usbhs-tll";
584 reg = <0x48062000 0x1000>;
586 ti,hwmods = "usb_tll_hs";
589 usbhshost: usbhshost@48064000 {
590 compatible = "ti,usbhs-host";
591 reg = <0x48064000 0x400>;
592 ti,hwmods = "usb_host_hs";
593 #address-cells = <1>;
597 usbhsohci: ohci@48064400 {
598 compatible = "ti,ohci-omap3", "usb-ohci";
599 reg = <0x48064400 0x400>;
600 interrupt-parent = <&intc>;
604 usbhsehci: ehci@48064800 {
605 compatible = "ti,ehci-omap", "usb-ehci";
606 reg = <0x48064800 0x400>;
607 interrupt-parent = <&intc>;
612 gpmc: gpmc@6e000000 {
613 compatible = "ti,omap3430-gpmc";
615 reg = <0x6e000000 0x02d0>;
618 gpmc,num-waitpins = <4>;
619 #address-cells = <2>;
623 usb_otg_hs: usb_otg_hs@480ab000 {
624 compatible = "ti,omap3-musb";
625 reg = <0x480ab000 0x1000>;
626 interrupts = <92>, <93>;
627 interrupt-names = "mc", "dma";
628 ti,hwmods = "usb_otg_hs";