arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   6
   7 / {
   8         compatible = "marvell,kirkwood";
   9         interrupt-parent = <&intc>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "marvell,feroceon";
  18                         reg = <0>;
  19                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  20                         clock-names = "cpu_clk", "ddrclk", "powersave";
  21                 };
  22         };
  23
  24         aliases {
  25                gpio0 = &gpio0;
  26                gpio1 = &gpio1;
  27         };
  28
  29         mbus {
  30                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  31                 #address-cells = <2>;
  32                 #size-cells = <1>;
  33                 /* If a board file needs to change this ranges it must replace it completely */
  34                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000     /* internal-regs */
  35                           MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000      /* nand flash */
  36                           MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000      /* crypto sram */
  37                           >;
  38                 controller = <&mbusc>;
  39                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  40                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  41
  42                 crypto@0301 {
  43                         compatible = "marvell,orion-crypto";
  44                         reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
  45                               <MBUS_ID(0x03, 0x01) 0 0x800>;
  46                         reg-names = "regs", "sram";
  47                         interrupts = <22>;
  48                         clocks = <&gate_clk 17>;
  49                         status = "okay";
  50                 };
  51
  52                 nand: nand@012f {
  53                         #address-cells = <1>;
  54                         #size-cells = <1>;
  55                         cle = <0>;
  56                         ale = <1>;
  57                         bank-width = <1>;
  58                         compatible = "marvell,orion-nand";
  59                         reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
  60                         chip-delay = <25>;
  61                         /* set partition map and/or chip-delay in board dts */
  62                         clocks = <&gate_clk 7>;
  63                         status = "disabled";
  64                 };
  65         };
  66
  67         ocp@f1000000 {
  68                 compatible = "simple-bus";
  69                 ranges = <0x00000000 0xf1000000 0x0100000>;
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72
  73                 core_clk: core-clocks@10030 {
  74                         compatible = "marvell,kirkwood-core-clock";
  75                         reg = <0x10030 0x4>;
  76                         #clock-cells = <1>;
  77                 };
  78
  79                 spi@10600 {
  80                         compatible = "marvell,orion-spi";
  81                         #address-cells = <1>;
  82                         #size-cells = <0>;
  83                         cell-index = <0>;
  84                         interrupts = <23>;
  85                         reg = <0x10600 0x28>;
  86                         clocks = <&gate_clk 7>;
  87                         status = "disabled";
  88                 };
  89
  90                 gpio0: gpio@10100 {
  91                         compatible = "marvell,orion-gpio";
  92                         #gpio-cells = <2>;
  93                         gpio-controller;
  94                         reg = <0x10100 0x40>;
  95                         ngpios = <32>;
  96                         interrupt-controller;
  97                         #interrupt-cells = <2>;
  98                         interrupts = <35>, <36>, <37>, <38>;
  99                         clocks = <&gate_clk 7>;
 100                 };
 101
 102                 gpio1: gpio@10140 {
 103                         compatible = "marvell,orion-gpio";
 104                         #gpio-cells = <2>;
 105                         gpio-controller;
 106                         reg = <0x10140 0x40>;
 107                         ngpios = <18>;
 108                         interrupt-controller;
 109                         #interrupt-cells = <2>;
 110                         interrupts = <39>, <40>, <41>;
 111                         clocks = <&gate_clk 7>;
 112                 };
 113
 114                 i2c@11000 {
 115                         compatible = "marvell,mv64xxx-i2c";
 116                         reg = <0x11000 0x20>;
 117                         #address-cells = <1>;
 118                         #size-cells = <0>;
 119                         interrupts = <29>;
 120                         clock-frequency = <100000>;
 121                         clocks = <&gate_clk 7>;
 122                         status = "disabled";
 123                 };
 124
 125                 serial@12000 {
 126                         compatible = "ns16550a";
 127                         reg = <0x12000 0x100>;
 128                         reg-shift = <2>;
 129                         interrupts = <33>;
 130                         clocks = <&gate_clk 7>;
 131                         status = "disabled";
 132                 };
 133
 134                 serial@12100 {
 135                         compatible = "ns16550a";
 136                         reg = <0x12100 0x100>;
 137                         reg-shift = <2>;
 138                         interrupts = <34>;
 139                         clocks = <&gate_clk 7>;
 140                         status = "disabled";
 141                 };
 142
 143                 mbusc: mbus-controller@20000 {
 144                         compatible = "marvell,mbus-controller";
 145                         reg = <0x20000 0x80>, <0x1500 0x20>;
 146                 };
 147
 148                 system-controller@20000 {
 149                         compatible = "marvell,orion-system-controller";
 150                         reg = <0x20000 0x120>;
 151                 };
 152
 153                 bridge_intc: bridge-interrupt-ctrl@20110 {
 154                         compatible = "marvell,orion-bridge-intc";
 155                         interrupt-controller;
 156                         #interrupt-cells = <1>;
 157                         reg = <0x20110 0x8>;
 158                         interrupts = <1>;
 159                         marvell,#interrupts = <6>;
 160                 };
 161
 162                 gate_clk: clock-gating-control@2011c {
 163                         compatible = "marvell,kirkwood-gating-clock";
 164                         reg = <0x2011c 0x4>;
 165                         clocks = <&core_clk 0>;
 166                         #clock-cells = <1>;
 167                 };
 168
 169                 l2: l2-cache@20128 {
 170                         compatible = "marvell,kirkwood-cache";
 171                         reg = <0x20128 0x4>;
 172                 };
 173
 174                 intc: main-interrupt-ctrl@20200 {
 175                         compatible = "marvell,orion-intc";
 176                         interrupt-controller;
 177                         #interrupt-cells = <1>;
 178                         reg = <0x20200 0x10>, <0x20210 0x10>;
 179                 };
 180
 181                 timer: timer@20300 {
 182                         compatible = "marvell,orion-timer";
 183                         reg = <0x20300 0x20>;
 184                         interrupt-parent = <&bridge_intc>;
 185                         interrupts = <1>, <2>;
 186                         clocks = <&core_clk 0>;
 187                 };
 188
 189                 wdt: watchdog-timer@20300 {
 190                         compatible = "marvell,orion-wdt";
 191                         reg = <0x20300 0x28>, <0x20108 0x4>;
 192                         interrupt-parent = <&bridge_intc>;
 193                         interrupts = <3>;
 194                         clocks = <&gate_clk 7>;
 195                         status = "okay";
 196                 };
 197
 198                 ehci@50000 {
 199                         compatible = "marvell,orion-ehci";
 200                         reg = <0x50000 0x1000>;
 201                         interrupts = <19>;
 202                         clocks = <&gate_clk 3>;
 203                         status = "okay";
 204                 };
 205
 206                 xor@60800 {
 207                         compatible = "marvell,orion-xor";
 208                         reg = <0x60800 0x100
 209                                0x60A00 0x100>;
 210                         status = "okay";
 211                         clocks = <&gate_clk 8>;
 212
 213                         xor00 {
 214                               interrupts = <5>;
 215                               dmacap,memcpy;
 216                               dmacap,xor;
 217                         };
 218                         xor01 {
 219                               interrupts = <6>;
 220                               dmacap,memcpy;
 221                               dmacap,xor;
 222                               dmacap,memset;
 223                         };
 224                 };
 225
 226                 xor@60900 {
 227                         compatible = "marvell,orion-xor";
 228                         reg = <0x60900 0x100
 229                                0x60B00 0x100>;
 230                         status = "okay";
 231                         clocks = <&gate_clk 16>;
 232
 233                         xor00 {
 234                               interrupts = <7>;
 235                               dmacap,memcpy;
 236                               dmacap,xor;
 237                         };
 238                         xor01 {
 239                               interrupts = <8>;
 240                               dmacap,memcpy;
 241                               dmacap,xor;
 242                               dmacap,memset;
 243                         };
 244                 };
 245
 246                 eth0: ethernet-controller@72000 {
 247                         compatible = "marvell,kirkwood-eth";
 248                         #address-cells = <1>;
 249                         #size-cells = <0>;
 250                         reg = <0x72000 0x4000>;
 251                         clocks = <&gate_clk 0>;
 252                         marvell,tx-checksum-limit = <1600>;
 253                         status = "disabled";
 254
 255                         ethernet0-port@0 {
 256                                 compatible = "marvell,kirkwood-eth-port";
 257                                 reg = <0>;
 258                                 interrupts = <11>;
 259                                 /* overwrite MAC address in bootloader */
 260                                 local-mac-address = [00 00 00 00 00 00];
 261                                 /* set phy-handle property in board file */
 262                         };
 263                 };
 264
 265                 mdio: mdio-bus@72004 {
 266                         compatible = "marvell,orion-mdio";
 267                         #address-cells = <1>;
 268                         #size-cells = <0>;
 269                         reg = <0x72004 0x84>;
 270                         interrupts = <46>;
 271                         clocks = <&gate_clk 0>;
 272                         status = "disabled";
 273
 274                         /* add phy nodes in board file */
 275                 };
 276
 277                 eth1: ethernet-controller@76000 {
 278                         compatible = "marvell,kirkwood-eth";
 279                         #address-cells = <1>;
 280                         #size-cells = <0>;
 281                         reg = <0x76000 0x4000>;
 282                         clocks = <&gate_clk 19>;
 283                         marvell,tx-checksum-limit = <1600>;
 284                         status = "disabled";
 285
 286                         ethernet1-port@0 {
 287                                 compatible = "marvell,kirkwood-eth-port";
 288                                 reg = <0>;
 289                                 interrupts = <15>;
 290                                 /* overwrite MAC address in bootloader */
 291                                 local-mac-address = [00 00 00 00 00 00];
 292                                 /* set phy-handle property in board file */
 293                         };
 294                 };
 295
 296                 sata_phy0: sata-phy@82000 {
 297                         compatible = "marvell,mvebu-sata-phy";
 298                         reg = <0x82000 0x0334>;
 299                         clocks = <&gate_clk 14>;
 300                         clock-names = "sata";
 301                         #phy-cells = <0>;
 302                         status = "ok";
 303                 };
 304
 305                 sata_phy1: sata-phy@84000 {
 306                         compatible = "marvell,mvebu-sata-phy";
 307                         reg = <0x84000 0x0334>;
 308                         clocks = <&gate_clk 15>;
 309                         clock-names = "sata";
 310                         #phy-cells = <0>;
 311                         status = "ok";
 312                 };
 313
 314                 audio0: audio-controller@a0000 {
 315                         compatible = "marvell,kirkwood-audio";
 316                         reg = <0xa0000 0x2210>;
 317                         interrupts = <24>;
 318                         clocks = <&gate_clk 9>;
 319                         clock-names = "internal";
 320                         status = "disabled";
 321                 };
 322         };
 323 };