arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   6
   7 / {
   8         compatible = "marvell,kirkwood";
   9         interrupt-parent = <&intc>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "marvell,feroceon";
  18                         reg = <0>;
  19                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  20                         clock-names = "cpu_clk", "ddrclk", "powersave";
  21                 };
  22         };
  23
  24         aliases {
  25                gpio0 = &gpio0;
  26                gpio1 = &gpio1;
  27                i2c0 = &i2c0;
  28         };
  29
  30         mbus {
  31                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  32                 #address-cells = <2>;
  33                 #size-cells = <1>;
  34                 /* If a board file needs to change this ranges it must replace it completely */
  35                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000     /* internal-regs */
  36                           MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000      /* nand flash */
  37                           MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000      /* crypto sram */
  38                           >;
  39                 controller = <&mbusc>;
  40                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  41                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  42
  43                 cesa: crypto@0301 {
  44                         compatible = "marvell,orion-crypto";
  45                         reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
  46                               <MBUS_ID(0x03, 0x01) 0 0x800>;
  47                         reg-names = "regs", "sram";
  48                         interrupts = <22>;
  49                         clocks = <&gate_clk 17>;
  50                         status = "okay";
  51                 };
  52
  53                 nand: nand@012f {
  54                         #address-cells = <1>;
  55                         #size-cells = <1>;
  56                         cle = <0>;
  57                         ale = <1>;
  58                         bank-width = <1>;
  59                         compatible = "marvell,orion-nand";
  60                         reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
  61                         chip-delay = <25>;
  62                         /* set partition map and/or chip-delay in board dts */
  63                         clocks = <&gate_clk 7>;
  64                         status = "disabled";
  65                 };
  66         };
  67
  68         ocp@f1000000 {
  69                 compatible = "simple-bus";
  70                 ranges = <0x00000000 0xf1000000 0x0100000>;
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73
  74                 pinctrl: pin-controller@10000 {
  75                         /* set compatible property in SoC file */
  76                         reg = <0x10000 0x20>;
  77
  78                         pmx_ge1: pmx-ge1 {
  79                                 marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
  80                                                "mpp24", "mpp25", "mpp26", "mpp27",
  81                                                "mpp30", "mpp31", "mpp32", "mpp33";
  82                                 marvell,function = "ge1";
  83                         };
  84
  85                         pmx_nand: pmx-nand {
  86                                 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
  87                                                "mpp4", "mpp5", "mpp18", "mpp19";
  88                                 marvell,function = "nand";
  89                         };
  90
  91                         /*
  92                          * Default SPI0 pinctrl setting with CSn on mpp0,
  93                          * overwrite marvell,pins on board level if required.
  94                          */
  95                         pmx_spi: pmx-spi {
  96                                 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
  97                                 marvell,function = "spi";
  98                         };
  99
 100                         pmx_twsi0: pmx-twsi0 {
 101                                 marvell,pins = "mpp8", "mpp9";
 102                                 marvell,function = "twsi0";
 103                         };
 104
 105                         /*
 106                          * Default UART pinctrl setting without RTS/CTS,
 107                          * overwrite marvell,pins on board level if required.
 108                          */
 109                         pmx_uart0: pmx-uart0 {
 110                                 marvell,pins = "mpp10", "mpp11";
 111                                 marvell,function = "uart0";
 112                         };
 113
 114                         pmx_uart1: pmx-uart1 {
 115                                 marvell,pins = "mpp13", "mpp14";
 116                                 marvell,function = "uart1";
 117                         };
 118                 };
 119
 120                 core_clk: core-clocks@10030 {
 121                         compatible = "marvell,kirkwood-core-clock";
 122                         reg = <0x10030 0x4>;
 123                         #clock-cells = <1>;
 124                 };
 125
 126                 spi0: spi@10600 {
 127                         compatible = "marvell,orion-spi";
 128                         #address-cells = <1>;
 129                         #size-cells = <0>;
 130                         cell-index = <0>;
 131                         interrupts = <23>;
 132                         reg = <0x10600 0x28>;
 133                         clocks = <&gate_clk 7>;
 134                         pinctrl-0 = <&pmx_spi>;
 135                         pinctrl-names = "default";
 136                         status = "disabled";
 137                 };
 138
 139                 gpio0: gpio@10100 {
 140                         compatible = "marvell,orion-gpio";
 141                         #gpio-cells = <2>;
 142                         gpio-controller;
 143                         reg = <0x10100 0x40>;
 144                         ngpios = <32>;
 145                         interrupt-controller;
 146                         #interrupt-cells = <2>;
 147                         interrupts = <35>, <36>, <37>, <38>;
 148                         clocks = <&gate_clk 7>;
 149                 };
 150
 151                 gpio1: gpio@10140 {
 152                         compatible = "marvell,orion-gpio";
 153                         #gpio-cells = <2>;
 154                         gpio-controller;
 155                         reg = <0x10140 0x40>;
 156                         ngpios = <18>;
 157                         interrupt-controller;
 158                         #interrupt-cells = <2>;
 159                         interrupts = <39>, <40>, <41>;
 160                         clocks = <&gate_clk 7>;
 161                 };
 162
 163                 i2c0: i2c@11000 {
 164                         compatible = "marvell,mv64xxx-i2c";
 165                         reg = <0x11000 0x20>;
 166                         #address-cells = <1>;
 167                         #size-cells = <0>;
 168                         interrupts = <29>;
 169                         clock-frequency = <100000>;
 170                         clocks = <&gate_clk 7>;
 171                         status = "disabled";
 172                 };
 173
 174                 uart0: serial@12000 {
 175                         compatible = "ns16550a";
 176                         reg = <0x12000 0x100>;
 177                         reg-shift = <2>;
 178                         interrupts = <33>;
 179                         clocks = <&gate_clk 7>;
 180                         pinctrl-0 = <&pmx_uart0>;
 181                         pinctrl-names = "default";
 182                         status = "disabled";
 183                 };
 184
 185                 uart1: serial@12100 {
 186                         compatible = "ns16550a";
 187                         reg = <0x12100 0x100>;
 188                         reg-shift = <2>;
 189                         interrupts = <34>;
 190                         clocks = <&gate_clk 7>;
 191                         pinctrl-0 = <&pmx_uart1>;
 192                         pinctrl-names = "default";
 193                         status = "disabled";
 194                 };
 195
 196                 mbusc: mbus-controller@20000 {
 197                         compatible = "marvell,mbus-controller";
 198                         reg = <0x20000 0x80>, <0x1500 0x20>;
 199                 };
 200
 201                 sysc: system-controller@20000 {
 202                         compatible = "marvell,orion-system-controller";
 203                         reg = <0x20000 0x120>;
 204                 };
 205
 206                 bridge_intc: bridge-interrupt-ctrl@20110 {
 207                         compatible = "marvell,orion-bridge-intc";
 208                         interrupt-controller;
 209                         #interrupt-cells = <1>;
 210                         reg = <0x20110 0x8>;
 211                         interrupts = <1>;
 212                         marvell,#interrupts = <6>;
 213                 };
 214
 215                 gate_clk: clock-gating-control@2011c {
 216                         compatible = "marvell,kirkwood-gating-clock";
 217                         reg = <0x2011c 0x4>;
 218                         clocks = <&core_clk 0>;
 219                         #clock-cells = <1>;
 220                 };
 221
 222                 l2: l2-cache@20128 {
 223                         compatible = "marvell,kirkwood-cache";
 224                         reg = <0x20128 0x4>;
 225                 };
 226
 227                 intc: main-interrupt-ctrl@20200 {
 228                         compatible = "marvell,orion-intc";
 229                         interrupt-controller;
 230                         #interrupt-cells = <1>;
 231                         reg = <0x20200 0x10>, <0x20210 0x10>;
 232                 };
 233
 234                 timer: timer@20300 {
 235                         compatible = "marvell,orion-timer";
 236                         reg = <0x20300 0x20>;
 237                         interrupt-parent = <&bridge_intc>;
 238                         interrupts = <1>, <2>;
 239                         clocks = <&core_clk 0>;
 240                 };
 241
 242                 wdt: watchdog-timer@20300 {
 243                         compatible = "marvell,orion-wdt";
 244                         reg = <0x20300 0x28>, <0x20108 0x4>;
 245                         interrupt-parent = <&bridge_intc>;
 246                         interrupts = <3>;
 247                         clocks = <&gate_clk 7>;
 248                         status = "okay";
 249                 };
 250
 251                 usb0: ehci@50000 {
 252                         compatible = "marvell,orion-ehci";
 253                         reg = <0x50000 0x1000>;
 254                         interrupts = <19>;
 255                         clocks = <&gate_clk 3>;
 256                         status = "okay";
 257                 };
 258
 259                 dma0: xor@60800 {
 260                         compatible = "marvell,orion-xor";
 261                         reg = <0x60800 0x100
 262                                0x60A00 0x100>;
 263                         status = "okay";
 264                         clocks = <&gate_clk 8>;
 265
 266                         xor00 {
 267                               interrupts = <5>;
 268                               dmacap,memcpy;
 269                               dmacap,xor;
 270                         };
 271                         xor01 {
 272                               interrupts = <6>;
 273                               dmacap,memcpy;
 274                               dmacap,xor;
 275                               dmacap,memset;
 276                         };
 277                 };
 278
 279                 dma1: xor@60900 {
 280                         compatible = "marvell,orion-xor";
 281                         reg = <0x60900 0x100
 282                                0x60B00 0x100>;
 283                         status = "okay";
 284                         clocks = <&gate_clk 16>;
 285
 286                         xor00 {
 287                               interrupts = <7>;
 288                               dmacap,memcpy;
 289                               dmacap,xor;
 290                         };
 291                         xor01 {
 292                               interrupts = <8>;
 293                               dmacap,memcpy;
 294                               dmacap,xor;
 295                               dmacap,memset;
 296                         };
 297                 };
 298
 299                 eth0: ethernet-controller@72000 {
 300                         compatible = "marvell,kirkwood-eth";
 301                         #address-cells = <1>;
 302                         #size-cells = <0>;
 303                         reg = <0x72000 0x4000>;
 304                         clocks = <&gate_clk 0>;
 305                         marvell,tx-checksum-limit = <1600>;
 306                         status = "disabled";
 307
 308                         ethernet0-port@0 {
 309                                 compatible = "marvell,kirkwood-eth-port";
 310                                 reg = <0>;
 311                                 interrupts = <11>;
 312                                 /* overwrite MAC address in bootloader */
 313                                 local-mac-address = [00 00 00 00 00 00];
 314                                 /* set phy-handle property in board file */
 315                         };
 316                 };
 317
 318                 mdio: mdio-bus@72004 {
 319                         compatible = "marvell,orion-mdio";
 320                         #address-cells = <1>;
 321                         #size-cells = <0>;
 322                         reg = <0x72004 0x84>;
 323                         interrupts = <46>;
 324                         clocks = <&gate_clk 0>;
 325                         status = "disabled";
 326
 327                         /* add phy nodes in board file */
 328                 };
 329
 330                 eth1: ethernet-controller@76000 {
 331                         compatible = "marvell,kirkwood-eth";
 332                         #address-cells = <1>;
 333                         #size-cells = <0>;
 334                         reg = <0x76000 0x4000>;
 335                         clocks = <&gate_clk 19>;
 336                         marvell,tx-checksum-limit = <1600>;
 337                         pinctrl-0 = <&pmx_ge1>;
 338                         pinctrl-names = "default";
 339                         status = "disabled";
 340
 341                         ethernet1-port@0 {
 342                                 compatible = "marvell,kirkwood-eth-port";
 343                                 reg = <0>;
 344                                 interrupts = <15>;
 345                                 /* overwrite MAC address in bootloader */
 346                                 local-mac-address = [00 00 00 00 00 00];
 347                                 /* set phy-handle property in board file */
 348                         };
 349                 };
 350
 351                 sata_phy0: sata-phy@82000 {
 352                         compatible = "marvell,mvebu-sata-phy";
 353                         reg = <0x82000 0x0334>;
 354                         clocks = <&gate_clk 14>;
 355                         clock-names = "sata";
 356                         #phy-cells = <0>;
 357                         status = "ok";
 358                 };
 359
 360                 sata_phy1: sata-phy@84000 {
 361                         compatible = "marvell,mvebu-sata-phy";
 362                         reg = <0x84000 0x0334>;
 363                         clocks = <&gate_clk 15>;
 364                         clock-names = "sata";
 365                         #phy-cells = <0>;
 366                         status = "ok";
 367                 };
 368
 369                 audio0: audio-controller@a0000 {
 370                         compatible = "marvell,kirkwood-audio";
 371                         reg = <0xa0000 0x2210>;
 372                         interrupts = <24>;
 373                         clocks = <&gate_clk 9>;
 374                         clock-names = "internal";
 375                         status = "disabled";
 376                 };
 377         };
 378 };