arch/arm/boot/dts/imx6q-udoo.dts

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 /dts-v1/;
  13 #include "imx6q.dtsi"
  14
  15 / {
  16         model = "Udoo i.MX6 Quad Board";
  17         compatible = "udoo,imx6q-udoo", "fsl,imx6q";
  18
  19         chosen {
  20                 stdout-path = &uart2;
  21         };
  22
  23         memory {
  24                 reg = <0x10000000 0x40000000>;
  25         };
  26 };
  27
  28 &fec {
  29         pinctrl-names = "default";
  30         pinctrl-0 = <&pinctrl_enet>;
  31         phy-mode = "rgmii";
  32         status = "okay";
  33 };
  34
  35 &iomuxc {
  36         imx6q-udoo {
  37                 pinctrl_enet: enetgrp {
  38                         fsl,pins = <
  39                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
  40                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
  41                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
  42                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
  43                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
  44                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
  45                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
  46                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
  47                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
  48                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
  49                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
  50                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
  51                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
  52                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
  53                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
  54                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
  55                         >;
  56                 };
  57
  58                 pinctrl_uart2: uart2grp {
  59                         fsl,pins = <
  60                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
  61                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
  62                         >;
  63                 };
  64
  65                 pinctrl_usdhc3: usdhc3grp {
  66                         fsl,pins = <
  67                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
  68                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
  69                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
  70                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
  71                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
  72                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
  73                         >;
  74                 };
  75         };
  76 };
  77
  78 &sata {
  79         status = "okay";
  80 };
  81
  82 &uart2 {
  83         pinctrl-names = "default";
  84         pinctrl-0 = <&pinctrl_uart2>;
  85         status = "okay";
  86 };
  87
  88 &usdhc3 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&pinctrl_usdhc3>;
  91         non-removable;
  92         status = "okay";
  93 };