arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include "skeleton.dtsi"
  24
  25 / {
  26         interrupt-parent = <&gic>;
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 i2c0 = &i2c_0;
  33                 i2c1 = &i2c_1;
  34                 i2c2 = &i2c_2;
  35                 i2c3 = &i2c_3;
  36                 i2c4 = &i2c_4;
  37                 i2c5 = &i2c_5;
  38                 i2c6 = &i2c_6;
  39                 i2c7 = &i2c_7;
  40                 csis0 = &csis_0;
  41                 csis1 = &csis_1;
  42                 fimc0 = &fimc_0;
  43                 fimc1 = &fimc_1;
  44                 fimc2 = &fimc_2;
  45                 fimc3 = &fimc_3;
  46         };
  47
  48         chipid@10000000 {
  49                 compatible = "samsung,exynos4210-chipid";
  50                 reg = <0x10000000 0x100>;
  51         };
  52
  53         mipi_phy: video-phy@10020710 {
  54                 compatible = "samsung,s5pv210-mipi-video-phy";
  55                 reg = <0x10020710 8>;
  56                 #phy-cells = <1>;
  57         };
  58
  59         pd_mfc: mfc-power-domain@10023C40 {
  60                 compatible = "samsung,exynos4210-pd";
  61                 reg = <0x10023C40 0x20>;
  62         };
  63
  64         pd_g3d: g3d-power-domain@10023C60 {
  65                 compatible = "samsung,exynos4210-pd";
  66                 reg = <0x10023C60 0x20>;
  67         };
  68
  69         pd_lcd0: lcd0-power-domain@10023C80 {
  70                 compatible = "samsung,exynos4210-pd";
  71                 reg = <0x10023C80 0x20>;
  72         };
  73
  74         pd_tv: tv-power-domain@10023C20 {
  75                 compatible = "samsung,exynos4210-pd";
  76                 reg = <0x10023C20 0x20>;
  77         };
  78
  79         pd_cam: cam-power-domain@10023C00 {
  80                 compatible = "samsung,exynos4210-pd";
  81                 reg = <0x10023C00 0x20>;
  82         };
  83
  84         pd_gps: gps-power-domain@10023CE0 {
  85                 compatible = "samsung,exynos4210-pd";
  86                 reg = <0x10023CE0 0x20>;
  87         };
  88
  89         pd_gps_alive: gps-alive-power-domain@10023D00 {
  90                 compatible = "samsung,exynos4210-pd";
  91                 reg = <0x10023D00 0x20>;
  92         };
  93
  94         gic: interrupt-controller@10490000 {
  95                 compatible = "arm,cortex-a9-gic";
  96                 #interrupt-cells = <3>;
  97                 interrupt-controller;
  98                 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
  99         };
 100
 101         combiner: interrupt-controller@10440000 {
 102                 compatible = "samsung,exynos4210-combiner";
 103                 #interrupt-cells = <2>;
 104                 interrupt-controller;
 105                 reg = <0x10440000 0x1000>;
 106         };
 107
 108         sys_reg: syscon@10010000 {
 109                 compatible = "samsung,exynos4-sysreg", "syscon";
 110                 reg = <0x10010000 0x400>;
 111         };
 112
 113         dsi_0: dsi@11C80000 {
 114                 compatible = "samsung,exynos4210-mipi-dsi";
 115                 reg = <0x11C80000 0x10000>;
 116                 interrupts = <0 79 0>;
 117                 samsung,power-domain = <&pd_lcd0>;
 118                 phys = <&mipi_phy 1>;
 119                 phy-names = "dsim";
 120                 clocks = <&clock 286>, <&clock 143>;
 121                 clock-names = "bus_clk", "pll_clk";
 122                 status = "disabled";
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125         };
 126
 127         camera {
 128                 compatible = "samsung,fimc", "simple-bus";
 129                 status = "disabled";
 130                 #address-cells = <1>;
 131                 #size-cells = <1>;
 132                 #clock-cells = <1>;
 133                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 134                 ranges;
 135
 136                 fimc_0: fimc@11800000 {
 137                         compatible = "samsung,exynos4210-fimc";
 138                         reg = <0x11800000 0x1000>;
 139                         interrupts = <0 84 0>;
 140                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 141                         clock-names = "fimc", "sclk_fimc";
 142                         samsung,power-domain = <&pd_cam>;
 143                         samsung,sysreg = <&sys_reg>;
 144                         status = "disabled";
 145                 };
 146
 147                 fimc_1: fimc@11810000 {
 148                         compatible = "samsung,exynos4210-fimc";
 149                         reg = <0x11810000 0x1000>;
 150                         interrupts = <0 85 0>;
 151                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 152                         clock-names = "fimc", "sclk_fimc";
 153                         samsung,power-domain = <&pd_cam>;
 154                         samsung,sysreg = <&sys_reg>;
 155                         status = "disabled";
 156                 };
 157
 158                 fimc_2: fimc@11820000 {
 159                         compatible = "samsung,exynos4210-fimc";
 160                         reg = <0x11820000 0x1000>;
 161                         interrupts = <0 86 0>;
 162                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 163                         clock-names = "fimc", "sclk_fimc";
 164                         samsung,power-domain = <&pd_cam>;
 165                         samsung,sysreg = <&sys_reg>;
 166                         status = "disabled";
 167                 };
 168
 169                 fimc_3: fimc@11830000 {
 170                         compatible = "samsung,exynos4210-fimc";
 171                         reg = <0x11830000 0x1000>;
 172                         interrupts = <0 87 0>;
 173                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 174                         clock-names = "fimc", "sclk_fimc";
 175                         samsung,power-domain = <&pd_cam>;
 176                         samsung,sysreg = <&sys_reg>;
 177                         status = "disabled";
 178                 };
 179
 180                 csis_0: csis@11880000 {
 181                         compatible = "samsung,exynos4210-csis";
 182                         reg = <0x11880000 0x4000>;
 183                         interrupts = <0 78 0>;
 184                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 185                         clock-names = "csis", "sclk_csis";
 186                         bus-width = <4>;
 187                         samsung,power-domain = <&pd_cam>;
 188                         phys = <&mipi_phy 0>;
 189                         phy-names = "csis";
 190                         status = "disabled";
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193                 };
 194
 195                 csis_1: csis@11890000 {
 196                         compatible = "samsung,exynos4210-csis";
 197                         reg = <0x11890000 0x4000>;
 198                         interrupts = <0 80 0>;
 199                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 200                         clock-names = "csis", "sclk_csis";
 201                         bus-width = <2>;
 202                         samsung,power-domain = <&pd_cam>;
 203                         phys = <&mipi_phy 2>;
 204                         phy-names = "csis";
 205                         status = "disabled";
 206                         #address-cells = <1>;
 207                         #size-cells = <0>;
 208                 };
 209         };
 210
 211         watchdog@10060000 {
 212                 compatible = "samsung,s3c2410-wdt";
 213                 reg = <0x10060000 0x100>;
 214                 interrupts = <0 43 0>;
 215                 clocks = <&clock CLK_WDT>;
 216                 clock-names = "watchdog";
 217                 status = "disabled";
 218         };
 219
 220         rtc@10070000 {
 221                 compatible = "samsung,s3c6410-rtc";
 222                 reg = <0x10070000 0x100>;
 223                 interrupts = <0 44 0>, <0 45 0>;
 224                 clocks = <&clock CLK_RTC>;
 225                 clock-names = "rtc";
 226                 status = "disabled";
 227         };
 228
 229         keypad@100A0000 {
 230                 compatible = "samsung,s5pv210-keypad";
 231                 reg = <0x100A0000 0x100>;
 232                 interrupts = <0 109 0>;
 233                 clocks = <&clock CLK_KEYIF>;
 234                 clock-names = "keypad";
 235                 status = "disabled";
 236         };
 237
 238         sdhci@12510000 {
 239                 compatible = "samsung,exynos4210-sdhci";
 240                 reg = <0x12510000 0x100>;
 241                 interrupts = <0 73 0>;
 242                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 243                 clock-names = "hsmmc", "mmc_busclk.2";
 244                 status = "disabled";
 245         };
 246
 247         sdhci@12520000 {
 248                 compatible = "samsung,exynos4210-sdhci";
 249                 reg = <0x12520000 0x100>;
 250                 interrupts = <0 74 0>;
 251                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 252                 clock-names = "hsmmc", "mmc_busclk.2";
 253                 status = "disabled";
 254         };
 255
 256         sdhci@12530000 {
 257                 compatible = "samsung,exynos4210-sdhci";
 258                 reg = <0x12530000 0x100>;
 259                 interrupts = <0 75 0>;
 260                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 261                 clock-names = "hsmmc", "mmc_busclk.2";
 262                 status = "disabled";
 263         };
 264
 265         sdhci@12540000 {
 266                 compatible = "samsung,exynos4210-sdhci";
 267                 reg = <0x12540000 0x100>;
 268                 interrupts = <0 76 0>;
 269                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 270                 clock-names = "hsmmc", "mmc_busclk.2";
 271                 status = "disabled";
 272         };
 273
 274         ehci@12580000 {
 275                 compatible = "samsung,exynos4210-ehci";
 276                 reg = <0x12580000 0x100>;
 277                 interrupts = <0 70 0>;
 278                 clocks = <&clock CLK_USB_HOST>;
 279                 clock-names = "usbhost";
 280                 status = "disabled";
 281         };
 282
 283         ohci@12590000 {
 284                 compatible = "samsung,exynos4210-ohci";
 285                 reg = <0x12590000 0x100>;
 286                 interrupts = <0 70 0>;
 287                 clocks = <&clock CLK_USB_HOST>;
 288                 clock-names = "usbhost";
 289                 status = "disabled";
 290         };
 291
 292         mfc: codec@13400000 {
 293                 compatible = "samsung,mfc-v5";
 294                 reg = <0x13400000 0x10000>;
 295                 interrupts = <0 94 0>;
 296                 samsung,power-domain = <&pd_mfc>;
 297                 clocks = <&clock CLK_MFC>;
 298                 clock-names = "mfc";
 299                 status = "disabled";
 300         };
 301
 302         serial@13800000 {
 303                 compatible = "samsung,exynos4210-uart";
 304                 reg = <0x13800000 0x100>;
 305                 interrupts = <0 52 0>;
 306                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 307                 clock-names = "uart", "clk_uart_baud0";
 308                 status = "disabled";
 309         };
 310
 311         serial@13810000 {
 312                 compatible = "samsung,exynos4210-uart";
 313                 reg = <0x13810000 0x100>;
 314                 interrupts = <0 53 0>;
 315                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 316                 clock-names = "uart", "clk_uart_baud0";
 317                 status = "disabled";
 318         };
 319
 320         serial@13820000 {
 321                 compatible = "samsung,exynos4210-uart";
 322                 reg = <0x13820000 0x100>;
 323                 interrupts = <0 54 0>;
 324                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 325                 clock-names = "uart", "clk_uart_baud0";
 326                 status = "disabled";
 327         };
 328
 329         serial@13830000 {
 330                 compatible = "samsung,exynos4210-uart";
 331                 reg = <0x13830000 0x100>;
 332                 interrupts = <0 55 0>;
 333                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 334                 clock-names = "uart", "clk_uart_baud0";
 335                 status = "disabled";
 336         };
 337
 338         i2c_0: i2c@13860000 {
 339                 #address-cells = <1>;
 340                 #size-cells = <0>;
 341                 compatible = "samsung,s3c2440-i2c";
 342                 reg = <0x13860000 0x100>;
 343                 interrupts = <0 58 0>;
 344                 clocks = <&clock CLK_I2C0>;
 345                 clock-names = "i2c";
 346                 pinctrl-names = "default";
 347                 pinctrl-0 = <&i2c0_bus>;
 348                 status = "disabled";
 349         };
 350
 351         i2c_1: i2c@13870000 {
 352                 #address-cells = <1>;
 353                 #size-cells = <0>;
 354                 compatible = "samsung,s3c2440-i2c";
 355                 reg = <0x13870000 0x100>;
 356                 interrupts = <0 59 0>;
 357                 clocks = <&clock CLK_I2C1>;
 358                 clock-names = "i2c";
 359                 pinctrl-names = "default";
 360                 pinctrl-0 = <&i2c1_bus>;
 361                 status = "disabled";
 362         };
 363
 364         i2c_2: i2c@13880000 {
 365                 #address-cells = <1>;
 366                 #size-cells = <0>;
 367                 compatible = "samsung,s3c2440-i2c";
 368                 reg = <0x13880000 0x100>;
 369                 interrupts = <0 60 0>;
 370                 clocks = <&clock CLK_I2C2>;
 371                 clock-names = "i2c";
 372                 pinctrl-names = "default";
 373                 pinctrl-0 = <&i2c2_bus>;
 374                 status = "disabled";
 375         };
 376
 377         i2c_3: i2c@13890000 {
 378                 #address-cells = <1>;
 379                 #size-cells = <0>;
 380                 compatible = "samsung,s3c2440-i2c";
 381                 reg = <0x13890000 0x100>;
 382                 interrupts = <0 61 0>;
 383                 clocks = <&clock CLK_I2C3>;
 384                 clock-names = "i2c";
 385                 pinctrl-names = "default";
 386                 pinctrl-0 = <&i2c3_bus>;
 387                 status = "disabled";
 388         };
 389
 390         i2c_4: i2c@138A0000 {
 391                 #address-cells = <1>;
 392                 #size-cells = <0>;
 393                 compatible = "samsung,s3c2440-i2c";
 394                 reg = <0x138A0000 0x100>;
 395                 interrupts = <0 62 0>;
 396                 clocks = <&clock CLK_I2C4>;
 397                 clock-names = "i2c";
 398                 pinctrl-names = "default";
 399                 pinctrl-0 = <&i2c4_bus>;
 400                 status = "disabled";
 401         };
 402
 403         i2c_5: i2c@138B0000 {
 404                 #address-cells = <1>;
 405                 #size-cells = <0>;
 406                 compatible = "samsung,s3c2440-i2c";
 407                 reg = <0x138B0000 0x100>;
 408                 interrupts = <0 63 0>;
 409                 clocks = <&clock CLK_I2C5>;
 410                 clock-names = "i2c";
 411                 pinctrl-names = "default";
 412                 pinctrl-0 = <&i2c5_bus>;
 413                 status = "disabled";
 414         };
 415
 416         i2c_6: i2c@138C0000 {
 417                 #address-cells = <1>;
 418                 #size-cells = <0>;
 419                 compatible = "samsung,s3c2440-i2c";
 420                 reg = <0x138C0000 0x100>;
 421                 interrupts = <0 64 0>;
 422                 clocks = <&clock CLK_I2C6>;
 423                 clock-names = "i2c";
 424                 pinctrl-names = "default";
 425                 pinctrl-0 = <&i2c6_bus>;
 426                 status = "disabled";
 427         };
 428
 429         i2c_7: i2c@138D0000 {
 430                 #address-cells = <1>;
 431                 #size-cells = <0>;
 432                 compatible = "samsung,s3c2440-i2c";
 433                 reg = <0x138D0000 0x100>;
 434                 interrupts = <0 65 0>;
 435                 clocks = <&clock CLK_I2C7>;
 436                 clock-names = "i2c";
 437                 pinctrl-names = "default";
 438                 pinctrl-0 = <&i2c7_bus>;
 439                 status = "disabled";
 440         };
 441
 442         spi_0: spi@13920000 {
 443                 compatible = "samsung,exynos4210-spi";
 444                 reg = <0x13920000 0x100>;
 445                 interrupts = <0 66 0>;
 446                 dmas = <&pdma0 7>, <&pdma0 6>;
 447                 dma-names = "tx", "rx";
 448                 #address-cells = <1>;
 449                 #size-cells = <0>;
 450                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 451                 clock-names = "spi", "spi_busclk0";
 452                 pinctrl-names = "default";
 453                 pinctrl-0 = <&spi0_bus>;
 454                 status = "disabled";
 455         };
 456
 457         spi_1: spi@13930000 {
 458                 compatible = "samsung,exynos4210-spi";
 459                 reg = <0x13930000 0x100>;
 460                 interrupts = <0 67 0>;
 461                 dmas = <&pdma1 7>, <&pdma1 6>;
 462                 dma-names = "tx", "rx";
 463                 #address-cells = <1>;
 464                 #size-cells = <0>;
 465                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 466                 clock-names = "spi", "spi_busclk0";
 467                 pinctrl-names = "default";
 468                 pinctrl-0 = <&spi1_bus>;
 469                 status = "disabled";
 470         };
 471
 472         spi_2: spi@13940000 {
 473                 compatible = "samsung,exynos4210-spi";
 474                 reg = <0x13940000 0x100>;
 475                 interrupts = <0 68 0>;
 476                 dmas = <&pdma0 9>, <&pdma0 8>;
 477                 dma-names = "tx", "rx";
 478                 #address-cells = <1>;
 479                 #size-cells = <0>;
 480                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 481                 clock-names = "spi", "spi_busclk0";
 482                 pinctrl-names = "default";
 483                 pinctrl-0 = <&spi2_bus>;
 484                 status = "disabled";
 485         };
 486
 487         pwm@139D0000 {
 488                 compatible = "samsung,exynos4210-pwm";
 489                 reg = <0x139D0000 0x1000>;
 490                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 491                 clocks = <&clock CLK_PWM>;
 492                 clock-names = "timers";
 493                 #pwm-cells = <2>;
 494                 status = "disabled";
 495         };
 496
 497         amba {
 498                 #address-cells = <1>;
 499                 #size-cells = <1>;
 500                 compatible = "arm,amba-bus";
 501                 interrupt-parent = <&gic>;
 502                 ranges;
 503
 504                 pdma0: pdma@12680000 {
 505                         compatible = "arm,pl330", "arm,primecell";
 506                         reg = <0x12680000 0x1000>;
 507                         interrupts = <0 35 0>;
 508                         clocks = <&clock CLK_PDMA0>;
 509                         clock-names = "apb_pclk";
 510                         #dma-cells = <1>;
 511                         #dma-channels = <8>;
 512                         #dma-requests = <32>;
 513                 };
 514
 515                 pdma1: pdma@12690000 {
 516                         compatible = "arm,pl330", "arm,primecell";
 517                         reg = <0x12690000 0x1000>;
 518                         interrupts = <0 36 0>;
 519                         clocks = <&clock CLK_PDMA1>;
 520                         clock-names = "apb_pclk";
 521                         #dma-cells = <1>;
 522                         #dma-channels = <8>;
 523                         #dma-requests = <32>;
 524                 };
 525
 526                 mdma1: mdma@12850000 {
 527                         compatible = "arm,pl330", "arm,primecell";
 528                         reg = <0x12850000 0x1000>;
 529                         interrupts = <0 34 0>;
 530                         clocks = <&clock CLK_MDMA>;
 531                         clock-names = "apb_pclk";
 532                         #dma-cells = <1>;
 533                         #dma-channels = <8>;
 534                         #dma-requests = <1>;
 535                 };
 536         };
 537
 538         fimd: fimd@11c00000 {
 539                 compatible = "samsung,exynos4210-fimd";
 540                 interrupt-parent = <&combiner>;
 541                 reg = <0x11c00000 0x20000>;
 542                 interrupt-names = "fifo", "vsync", "lcd_sys";
 543                 interrupts = <11 0>, <11 1>, <11 2>;
 544                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 545                 clock-names = "sclk_fimd", "fimd";
 546                 samsung,power-domain = <&pd_lcd0>;
 547                 status = "disabled";
 548         };
 549 };