arch/arm/boot/dts/ecx-2000.dts

   1 /*
   2  * Copyright 2011-2012 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 /dts-v1/;
  18
  19 /* First 4KB has pen for secondary cores. */
  20 /memreserve/ 0x00000000 0x0001000;
  21
  22 / {
  23         model = "Calxeda ECX-2000";
  24         compatible = "calxeda,ecx-2000";
  25         #address-cells = <2>;
  26         #size-cells = <2>;
  27         clock-ranges;
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 cpu@0 {
  34                         compatible = "arm,cortex-a15";
  35                         reg = <0>;
  36                         clocks = <&a9pll>;
  37                         clock-names = "cpu";
  38                 };
  39
  40                 cpu@1 {
  41                         compatible = "arm,cortex-a15";
  42                         reg = <1>;
  43                         clocks = <&a9pll>;
  44                         clock-names = "cpu";
  45                 };
  46
  47                 cpu@2 {
  48                         compatible = "arm,cortex-a15";
  49                         reg = <2>;
  50                         clocks = <&a9pll>;
  51                         clock-names = "cpu";
  52                 };
  53
  54                 cpu@3 {
  55                         compatible = "arm,cortex-a15";
  56                         reg = <3>;
  57                         clocks = <&a9pll>;
  58                         clock-names = "cpu";
  59                 };
  60         };
  61
  62         memory@0 {
  63                 name = "memory";
  64                 device_type = "memory";
  65                 reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
  66         };
  67
  68         memory@200000000 {
  69                 name = "memory";
  70                 device_type = "memory";
  71                 reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
  72         };
  73
  74         soc {
  75                 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
  76
  77                 timer {
  78                         compatible = "arm,cortex-a15-timer", "arm,armv7-timer";                         interrupts = <1 13 0xf08>,
  79                                 <1 14 0xf08>,
  80                                 <1 11 0xf08>,
  81                                 <1 10 0xf08>;
  82                 };
  83
  84                 intc: interrupt-controller@fff11000 {
  85                         compatible = "arm,cortex-a15-gic";
  86                         #interrupt-cells = <3>;
  87                         #size-cells = <0>;
  88                         #address-cells = <1>;
  89                         interrupt-controller;
  90                         interrupts = <1 9 0xf04>;
  91                         reg = <0xfff11000 0x1000>,
  92                               <0xfff12000 0x1000>,
  93                               <0xfff14000 0x2000>,
  94                               <0xfff16000 0x2000>;
  95                 };
  96
  97                 pmu {
  98                         compatible = "arm,cortex-a9-pmu";
  99                         interrupts = <0 76 4  0 75 4  0 74 4  0 73 4>;
 100                 };
 101         };
 102 };
 103
 104 /include/ "ecx-common.dtsi"