2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
46 config ARCH_USES_GETTIMEOFFSET
50 config GENERIC_CLOCKEVENTS
53 config GENERIC_CLOCKEVENTS_BROADCAST
55 depends on GENERIC_CLOCKEVENTS
60 select GENERIC_ALLOCATOR
71 The Extended Industry Standard Architecture (EISA) bus was
72 developed as an open alternative to the IBM MicroChannel bus.
74 The EISA bus provided some of the features of the IBM MicroChannel
75 bus while maintaining backward compatibility with cards made for
76 the older ISA bus. The EISA bus saw limited use between 1988 and
77 1995 when it was made obsolete by the PCI bus.
79 Say Y here if you are building a kernel for an EISA-based machine.
89 MicroChannel Architecture is found in some IBM PS/2 machines and
90 laptops. It is a bus system similar to PCI or ISA. See
91 <file:Documentation/mca.txt> (and especially the web page given
92 there) before attempting to build an MCA bus kernel.
94 config GENERIC_HARDIRQS
98 config STACKTRACE_SUPPORT
102 config HAVE_LATENCYTOP_SUPPORT
107 config LOCKDEP_SUPPORT
111 config TRACE_IRQFLAGS_SUPPORT
115 config HARDIRQS_SW_RESEND
119 config GENERIC_IRQ_PROBE
123 config GENERIC_LOCKBREAK
126 depends on SMP && PREEMPT
128 config RWSEM_GENERIC_SPINLOCK
132 config RWSEM_XCHGADD_ALGORITHM
135 config ARCH_HAS_ILOG2_U32
138 config ARCH_HAS_ILOG2_U64
141 config ARCH_HAS_CPUFREQ
144 Internal node to signify that the ARCH has CPUFREQ support
145 and that the relevant menu configurations are displayed for
148 config GENERIC_HWEIGHT
152 config GENERIC_CALIBRATE_DELAY
156 config ARCH_MAY_HAVE_PC_FDC
162 config NEED_DMA_MAP_STATE
165 config GENERIC_ISA_DMA
174 config GENERIC_HARDIRQS_NO__DO_IRQ
177 config ARM_L1_CACHE_SHIFT_6
180 Setting ARM L1 cache line size to 64 Bytes.
184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
188 The base address of exception vectors.
190 source "init/Kconfig"
192 source "kernel/Kconfig.freezer"
197 bool "MMU-based Paged Memory Management Support"
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
204 # The "ARM system type" choice list is ordered alphabetically by option
205 # text. Please add new entries in the option alphabetic order.
208 prompt "ARM system type"
209 default ARCH_VERSATILE
212 bool "Agilent AAEC-2000 based"
216 select ARCH_USES_GETTIMEOFFSET
218 This enables support for systems based on the Agilent AAEC-2000
220 config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
223 select ARCH_HAS_CPUFREQ
226 select GENERIC_CLOCKEVENTS
227 select PLAT_VERSATILE
229 Support for ARM's Integrator platform.
232 bool "ARM Ltd. RealView family"
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
250 select GENERIC_CLOCKEVENTS
251 select ARCH_WANT_OPTIONAL_GPIOLIB
252 select PLAT_VERSATILE
253 select ARM_TIMER_SP804
255 This enables support for ARM Ltd Versatile board.
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_TIMER_SP804
263 select GENERIC_CLOCKEVENTS
266 select PLAT_VERSATILE
268 This enables support for the ARM Ltd Versatile Express boards.
272 select ARCH_REQUIRE_GPIOLIB
275 This enables support for systems based on the Atmel AT91RM9200,
276 AT91SAM9 and AT91CAP9 processors.
279 bool "Broadcom BCMRING"
284 select GENERIC_CLOCKEVENTS
285 select ARCH_WANT_OPTIONAL_GPIOLIB
287 Support for Broadcom's BCMRing platform.
290 bool "Cirrus Logic CLPS711x/EP721x-based"
292 select ARCH_USES_GETTIMEOFFSET
294 Support for Cirrus Logic 711x/721x based boards.
297 bool "Cavium Networks CNS3XXX family"
299 select GENERIC_CLOCKEVENTS
301 select PCI_DOMAINS if PCI
303 Support for Cavium Networks CNS3XXX platform.
306 bool "Cortina Systems Gemini"
308 select ARCH_REQUIRE_GPIOLIB
309 select ARCH_USES_GETTIMEOFFSET
311 Support for the Cortina Systems Gemini family SoCs
318 select ARCH_USES_GETTIMEOFFSET
320 This is an evaluation board for the StrongARM processor available
321 from Digital. It has limited hardware on-board, including an
322 Ethernet interface, two PCMCIA sockets, two serial ports and a
331 select ARCH_REQUIRE_GPIOLIB
332 select ARCH_HAS_HOLES_MEMORYMODEL
333 select ARCH_USES_GETTIMEOFFSET
335 This enables support for the Cirrus EP93xx series of CPUs.
337 config ARCH_FOOTBRIDGE
341 select ARCH_USES_GETTIMEOFFSET
343 Support for systems based on the DC21285 companion chip
344 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
347 bool "Freescale MXC/iMX-based"
348 select GENERIC_CLOCKEVENTS
349 select ARCH_REQUIRE_GPIOLIB
352 Support for Freescale MXC/iMX-based family of processors
355 bool "Freescale STMP3xxx"
358 select ARCH_REQUIRE_GPIOLIB
359 select GENERIC_CLOCKEVENTS
360 select USB_ARCH_HAS_EHCI
362 Support for systems based on the Freescale 3xxx CPUs.
365 bool "Hilscher NetX based"
368 select GENERIC_CLOCKEVENTS
370 This enables support for systems based on the Hilscher NetX Soc
373 bool "Hynix HMS720x-based"
376 select ARCH_USES_GETTIMEOFFSET
378 This enables support for systems based on the Hynix HMS720x
386 select ARCH_SUPPORTS_MSI
389 Support for Intel's IOP13XX (XScale) family of processors.
397 select ARCH_REQUIRE_GPIOLIB
399 Support for Intel's 80219 and IOP32X (XScale) family of
408 select ARCH_REQUIRE_GPIOLIB
410 Support for Intel's IOP33X (XScale) family of processors.
417 select ARCH_USES_GETTIMEOFFSET
419 Support for Intel's IXP23xx (XScale) family of processors.
422 bool "IXP2400/2800-based"
426 select ARCH_USES_GETTIMEOFFSET
428 Support for Intel's IXP2400/2800 (XScale) family of processors.
435 select GENERIC_CLOCKEVENTS
436 select DMABOUNCE if PCI
438 Support for Intel's IXP4XX (XScale) family of processors.
443 select ARCH_REQUIRE_GPIOLIB
444 select GENERIC_CLOCKEVENTS
447 Support for the Marvell Dove SoC 88AP510
450 bool "Marvell Kirkwood"
453 select ARCH_REQUIRE_GPIOLIB
454 select GENERIC_CLOCKEVENTS
457 Support for the following Marvell Kirkwood series SoCs:
458 88F6180, 88F6192 and 88F6281.
461 bool "Marvell Loki (88RC8480)"
463 select GENERIC_CLOCKEVENTS
466 Support for the Marvell Loki (88RC8480) SoC.
471 select ARCH_REQUIRE_GPIOLIB
474 select USB_ARCH_HAS_OHCI
477 select GENERIC_CLOCKEVENTS
479 Support for the NXP LPC32XX family of processors
482 bool "Marvell MV78xx0"
485 select ARCH_REQUIRE_GPIOLIB
486 select GENERIC_CLOCKEVENTS
489 Support for the following Marvell MV78xx0 series SoCs:
497 select ARCH_REQUIRE_GPIOLIB
498 select GENERIC_CLOCKEVENTS
501 Support for the following Marvell Orion 5x series SoCs:
502 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
503 Orion-2 (5281), Orion-1-90 (6183).
506 bool "Marvell PXA168/910/MMP2"
508 select ARCH_REQUIRE_GPIOLIB
510 select GENERIC_CLOCKEVENTS
515 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
518 bool "Micrel/Kendin KS8695"
520 select ARCH_REQUIRE_GPIOLIB
521 select ARCH_USES_GETTIMEOFFSET
523 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524 System-on-Chip devices.
527 bool "NetSilicon NS9xxx"
530 select GENERIC_CLOCKEVENTS
533 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
536 <http://www.digi.com/products/microprocessors/index.jsp>
539 bool "Nuvoton W90X900 CPU"
541 select ARCH_REQUIRE_GPIOLIB
543 select GENERIC_CLOCKEVENTS
545 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546 At present, the w90x900 has been renamed nuc900, regarding
547 the ARM series product line, you can login the following
548 link address to know more.
550 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
554 bool "Nuvoton NUC93X CPU"
558 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559 low-power and high performance MPEG-4/JPEG multimedia controller chip.
564 select GENERIC_CLOCKEVENTS
568 select ARCH_HAS_BARRIERS if CACHE_L2X0
570 This enables support for NVIDIA Tegra based systems (Tegra APX,
571 Tegra 6xx and Tegra 2 series).
574 bool "Philips Nexperia PNX4008 Mobile"
577 select ARCH_USES_GETTIMEOFFSET
579 This enables support for Philips PNX4008 mobile platform.
582 bool "PXA2xx/PXA3xx-based"
585 select ARCH_HAS_CPUFREQ
587 select ARCH_REQUIRE_GPIOLIB
588 select GENERIC_CLOCKEVENTS
593 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
598 select GENERIC_CLOCKEVENTS
599 select ARCH_REQUIRE_GPIOLIB
601 Support for Qualcomm MSM/QSD based systems. This runs on the
602 apps processor of the MSM/QSD and depends on a shared memory
603 interface to the modem processor which runs the baseband
604 stack and controls some vital subsystems
605 (clock and power control, etc).
608 bool "Renesas SH-Mobile"
610 Support for Renesas's SH-Mobile ARM platforms
617 select ARCH_MAY_HAVE_PC_FDC
618 select HAVE_PATA_PLATFORM
621 select ARCH_SPARSEMEM_ENABLE
622 select ARCH_USES_GETTIMEOFFSET
624 On the Acorn Risc-PC, Linux can support the internal IDE disk and
625 CD-ROM interface, serial and parallel port, and the floppy drive.
631 select ARCH_SPARSEMEM_ENABLE
633 select ARCH_HAS_CPUFREQ
635 select GENERIC_CLOCKEVENTS
638 select ARCH_REQUIRE_GPIOLIB
640 Support for StrongARM 11x0 based boards.
643 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
645 select ARCH_HAS_CPUFREQ
647 select ARCH_USES_GETTIMEOFFSET
648 select HAVE_S3C2410_I2C
650 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
651 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
652 the Samsung SMDK2410 development board (and derivatives).
654 Note, the S3C2416 and the S3C2450 are so close that they even share
655 the same SoC ID code. This means that there is no seperate machine
656 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
659 bool "Samsung S3C64XX"
665 select ARCH_USES_GETTIMEOFFSET
666 select ARCH_HAS_CPUFREQ
667 select ARCH_REQUIRE_GPIOLIB
668 select SAMSUNG_CLKSRC
669 select SAMSUNG_IRQ_VIC_TIMER
670 select SAMSUNG_IRQ_UART
671 select S3C_GPIO_TRACK
672 select S3C_GPIO_PULL_UPDOWN
673 select S3C_GPIO_CFG_S3C24XX
674 select S3C_GPIO_CFG_S3C64XX
676 select USB_ARCH_HAS_OHCI
677 select SAMSUNG_GPIOLIB_4BIT
678 select HAVE_S3C2410_I2C
679 select HAVE_S3C2410_WATCHDOG
681 Samsung S3C64XX series based systems
684 bool "Samsung S5P6440 S5P6450"
688 select HAVE_S3C2410_WATCHDOG
689 select ARCH_USES_GETTIMEOFFSET
690 select HAVE_S3C2410_I2C
693 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
697 bool "Samsung S5P6442"
701 select ARCH_USES_GETTIMEOFFSET
702 select HAVE_S3C2410_WATCHDOG
704 Samsung S5P6442 CPU based systems
707 bool "Samsung S5PC100"
711 select ARM_L1_CACHE_SHIFT_6
712 select ARCH_USES_GETTIMEOFFSET
713 select HAVE_S3C2410_I2C
715 select HAVE_S3C2410_WATCHDOG
717 Samsung S5PC100 series based systems
720 bool "Samsung S5PV210/S5PC110"
724 select ARM_L1_CACHE_SHIFT_6
725 select ARCH_USES_GETTIMEOFFSET
726 select HAVE_S3C2410_I2C
728 select HAVE_S3C2410_WATCHDOG
730 Samsung S5PV210/S5PC110 series based systems
733 bool "Samsung S5PV310/S5PC210"
737 select GENERIC_CLOCKEVENTS
739 Samsung S5PV310 series based systems
748 select ARCH_USES_GETTIMEOFFSET
750 Support for the StrongARM based Digital DNARD machine, also known
751 as "Shark" (<http://www.shark-linux.de/shark.html>).
754 bool "Telechips TCC ARM926-based systems"
758 select GENERIC_CLOCKEVENTS
760 Support for Telechips TCC ARM926-based systems.
765 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
766 select ARCH_USES_GETTIMEOFFSET
768 Say Y here for systems based on one of the Sharp LH7A40X
769 System on a Chip processors. These CPUs include an ARM922T
770 core with a wide array of integrated devices for
771 hand-held and low-power applications.
774 bool "ST-Ericsson U300 Series"
780 select GENERIC_CLOCKEVENTS
784 Support for ST-Ericsson U300 series mobile platforms.
787 bool "ST-Ericsson U8500 Series"
790 select GENERIC_CLOCKEVENTS
792 select ARCH_REQUIRE_GPIOLIB
794 Support for ST-Ericsson's Ux500 architecture
797 bool "STMicroelectronics Nomadik"
802 select GENERIC_CLOCKEVENTS
803 select ARCH_REQUIRE_GPIOLIB
805 Support for the Nomadik platform by ST-Ericsson
809 select GENERIC_CLOCKEVENTS
810 select ARCH_REQUIRE_GPIOLIB
814 select GENERIC_ALLOCATOR
815 select ARCH_HAS_HOLES_MEMORYMODEL
817 Support for TI's DaVinci platform.
822 select ARCH_REQUIRE_GPIOLIB
823 select ARCH_HAS_CPUFREQ
824 select GENERIC_CLOCKEVENTS
825 select ARCH_HAS_HOLES_MEMORYMODEL
827 Support for TI's OMAP platform (OMAP1 and OMAP2).
832 select ARCH_REQUIRE_GPIOLIB
834 select GENERIC_CLOCKEVENTS
837 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
842 # This is sorted alphabetically by mach-* pathname. However, plat-*
843 # Kconfigs may be included either alphabetically (according to the
844 # plat- suffix) or along side the corresponding mach-* source.
846 source "arch/arm/mach-aaec2000/Kconfig"
848 source "arch/arm/mach-at91/Kconfig"
850 source "arch/arm/mach-bcmring/Kconfig"
852 source "arch/arm/mach-clps711x/Kconfig"
854 source "arch/arm/mach-cns3xxx/Kconfig"
856 source "arch/arm/mach-davinci/Kconfig"
858 source "arch/arm/mach-dove/Kconfig"
860 source "arch/arm/mach-ep93xx/Kconfig"
862 source "arch/arm/mach-footbridge/Kconfig"
864 source "arch/arm/mach-gemini/Kconfig"
866 source "arch/arm/mach-h720x/Kconfig"
868 source "arch/arm/mach-integrator/Kconfig"
870 source "arch/arm/mach-iop32x/Kconfig"
872 source "arch/arm/mach-iop33x/Kconfig"
874 source "arch/arm/mach-iop13xx/Kconfig"
876 source "arch/arm/mach-ixp4xx/Kconfig"
878 source "arch/arm/mach-ixp2000/Kconfig"
880 source "arch/arm/mach-ixp23xx/Kconfig"
882 source "arch/arm/mach-kirkwood/Kconfig"
884 source "arch/arm/mach-ks8695/Kconfig"
886 source "arch/arm/mach-lh7a40x/Kconfig"
888 source "arch/arm/mach-loki/Kconfig"
890 source "arch/arm/mach-lpc32xx/Kconfig"
892 source "arch/arm/mach-msm/Kconfig"
894 source "arch/arm/mach-mv78xx0/Kconfig"
896 source "arch/arm/plat-mxc/Kconfig"
898 source "arch/arm/mach-netx/Kconfig"
900 source "arch/arm/mach-nomadik/Kconfig"
901 source "arch/arm/plat-nomadik/Kconfig"
903 source "arch/arm/mach-ns9xxx/Kconfig"
905 source "arch/arm/mach-nuc93x/Kconfig"
907 source "arch/arm/plat-omap/Kconfig"
909 source "arch/arm/mach-omap1/Kconfig"
911 source "arch/arm/mach-omap2/Kconfig"
913 source "arch/arm/mach-orion5x/Kconfig"
915 source "arch/arm/mach-pxa/Kconfig"
916 source "arch/arm/plat-pxa/Kconfig"
918 source "arch/arm/mach-mmp/Kconfig"
920 source "arch/arm/mach-realview/Kconfig"
922 source "arch/arm/mach-sa1100/Kconfig"
924 source "arch/arm/plat-samsung/Kconfig"
925 source "arch/arm/plat-s3c24xx/Kconfig"
926 source "arch/arm/plat-s5p/Kconfig"
928 source "arch/arm/plat-spear/Kconfig"
930 source "arch/arm/plat-tcc/Kconfig"
933 source "arch/arm/mach-s3c2400/Kconfig"
934 source "arch/arm/mach-s3c2410/Kconfig"
935 source "arch/arm/mach-s3c2412/Kconfig"
936 source "arch/arm/mach-s3c2416/Kconfig"
937 source "arch/arm/mach-s3c2440/Kconfig"
938 source "arch/arm/mach-s3c2443/Kconfig"
942 source "arch/arm/mach-s3c64xx/Kconfig"
945 source "arch/arm/mach-s5p64x0/Kconfig"
947 source "arch/arm/mach-s5p6442/Kconfig"
949 source "arch/arm/mach-s5pc100/Kconfig"
951 source "arch/arm/mach-s5pv210/Kconfig"
953 source "arch/arm/mach-s5pv310/Kconfig"
955 source "arch/arm/mach-shmobile/Kconfig"
957 source "arch/arm/plat-stmp3xxx/Kconfig"
959 source "arch/arm/mach-tegra/Kconfig"
961 source "arch/arm/mach-u300/Kconfig"
963 source "arch/arm/mach-ux500/Kconfig"
965 source "arch/arm/mach-versatile/Kconfig"
967 source "arch/arm/mach-vexpress/Kconfig"
969 source "arch/arm/mach-w90x900/Kconfig"
971 # Definitions to make life easier
977 select GENERIC_CLOCKEVENTS
985 config PLAT_VERSATILE
988 config ARM_TIMER_SP804
991 source arch/arm/mm/Kconfig
994 bool "Enable iWMMXt support"
995 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
996 default y if PXA27x || PXA3xx || ARCH_MMP
998 Enable support for iWMMXt context switching at run time if
999 running on a CPU that supports it.
1001 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1004 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1008 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1009 (!ARCH_OMAP3 || OMAP3_EMU)
1014 source "arch/arm/Kconfig-nommu"
1017 config ARM_ERRATA_411920
1018 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1019 depends on CPU_V6 && !SMP
1021 Invalidation of the Instruction Cache operation can
1022 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1023 It does not affect the MPCore. This option enables the ARM Ltd.
1024 recommended workaround.
1026 config ARM_ERRATA_430973
1027 bool "ARM errata: Stale prediction on replaced interworking branch"
1030 This option enables the workaround for the 430973 Cortex-A8
1031 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1032 interworking branch is replaced with another code sequence at the
1033 same virtual address, whether due to self-modifying code or virtual
1034 to physical address re-mapping, Cortex-A8 does not recover from the
1035 stale interworking branch prediction. This results in Cortex-A8
1036 executing the new code sequence in the incorrect ARM or Thumb state.
1037 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1038 and also flushes the branch target cache at every context switch.
1039 Note that setting specific bits in the ACTLR register may not be
1040 available in non-secure mode.
1042 config ARM_ERRATA_458693
1043 bool "ARM errata: Processor deadlock when a false hazard is created"
1046 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1047 erratum. For very specific sequences of memory operations, it is
1048 possible for a hazard condition intended for a cache line to instead
1049 be incorrectly associated with a different cache line. This false
1050 hazard might then cause a processor deadlock. The workaround enables
1051 the L1 caching of the NEON accesses and disables the PLD instruction
1052 in the ACTLR register. Note that setting specific bits in the ACTLR
1053 register may not be available in non-secure mode.
1055 config ARM_ERRATA_460075
1056 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1059 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1060 erratum. Any asynchronous access to the L2 cache may encounter a
1061 situation in which recent store transactions to the L2 cache are lost
1062 and overwritten with stale memory contents from external memory. The
1063 workaround disables the write-allocate mode for the L2 cache via the
1064 ACTLR register. Note that setting specific bits in the ACTLR register
1065 may not be available in non-secure mode.
1067 config ARM_ERRATA_742230
1068 bool "ARM errata: DMB operation may be faulty"
1069 depends on CPU_V7 && SMP
1071 This option enables the workaround for the 742230 Cortex-A9
1072 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1073 between two write operations may not ensure the correct visibility
1074 ordering of the two writes. This workaround sets a specific bit in
1075 the diagnostic register of the Cortex-A9 which causes the DMB
1076 instruction to behave as a DSB, ensuring the correct behaviour of
1079 config ARM_ERRATA_742231
1080 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1081 depends on CPU_V7 && SMP
1083 This option enables the workaround for the 742231 Cortex-A9
1084 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1085 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1086 accessing some data located in the same cache line, may get corrupted
1087 data due to bad handling of the address hazard when the line gets
1088 replaced from one of the CPUs at the same time as another CPU is
1089 accessing it. This workaround sets specific bits in the diagnostic
1090 register of the Cortex-A9 which reduces the linefill issuing
1091 capabilities of the processor.
1093 config PL310_ERRATA_588369
1094 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1095 depends on CACHE_L2X0 && ARCH_OMAP4
1097 The PL310 L2 cache controller implements three types of Clean &
1098 Invalidate maintenance operations: by Physical Address
1099 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1100 They are architecturally defined to behave as the execution of a
1101 clean operation followed immediately by an invalidate operation,
1102 both performing to the same memory location. This functionality
1103 is not correctly implemented in PL310 as clean lines are not
1104 invalidated as a result of these operations. Note that this errata
1105 uses Texas Instrument's secure monitor api.
1107 config ARM_ERRATA_720789
1108 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1109 depends on CPU_V7 && SMP
1111 This option enables the workaround for the 720789 Cortex-A9 (prior to
1112 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1113 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1114 As a consequence of this erratum, some TLB entries which should be
1115 invalidated are not, resulting in an incoherency in the system page
1116 tables. The workaround changes the TLB flushing routines to invalidate
1117 entries regardless of the ASID.
1119 config ARM_ERRATA_743622
1120 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1123 This option enables the workaround for the 743622 Cortex-A9
1124 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1125 optimisation in the Cortex-A9 Store Buffer may lead to data
1126 corruption. This workaround sets a specific bit in the diagnostic
1127 register of the Cortex-A9 which disables the Store Buffer
1128 optimisation, preventing the defect from occurring. This has no
1129 visible impact on the overall performance or power consumption of the
1134 source "arch/arm/common/Kconfig"
1144 Find out whether you have ISA slots on your motherboard. ISA is the
1145 name of a bus system, i.e. the way the CPU talks to the other stuff
1146 inside your box. Other bus systems are PCI, EISA, MicroChannel
1147 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1148 newer boards don't support it. If you have ISA, say Y, otherwise N.
1150 # Select ISA DMA controller support
1155 # Select ISA DMA interface
1160 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1162 Find out whether you have a PCI motherboard. PCI is the name of a
1163 bus system, i.e. the way the CPU talks to the other stuff inside
1164 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1165 VESA. If you have PCI, say Y, otherwise N.
1174 # Select the host bridge type
1175 config PCI_HOST_VIA82C505
1177 depends on PCI && ARCH_SHARK
1180 config PCI_HOST_ITE8152
1182 depends on PCI && MACH_ARMCORE
1186 source "drivers/pci/Kconfig"
1188 source "drivers/pcmcia/Kconfig"
1192 menu "Kernel Features"
1194 source "kernel/time/Kconfig"
1197 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1198 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1199 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1200 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1201 depends on GENERIC_CLOCKEVENTS
1202 select USE_GENERIC_SMP_HELPERS
1203 select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
1204 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1206 This enables support for systems with more than one CPU. If you have
1207 a system with only one CPU, like most personal computers, say N. If
1208 you have a system with more than one CPU, say Y.
1210 If you say N here, the kernel will run on single and multiprocessor
1211 machines, but will use only one CPU of a multiprocessor machine. If
1212 you say Y here, the kernel will run on many, but not all, single
1213 processor machines. On a single processor machine, the kernel will
1214 run faster if you say N here.
1216 See also <file:Documentation/i386/IO-APIC.txt>,
1217 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1218 <http://www.linuxdoc.org/docs.html#howto>.
1220 If you don't know what to do here, say N.
1226 This option enables support for the ARM system coherency unit
1232 This options enables support for the ARM timer and watchdog unit
1235 prompt "Memory split"
1238 Select the desired split between kernel and user memory.
1240 If you are not absolutely sure what you are doing, leave this
1244 bool "3G/1G user/kernel split"
1246 bool "2G/2G user/kernel split"
1248 bool "1G/3G user/kernel split"
1253 default 0x40000000 if VMSPLIT_1G
1254 default 0x80000000 if VMSPLIT_2G
1258 int "Maximum number of CPUs (2-32)"
1264 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1265 depends on SMP && HOTPLUG && EXPERIMENTAL
1267 Say Y here to experiment with turning CPUs off and on. CPUs
1268 can be controlled through /sys/devices/system/cpu.
1271 bool "Use local timer interrupts"
1272 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1273 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1274 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1276 select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
1277 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
1279 Enable support for local timers on SMP platforms, rather then the
1280 legacy IPI broadcast method. Local timers allows the system
1281 accounting to be spread across the timer interval, preventing a
1282 "thundering herd" at every timer tick.
1284 source kernel/Kconfig.preempt
1288 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1289 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1290 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1291 default AT91_TIMER_HZ if ARCH_AT91
1292 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1295 config THUMB2_KERNEL
1296 bool "Compile the kernel in Thumb-2 mode"
1297 depends on CPU_V7 && EXPERIMENTAL
1299 select ARM_ASM_UNIFIED
1301 By enabling this option, the kernel will be compiled in
1302 Thumb-2 mode. A compiler/assembler that understand the unified
1303 ARM-Thumb syntax is needed.
1307 config ARM_ASM_UNIFIED
1311 bool "Use the ARM EABI to compile the kernel"
1313 This option allows for the kernel to be compiled using the latest
1314 ARM ABI (aka EABI). This is only useful if you are using a user
1315 space environment that is also compiled with EABI.
1317 Since there are major incompatibilities between the legacy ABI and
1318 EABI, especially with regard to structure member alignment, this
1319 option also changes the kernel syscall calling convention to
1320 disambiguate both ABIs and allow for backward compatibility support
1321 (selected with CONFIG_OABI_COMPAT).
1323 To use this you need GCC version 4.0.0 or later.
1326 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1327 depends on AEABI && EXPERIMENTAL
1330 This option preserves the old syscall interface along with the
1331 new (ARM EABI) one. It also provides a compatibility layer to
1332 intercept syscalls that have structure arguments which layout
1333 in memory differs between the legacy ABI and the new ARM EABI
1334 (only for non "thumb" binaries). This option adds a tiny
1335 overhead to all syscalls and produces a slightly larger kernel.
1336 If you know you'll be using only pure EABI user space then you
1337 can say N here. If this option is not selected and you attempt
1338 to execute a legacy ABI binary then the result will be
1339 UNPREDICTABLE (in fact it can be predicted that it won't work
1340 at all). If in doubt say Y.
1342 config ARCH_HAS_HOLES_MEMORYMODEL
1345 config ARCH_SPARSEMEM_ENABLE
1348 config ARCH_SPARSEMEM_DEFAULT
1349 def_bool ARCH_SPARSEMEM_ENABLE
1351 config ARCH_SELECT_MEMORY_MODEL
1352 def_bool ARCH_SPARSEMEM_ENABLE
1355 bool "High Memory Support (EXPERIMENTAL)"
1356 depends on MMU && EXPERIMENTAL
1358 The address space of ARM processors is only 4 Gigabytes large
1359 and it has to accommodate user address space, kernel address
1360 space as well as some memory mapped IO. That means that, if you
1361 have a large amount of physical memory and/or IO, not all of the
1362 memory can be "permanently mapped" by the kernel. The physical
1363 memory that is not permanently mapped is called "high memory".
1365 Depending on the selected kernel/user memory split, minimum
1366 vmalloc space and actual amount of RAM, you may not need this
1367 option which should result in a slightly faster kernel.
1372 bool "Allocate 2nd-level pagetables from highmem"
1374 depends on !OUTER_CACHE
1376 config HW_PERF_EVENTS
1377 bool "Enable hardware performance counter support for perf events"
1378 depends on PERF_EVENTS && CPU_HAS_PMU
1381 Enable hardware performance counter support for perf events. If
1382 disabled, perf events will use software events only.
1387 This enables support for sparse irqs. This is useful in general
1388 as most CPUs have a fairly sparse array of IRQ vectors, which
1389 the irq_desc then maps directly on to. Systems with a high
1390 number of off-chip IRQs will want to treat this as
1391 experimental until they have been independently verified.
1395 config FORCE_MAX_ZONEORDER
1396 int "Maximum zone order" if ARCH_SHMOBILE
1397 range 11 64 if ARCH_SHMOBILE
1398 default "9" if SA1111
1401 The kernel memory allocator divides physically contiguous memory
1402 blocks into "zones", where each zone is a power of two number of
1403 pages. This option selects the largest power of two that the kernel
1404 keeps in the memory allocator. If you need to allocate very large
1405 blocks of physically contiguous memory, then you may need to
1406 increase this value.
1408 This config option is actually maximum order plus one. For example,
1409 a value of 11 means that the largest free memory block is 2^10 pages.
1412 bool "Timer and CPU usage LEDs"
1413 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1414 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1415 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1416 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1417 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1418 ARCH_AT91 || ARCH_DAVINCI || \
1419 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1421 If you say Y here, the LEDs on your machine will be used
1422 to provide useful information about your current system status.
1424 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1425 be able to select which LEDs are active using the options below. If
1426 you are compiling a kernel for the EBSA-110 or the LART however, the
1427 red LED will simply flash regularly to indicate that the system is
1428 still functional. It is safe to say Y here if you have a CATS
1429 system, but the driver will do nothing.
1432 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1433 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1434 || MACH_OMAP_PERSEUS2
1436 depends on !GENERIC_CLOCKEVENTS
1437 default y if ARCH_EBSA110
1439 If you say Y here, one of the system LEDs (the green one on the
1440 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1441 will flash regularly to indicate that the system is still
1442 operational. This is mainly useful to kernel hackers who are
1443 debugging unstable kernels.
1445 The LART uses the same LED for both Timer LED and CPU usage LED
1446 functions. You may choose to use both, but the Timer LED function
1447 will overrule the CPU usage LED.
1450 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1452 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1453 || MACH_OMAP_PERSEUS2
1456 If you say Y here, the red LED will be used to give a good real
1457 time indication of CPU usage, by lighting whenever the idle task
1458 is not currently executing.
1460 The LART uses the same LED for both Timer LED and CPU usage LED
1461 functions. You may choose to use both, but the Timer LED function
1462 will overrule the CPU usage LED.
1464 config ALIGNMENT_TRAP
1466 depends on CPU_CP15_MMU
1467 default y if !ARCH_EBSA110
1468 select HAVE_PROC_CPU if PROC_FS
1470 ARM processors cannot fetch/store information which is not
1471 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1472 address divisible by 4. On 32-bit ARM processors, these non-aligned
1473 fetch/store instructions will be emulated in software if you say
1474 here, which has a severe performance impact. This is necessary for
1475 correct operation of some network protocols. With an IP-only
1476 configuration it is safe to say N, otherwise say Y.
1478 config UACCESS_WITH_MEMCPY
1479 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1480 depends on MMU && EXPERIMENTAL
1481 default y if CPU_FEROCEON
1483 Implement faster copy_to_user and clear_user methods for CPU
1484 cores where a 8-word STM instruction give significantly higher
1485 memory write throughput than a sequence of individual 32bit stores.
1487 A possible side effect is a slight increase in scheduling latency
1488 between threads sharing the same address space if they invoke
1489 such copy operations with large buffers.
1491 However, if the CPU data cache is using a write-allocate mode,
1492 this option is unlikely to provide any performance gain.
1496 prompt "Enable seccomp to safely compute untrusted bytecode"
1498 This kernel feature is useful for number crunching applications
1499 that may need to compute untrusted bytecode during their
1500 execution. By using pipes or other transports made available to
1501 the process as file descriptors supporting the read/write
1502 syscalls, it's possible to isolate those applications in
1503 their own address space using seccomp. Once seccomp is
1504 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1505 and the task is only allowed to execute a few safe syscalls
1506 defined by each seccomp mode.
1508 config CC_STACKPROTECTOR
1509 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1511 This option turns on the -fstack-protector GCC feature. This
1512 feature puts, at the beginning of functions, a canary value on
1513 the stack just before the return address, and validates
1514 the value just before actually returning. Stack based buffer
1515 overflows (that need to overwrite this return address) now also
1516 overwrite the canary, which gets detected and the attack is then
1517 neutralized via a kernel panic.
1518 This feature requires gcc version 4.2 or above.
1520 config DEPRECATED_PARAM_STRUCT
1521 bool "Provide old way to pass kernel parameters"
1523 This was deprecated in 2001 and announced to live on for 5 years.
1524 Some old boot loaders still use this way.
1530 # Compressed boot loader in ROM. Yes, we really want to ask about
1531 # TEXT and BSS so we preserve their values in the config files.
1532 config ZBOOT_ROM_TEXT
1533 hex "Compressed ROM boot loader base address"
1536 The physical address at which the ROM-able zImage is to be
1537 placed in the target. Platforms which normally make use of
1538 ROM-able zImage formats normally set this to a suitable
1539 value in their defconfig file.
1541 If ZBOOT_ROM is not enabled, this has no effect.
1543 config ZBOOT_ROM_BSS
1544 hex "Compressed ROM boot loader BSS address"
1547 The base address of an area of read/write memory in the target
1548 for the ROM-able zImage which must be available while the
1549 decompressor is running. It must be large enough to hold the
1550 entire decompressed kernel plus an additional 128 KiB.
1551 Platforms which normally make use of ROM-able zImage formats
1552 normally set this to a suitable value in their defconfig file.
1554 If ZBOOT_ROM is not enabled, this has no effect.
1557 bool "Compressed boot loader in ROM/flash"
1558 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1560 Say Y here if you intend to execute your compressed kernel image
1561 (zImage) directly from ROM or flash. If unsure, say N.
1564 string "Default kernel command string"
1567 On some architectures (EBSA110 and CATS), there is currently no way
1568 for the boot loader to pass arguments to the kernel. For these
1569 architectures, you should supply some command-line options at build
1570 time by entering them here. As a minimum, you should specify the
1571 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1573 config CMDLINE_FORCE
1574 bool "Always use the default kernel command string"
1575 depends on CMDLINE != ""
1577 Always use the default kernel command string, even if the boot
1578 loader passes other arguments to the kernel.
1579 This is useful if you cannot or don't want to change the
1580 command-line options your boot loader passes to the kernel.
1585 bool "Kernel Execute-In-Place from ROM"
1586 depends on !ZBOOT_ROM
1588 Execute-In-Place allows the kernel to run from non-volatile storage
1589 directly addressable by the CPU, such as NOR flash. This saves RAM
1590 space since the text section of the kernel is not loaded from flash
1591 to RAM. Read-write sections, such as the data section and stack,
1592 are still copied to RAM. The XIP kernel is not compressed since
1593 it has to run directly from flash, so it will take more space to
1594 store it. The flash address used to link the kernel object files,
1595 and for storing it, is configuration dependent. Therefore, if you
1596 say Y here, you must know the proper physical address where to
1597 store the kernel image depending on your own flash memory usage.
1599 Also note that the make target becomes "make xipImage" rather than
1600 "make zImage" or "make Image". The final kernel binary to put in
1601 ROM memory will be arch/arm/boot/xipImage.
1605 config XIP_PHYS_ADDR
1606 hex "XIP Kernel Physical Location"
1607 depends on XIP_KERNEL
1608 default "0x00080000"
1610 This is the physical address in your flash memory the kernel will
1611 be linked for and stored to. This address is dependent on your
1615 bool "Kexec system call (EXPERIMENTAL)"
1616 depends on EXPERIMENTAL
1618 kexec is a system call that implements the ability to shutdown your
1619 current kernel, and to start another kernel. It is like a reboot
1620 but it is independent of the system firmware. And like a reboot
1621 you can start any kernel with it, not just Linux.
1623 It is an ongoing process to be certain the hardware in a machine
1624 is properly shutdown, so do not be surprised if this code does not
1625 initially work for you. It may help to enable device hotplugging
1629 bool "Export atags in procfs"
1633 Should the atags used to boot the kernel be exported in an "atags"
1634 file in procfs. Useful with kexec.
1636 config AUTO_ZRELADDR
1637 bool "Auto calculation of the decompressed kernel image address"
1638 depends on !ZBOOT_ROM && !ARCH_U300
1640 ZRELADDR is the physical address where the decompressed kernel
1641 image will be placed. If AUTO_ZRELADDR is selected, the address
1642 will be determined at run-time by masking the current IP with
1643 0xf8000000. This assumes the zImage being placed in the first 128MB
1644 from start of memory.
1648 menu "CPU Power Management"
1652 source "drivers/cpufreq/Kconfig"
1654 config CPU_FREQ_SA1100
1657 config CPU_FREQ_SA1110
1660 config CPU_FREQ_INTEGRATOR
1661 tristate "CPUfreq driver for ARM Integrator CPUs"
1662 depends on ARCH_INTEGRATOR && CPU_FREQ
1665 This enables the CPUfreq driver for ARM Integrator CPUs.
1667 For details, take a look at <file:Documentation/cpu-freq>.
1673 depends on CPU_FREQ && ARCH_PXA && PXA25x
1675 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1677 config CPU_FREQ_S3C64XX
1678 bool "CPUfreq support for Samsung S3C64XX CPUs"
1679 depends on CPU_FREQ && CPU_S3C6410
1684 Internal configuration node for common cpufreq on Samsung SoC
1686 config CPU_FREQ_S3C24XX
1687 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1688 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1691 This enables the CPUfreq driver for the Samsung S3C24XX family
1694 For details, take a look at <file:Documentation/cpu-freq>.
1698 config CPU_FREQ_S3C24XX_PLL
1699 bool "Support CPUfreq changing of PLL frequency"
1700 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1702 Compile in support for changing the PLL frequency from the
1703 S3C24XX series CPUfreq driver. The PLL takes time to settle
1704 after a frequency change, so by default it is not enabled.
1706 This also means that the PLL tables for the selected CPU(s) will
1707 be built which may increase the size of the kernel image.
1709 config CPU_FREQ_S3C24XX_DEBUG
1710 bool "Debug CPUfreq Samsung driver core"
1711 depends on CPU_FREQ_S3C24XX
1713 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1715 config CPU_FREQ_S3C24XX_IODEBUG
1716 bool "Debug CPUfreq Samsung driver IO timing"
1717 depends on CPU_FREQ_S3C24XX
1719 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1721 config CPU_FREQ_S3C24XX_DEBUGFS
1722 bool "Export debugfs for CPUFreq"
1723 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1725 Export status information via debugfs.
1729 source "drivers/cpuidle/Kconfig"
1733 menu "Floating point emulation"
1735 comment "At least one emulation must be selected"
1738 bool "NWFPE math emulation"
1739 depends on !AEABI || OABI_COMPAT
1741 Say Y to include the NWFPE floating point emulator in the kernel.
1742 This is necessary to run most binaries. Linux does not currently
1743 support floating point hardware so you need to say Y here even if
1744 your machine has an FPA or floating point co-processor podule.
1746 You may say N here if you are going to load the Acorn FPEmulator
1747 early in the bootup.
1750 bool "Support extended precision"
1751 depends on FPE_NWFPE
1753 Say Y to include 80-bit support in the kernel floating-point
1754 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1755 Note that gcc does not generate 80-bit operations by default,
1756 so in most cases this option only enlarges the size of the
1757 floating point emulator without any good reason.
1759 You almost surely want to say N here.
1762 bool "FastFPE math emulation (EXPERIMENTAL)"
1763 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1765 Say Y here to include the FAST floating point emulator in the kernel.
1766 This is an experimental much faster emulator which now also has full
1767 precision for the mantissa. It does not support any exceptions.
1768 It is very simple, and approximately 3-6 times faster than NWFPE.
1770 It should be sufficient for most programs. It may be not suitable
1771 for scientific calculations, but you have to check this for yourself.
1772 If you do not feel you need a faster FP emulation you should better
1776 bool "VFP-format floating point maths"
1777 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1779 Say Y to include VFP support code in the kernel. This is needed
1780 if your hardware includes a VFP unit.
1782 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1783 release notes and additional status information.
1785 Say N if your target does not have VFP hardware.
1793 bool "Advanced SIMD (NEON) Extension support"
1794 depends on VFPv3 && CPU_V7
1796 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1801 menu "Userspace binary formats"
1803 source "fs/Kconfig.binfmt"
1806 tristate "RISC OS personality"
1809 Say Y here to include the kernel code necessary if you want to run
1810 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1811 experimental; if this sounds frightening, say N and sleep in peace.
1812 You can also say M here to compile this support as a module (which
1813 will be called arthur).
1817 menu "Power management options"
1819 source "kernel/power/Kconfig"
1821 config ARCH_SUSPEND_POSSIBLE
1826 source "net/Kconfig"
1828 source "drivers/Kconfig"
1832 source "arch/arm/Kconfig.debug"
1834 source "security/Kconfig"
1836 source "crypto/Kconfig"
1838 source "lib/Kconfig"