2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
46 config ARCH_USES_GETTIMEOFFSET
50 config GENERIC_CLOCKEVENTS
53 config GENERIC_CLOCKEVENTS_BROADCAST
55 depends on GENERIC_CLOCKEVENTS
60 select GENERIC_ALLOCATOR
71 The Extended Industry Standard Architecture (EISA) bus was
72 developed as an open alternative to the IBM MicroChannel bus.
74 The EISA bus provided some of the features of the IBM MicroChannel
75 bus while maintaining backward compatibility with cards made for
76 the older ISA bus. The EISA bus saw limited use between 1988 and
77 1995 when it was made obsolete by the PCI bus.
79 Say Y here if you are building a kernel for an EISA-based machine.
89 MicroChannel Architecture is found in some IBM PS/2 machines and
90 laptops. It is a bus system similar to PCI or ISA. See
91 <file:Documentation/mca.txt> (and especially the web page given
92 there) before attempting to build an MCA bus kernel.
94 config GENERIC_HARDIRQS
98 config STACKTRACE_SUPPORT
102 config HAVE_LATENCYTOP_SUPPORT
107 config LOCKDEP_SUPPORT
111 config TRACE_IRQFLAGS_SUPPORT
115 config HARDIRQS_SW_RESEND
119 config GENERIC_IRQ_PROBE
123 config GENERIC_LOCKBREAK
126 depends on SMP && PREEMPT
128 config RWSEM_GENERIC_SPINLOCK
132 config RWSEM_XCHGADD_ALGORITHM
135 config ARCH_HAS_ILOG2_U32
138 config ARCH_HAS_ILOG2_U64
141 config ARCH_HAS_CPUFREQ
144 Internal node to signify that the ARCH has CPUFREQ support
145 and that the relevant menu configurations are displayed for
148 config GENERIC_HWEIGHT
152 config GENERIC_CALIBRATE_DELAY
156 config ARCH_MAY_HAVE_PC_FDC
162 config NEED_DMA_MAP_STATE
165 config GENERIC_ISA_DMA
174 config GENERIC_HARDIRQS_NO__DO_IRQ
177 config ARM_L1_CACHE_SHIFT_6
180 Setting ARM L1 cache line size to 64 Bytes.
184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
188 The base address of exception vectors.
190 source "init/Kconfig"
192 source "kernel/Kconfig.freezer"
197 bool "MMU-based Paged Memory Management Support"
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
204 # The "ARM system type" choice list is ordered alphabetically by option
205 # text. Please add new entries in the option alphabetic order.
208 prompt "ARM system type"
209 default ARCH_VERSATILE
212 bool "Agilent AAEC-2000 based"
216 select ARCH_USES_GETTIMEOFFSET
218 This enables support for systems based on the Agilent AAEC-2000
220 config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
223 select ARCH_HAS_CPUFREQ
226 select GENERIC_CLOCKEVENTS
227 select PLAT_VERSATILE
229 Support for ARM's Integrator platform.
232 bool "ARM Ltd. RealView family"
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
250 select GENERIC_CLOCKEVENTS
251 select ARCH_WANT_OPTIONAL_GPIOLIB
252 select PLAT_VERSATILE
253 select ARM_TIMER_SP804
255 This enables support for ARM Ltd Versatile board.
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_TIMER_SP804
263 select GENERIC_CLOCKEVENTS
266 select PLAT_VERSATILE
268 This enables support for the ARM Ltd Versatile Express boards.
272 select ARCH_REQUIRE_GPIOLIB
275 This enables support for systems based on the Atmel AT91RM9200,
276 AT91SAM9 and AT91CAP9 processors.
279 bool "Broadcom BCMRING"
284 select GENERIC_CLOCKEVENTS
285 select ARCH_WANT_OPTIONAL_GPIOLIB
287 Support for Broadcom's BCMRing platform.
290 bool "Cirrus Logic CLPS711x/EP721x-based"
292 select ARCH_USES_GETTIMEOFFSET
294 Support for Cirrus Logic 711x/721x based boards.
297 bool "Cavium Networks CNS3XXX family"
299 select GENERIC_CLOCKEVENTS
301 select PCI_DOMAINS if PCI
303 Support for Cavium Networks CNS3XXX platform.
306 bool "Cortina Systems Gemini"
308 select ARCH_REQUIRE_GPIOLIB
309 select ARCH_USES_GETTIMEOFFSET
311 Support for the Cortina Systems Gemini family SoCs
318 select ARCH_USES_GETTIMEOFFSET
320 This is an evaluation board for the StrongARM processor available
321 from Digital. It has limited hardware on-board, including an
322 Ethernet interface, two PCMCIA sockets, two serial ports and a
331 select ARCH_REQUIRE_GPIOLIB
332 select ARCH_HAS_HOLES_MEMORYMODEL
333 select ARCH_USES_GETTIMEOFFSET
335 This enables support for the Cirrus EP93xx series of CPUs.
337 config ARCH_FOOTBRIDGE
341 select ARCH_USES_GETTIMEOFFSET
343 Support for systems based on the DC21285 companion chip
344 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
347 bool "Freescale MXC/iMX-based"
348 select GENERIC_CLOCKEVENTS
349 select ARCH_REQUIRE_GPIOLIB
352 Support for Freescale MXC/iMX-based family of processors
355 bool "Freescale STMP3xxx"
358 select ARCH_REQUIRE_GPIOLIB
359 select GENERIC_CLOCKEVENTS
360 select USB_ARCH_HAS_EHCI
362 Support for systems based on the Freescale 3xxx CPUs.
365 bool "Hilscher NetX based"
368 select GENERIC_CLOCKEVENTS
370 This enables support for systems based on the Hilscher NetX Soc
373 bool "Hynix HMS720x-based"
376 select ARCH_USES_GETTIMEOFFSET
378 This enables support for systems based on the Hynix HMS720x
386 select ARCH_SUPPORTS_MSI
389 Support for Intel's IOP13XX (XScale) family of processors.
397 select ARCH_REQUIRE_GPIOLIB
399 Support for Intel's 80219 and IOP32X (XScale) family of
408 select ARCH_REQUIRE_GPIOLIB
410 Support for Intel's IOP33X (XScale) family of processors.
417 select ARCH_USES_GETTIMEOFFSET
419 Support for Intel's IXP23xx (XScale) family of processors.
422 bool "IXP2400/2800-based"
426 select ARCH_USES_GETTIMEOFFSET
428 Support for Intel's IXP2400/2800 (XScale) family of processors.
435 select GENERIC_CLOCKEVENTS
436 select DMABOUNCE if PCI
438 Support for Intel's IXP4XX (XScale) family of processors.
443 select ARCH_REQUIRE_GPIOLIB
444 select GENERIC_CLOCKEVENTS
447 Support for the Marvell Dove SoC 88AP510
450 bool "Marvell Kirkwood"
453 select ARCH_REQUIRE_GPIOLIB
454 select GENERIC_CLOCKEVENTS
457 Support for the following Marvell Kirkwood series SoCs:
458 88F6180, 88F6192 and 88F6281.
461 bool "Marvell Loki (88RC8480)"
463 select GENERIC_CLOCKEVENTS
466 Support for the Marvell Loki (88RC8480) SoC.
471 select ARCH_REQUIRE_GPIOLIB
474 select USB_ARCH_HAS_OHCI
477 select GENERIC_CLOCKEVENTS
479 Support for the NXP LPC32XX family of processors
482 bool "Marvell MV78xx0"
485 select ARCH_REQUIRE_GPIOLIB
486 select GENERIC_CLOCKEVENTS
489 Support for the following Marvell MV78xx0 series SoCs:
497 select ARCH_REQUIRE_GPIOLIB
498 select GENERIC_CLOCKEVENTS
501 Support for the following Marvell Orion 5x series SoCs:
502 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
503 Orion-2 (5281), Orion-1-90 (6183).
506 bool "Marvell PXA168/910/MMP2"
508 select ARCH_REQUIRE_GPIOLIB
510 select GENERIC_CLOCKEVENTS
515 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
518 bool "Micrel/Kendin KS8695"
520 select ARCH_REQUIRE_GPIOLIB
521 select ARCH_USES_GETTIMEOFFSET
523 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524 System-on-Chip devices.
527 bool "NetSilicon NS9xxx"
530 select GENERIC_CLOCKEVENTS
533 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
536 <http://www.digi.com/products/microprocessors/index.jsp>
539 bool "Nuvoton W90X900 CPU"
541 select ARCH_REQUIRE_GPIOLIB
543 select GENERIC_CLOCKEVENTS
545 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546 At present, the w90x900 has been renamed nuc900, regarding
547 the ARM series product line, you can login the following
548 link address to know more.
550 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
554 bool "Nuvoton NUC93X CPU"
558 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559 low-power and high performance MPEG-4/JPEG multimedia controller chip.
564 select GENERIC_CLOCKEVENTS
568 select ARCH_HAS_BARRIERS if CACHE_L2X0
570 This enables support for NVIDIA Tegra based systems (Tegra APX,
571 Tegra 6xx and Tegra 2 series).
574 bool "Philips Nexperia PNX4008 Mobile"
577 select ARCH_USES_GETTIMEOFFSET
579 This enables support for Philips PNX4008 mobile platform.
582 bool "PXA2xx/PXA3xx-based"
585 select ARCH_HAS_CPUFREQ
587 select ARCH_REQUIRE_GPIOLIB
588 select GENERIC_CLOCKEVENTS
593 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
598 select GENERIC_CLOCKEVENTS
599 select ARCH_REQUIRE_GPIOLIB
601 Support for Qualcomm MSM/QSD based systems. This runs on the
602 apps processor of the MSM/QSD and depends on a shared memory
603 interface to the modem processor which runs the baseband
604 stack and controls some vital subsystems
605 (clock and power control, etc).
608 bool "Renesas SH-Mobile"
610 Support for Renesas's SH-Mobile ARM platforms
617 select ARCH_MAY_HAVE_PC_FDC
618 select HAVE_PATA_PLATFORM
621 select ARCH_SPARSEMEM_ENABLE
622 select ARCH_USES_GETTIMEOFFSET
624 On the Acorn Risc-PC, Linux can support the internal IDE disk and
625 CD-ROM interface, serial and parallel port, and the floppy drive.
631 select ARCH_SPARSEMEM_ENABLE
633 select ARCH_HAS_CPUFREQ
635 select GENERIC_CLOCKEVENTS
638 select ARCH_REQUIRE_GPIOLIB
640 Support for StrongARM 11x0 based boards.
643 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
645 select ARCH_HAS_CPUFREQ
647 select ARCH_USES_GETTIMEOFFSET
648 select HAVE_S3C2410_I2C
650 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
651 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
652 the Samsung SMDK2410 development board (and derivatives).
654 Note, the S3C2416 and the S3C2450 are so close that they even share
655 the same SoC ID code. This means that there is no seperate machine
656 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
659 bool "Samsung S3C64XX"
665 select ARCH_USES_GETTIMEOFFSET
666 select ARCH_HAS_CPUFREQ
667 select ARCH_REQUIRE_GPIOLIB
668 select SAMSUNG_CLKSRC
669 select SAMSUNG_IRQ_VIC_TIMER
670 select SAMSUNG_IRQ_UART
671 select S3C_GPIO_TRACK
672 select S3C_GPIO_PULL_UPDOWN
673 select S3C_GPIO_CFG_S3C24XX
674 select S3C_GPIO_CFG_S3C64XX
676 select USB_ARCH_HAS_OHCI
677 select SAMSUNG_GPIOLIB_4BIT
678 select HAVE_S3C2410_I2C
679 select HAVE_S3C2410_WATCHDOG
681 Samsung S3C64XX series based systems
684 bool "Samsung S5P6440"
688 select HAVE_S3C2410_WATCHDOG
689 select ARCH_USES_GETTIMEOFFSET
690 select HAVE_S3C2410_I2C
693 Samsung S5P6440 CPU based systems
696 bool "Samsung S5P6442"
700 select ARCH_USES_GETTIMEOFFSET
701 select HAVE_S3C2410_WATCHDOG
703 Samsung S5P6442 CPU based systems
706 bool "Samsung S5PC100"
710 select ARM_L1_CACHE_SHIFT_6
711 select ARCH_USES_GETTIMEOFFSET
712 select HAVE_S3C2410_I2C
714 select HAVE_S3C2410_WATCHDOG
716 Samsung S5PC100 series based systems
719 bool "Samsung S5PV210/S5PC110"
723 select ARM_L1_CACHE_SHIFT_6
724 select ARCH_USES_GETTIMEOFFSET
725 select HAVE_S3C2410_I2C
727 select HAVE_S3C2410_WATCHDOG
729 Samsung S5PV210/S5PC110 series based systems
732 bool "Samsung S5PV310/S5PC210"
736 select GENERIC_CLOCKEVENTS
738 Samsung S5PV310 series based systems
747 select ARCH_USES_GETTIMEOFFSET
749 Support for the StrongARM based Digital DNARD machine, also known
750 as "Shark" (<http://www.shark-linux.de/shark.html>).
753 bool "Telechips TCC ARM926-based systems"
757 select GENERIC_CLOCKEVENTS
759 Support for Telechips TCC ARM926-based systems.
764 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
765 select ARCH_USES_GETTIMEOFFSET
767 Say Y here for systems based on one of the Sharp LH7A40X
768 System on a Chip processors. These CPUs include an ARM922T
769 core with a wide array of integrated devices for
770 hand-held and low-power applications.
773 bool "ST-Ericsson U300 Series"
779 select GENERIC_CLOCKEVENTS
783 Support for ST-Ericsson U300 series mobile platforms.
786 bool "ST-Ericsson U8500 Series"
789 select GENERIC_CLOCKEVENTS
791 select ARCH_REQUIRE_GPIOLIB
793 Support for ST-Ericsson's Ux500 architecture
796 bool "STMicroelectronics Nomadik"
801 select GENERIC_CLOCKEVENTS
802 select ARCH_REQUIRE_GPIOLIB
804 Support for the Nomadik platform by ST-Ericsson
808 select GENERIC_CLOCKEVENTS
809 select ARCH_REQUIRE_GPIOLIB
813 select GENERIC_ALLOCATOR
814 select ARCH_HAS_HOLES_MEMORYMODEL
816 Support for TI's DaVinci platform.
821 select ARCH_REQUIRE_GPIOLIB
822 select ARCH_HAS_CPUFREQ
823 select GENERIC_CLOCKEVENTS
824 select ARCH_HAS_HOLES_MEMORYMODEL
826 Support for TI's OMAP platform (OMAP1 and OMAP2).
831 select ARCH_REQUIRE_GPIOLIB
833 select GENERIC_CLOCKEVENTS
836 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
841 # This is sorted alphabetically by mach-* pathname. However, plat-*
842 # Kconfigs may be included either alphabetically (according to the
843 # plat- suffix) or along side the corresponding mach-* source.
845 source "arch/arm/mach-aaec2000/Kconfig"
847 source "arch/arm/mach-at91/Kconfig"
849 source "arch/arm/mach-bcmring/Kconfig"
851 source "arch/arm/mach-clps711x/Kconfig"
853 source "arch/arm/mach-cns3xxx/Kconfig"
855 source "arch/arm/mach-davinci/Kconfig"
857 source "arch/arm/mach-dove/Kconfig"
859 source "arch/arm/mach-ep93xx/Kconfig"
861 source "arch/arm/mach-footbridge/Kconfig"
863 source "arch/arm/mach-gemini/Kconfig"
865 source "arch/arm/mach-h720x/Kconfig"
867 source "arch/arm/mach-integrator/Kconfig"
869 source "arch/arm/mach-iop32x/Kconfig"
871 source "arch/arm/mach-iop33x/Kconfig"
873 source "arch/arm/mach-iop13xx/Kconfig"
875 source "arch/arm/mach-ixp4xx/Kconfig"
877 source "arch/arm/mach-ixp2000/Kconfig"
879 source "arch/arm/mach-ixp23xx/Kconfig"
881 source "arch/arm/mach-kirkwood/Kconfig"
883 source "arch/arm/mach-ks8695/Kconfig"
885 source "arch/arm/mach-lh7a40x/Kconfig"
887 source "arch/arm/mach-loki/Kconfig"
889 source "arch/arm/mach-lpc32xx/Kconfig"
891 source "arch/arm/mach-msm/Kconfig"
893 source "arch/arm/mach-mv78xx0/Kconfig"
895 source "arch/arm/plat-mxc/Kconfig"
897 source "arch/arm/mach-netx/Kconfig"
899 source "arch/arm/mach-nomadik/Kconfig"
900 source "arch/arm/plat-nomadik/Kconfig"
902 source "arch/arm/mach-ns9xxx/Kconfig"
904 source "arch/arm/mach-nuc93x/Kconfig"
906 source "arch/arm/plat-omap/Kconfig"
908 source "arch/arm/mach-omap1/Kconfig"
910 source "arch/arm/mach-omap2/Kconfig"
912 source "arch/arm/mach-orion5x/Kconfig"
914 source "arch/arm/mach-pxa/Kconfig"
915 source "arch/arm/plat-pxa/Kconfig"
917 source "arch/arm/mach-mmp/Kconfig"
919 source "arch/arm/mach-realview/Kconfig"
921 source "arch/arm/mach-sa1100/Kconfig"
923 source "arch/arm/plat-samsung/Kconfig"
924 source "arch/arm/plat-s3c24xx/Kconfig"
925 source "arch/arm/plat-s5p/Kconfig"
927 source "arch/arm/plat-spear/Kconfig"
929 source "arch/arm/plat-tcc/Kconfig"
932 source "arch/arm/mach-s3c2400/Kconfig"
933 source "arch/arm/mach-s3c2410/Kconfig"
934 source "arch/arm/mach-s3c2412/Kconfig"
935 source "arch/arm/mach-s3c2416/Kconfig"
936 source "arch/arm/mach-s3c2440/Kconfig"
937 source "arch/arm/mach-s3c2443/Kconfig"
941 source "arch/arm/mach-s3c64xx/Kconfig"
944 source "arch/arm/mach-s5p6440/Kconfig"
946 source "arch/arm/mach-s5p6442/Kconfig"
948 source "arch/arm/mach-s5pc100/Kconfig"
950 source "arch/arm/mach-s5pv210/Kconfig"
952 source "arch/arm/mach-s5pv310/Kconfig"
954 source "arch/arm/mach-shmobile/Kconfig"
956 source "arch/arm/plat-stmp3xxx/Kconfig"
958 source "arch/arm/mach-tegra/Kconfig"
960 source "arch/arm/mach-u300/Kconfig"
962 source "arch/arm/mach-ux500/Kconfig"
964 source "arch/arm/mach-versatile/Kconfig"
966 source "arch/arm/mach-vexpress/Kconfig"
968 source "arch/arm/mach-w90x900/Kconfig"
970 # Definitions to make life easier
976 select GENERIC_CLOCKEVENTS
984 config PLAT_VERSATILE
987 config ARM_TIMER_SP804
990 source arch/arm/mm/Kconfig
993 bool "Enable iWMMXt support"
994 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
995 default y if PXA27x || PXA3xx || ARCH_MMP
997 Enable support for iWMMXt context switching at run time if
998 running on a CPU that supports it.
1000 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1003 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1007 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1008 (!ARCH_OMAP3 || OMAP3_EMU)
1013 source "arch/arm/Kconfig-nommu"
1016 config ARM_ERRATA_411920
1017 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1018 depends on CPU_V6 && !SMP
1020 Invalidation of the Instruction Cache operation can
1021 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1022 It does not affect the MPCore. This option enables the ARM Ltd.
1023 recommended workaround.
1025 config ARM_ERRATA_430973
1026 bool "ARM errata: Stale prediction on replaced interworking branch"
1029 This option enables the workaround for the 430973 Cortex-A8
1030 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1031 interworking branch is replaced with another code sequence at the
1032 same virtual address, whether due to self-modifying code or virtual
1033 to physical address re-mapping, Cortex-A8 does not recover from the
1034 stale interworking branch prediction. This results in Cortex-A8
1035 executing the new code sequence in the incorrect ARM or Thumb state.
1036 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1037 and also flushes the branch target cache at every context switch.
1038 Note that setting specific bits in the ACTLR register may not be
1039 available in non-secure mode.
1041 config ARM_ERRATA_458693
1042 bool "ARM errata: Processor deadlock when a false hazard is created"
1045 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1046 erratum. For very specific sequences of memory operations, it is
1047 possible for a hazard condition intended for a cache line to instead
1048 be incorrectly associated with a different cache line. This false
1049 hazard might then cause a processor deadlock. The workaround enables
1050 the L1 caching of the NEON accesses and disables the PLD instruction
1051 in the ACTLR register. Note that setting specific bits in the ACTLR
1052 register may not be available in non-secure mode.
1054 config ARM_ERRATA_460075
1055 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1058 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1059 erratum. Any asynchronous access to the L2 cache may encounter a
1060 situation in which recent store transactions to the L2 cache are lost
1061 and overwritten with stale memory contents from external memory. The
1062 workaround disables the write-allocate mode for the L2 cache via the
1063 ACTLR register. Note that setting specific bits in the ACTLR register
1064 may not be available in non-secure mode.
1066 config ARM_ERRATA_742230
1067 bool "ARM errata: DMB operation may be faulty"
1068 depends on CPU_V7 && SMP
1070 This option enables the workaround for the 742230 Cortex-A9
1071 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1072 between two write operations may not ensure the correct visibility
1073 ordering of the two writes. This workaround sets a specific bit in
1074 the diagnostic register of the Cortex-A9 which causes the DMB
1075 instruction to behave as a DSB, ensuring the correct behaviour of
1078 config ARM_ERRATA_742231
1079 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1080 depends on CPU_V7 && SMP
1082 This option enables the workaround for the 742231 Cortex-A9
1083 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1084 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1085 accessing some data located in the same cache line, may get corrupted
1086 data due to bad handling of the address hazard when the line gets
1087 replaced from one of the CPUs at the same time as another CPU is
1088 accessing it. This workaround sets specific bits in the diagnostic
1089 register of the Cortex-A9 which reduces the linefill issuing
1090 capabilities of the processor.
1092 config PL310_ERRATA_588369
1093 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1094 depends on CACHE_L2X0 && ARCH_OMAP4
1096 The PL310 L2 cache controller implements three types of Clean &
1097 Invalidate maintenance operations: by Physical Address
1098 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1099 They are architecturally defined to behave as the execution of a
1100 clean operation followed immediately by an invalidate operation,
1101 both performing to the same memory location. This functionality
1102 is not correctly implemented in PL310 as clean lines are not
1103 invalidated as a result of these operations. Note that this errata
1104 uses Texas Instrument's secure monitor api.
1106 config ARM_ERRATA_720789
1107 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1108 depends on CPU_V7 && SMP
1110 This option enables the workaround for the 720789 Cortex-A9 (prior to
1111 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1112 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1113 As a consequence of this erratum, some TLB entries which should be
1114 invalidated are not, resulting in an incoherency in the system page
1115 tables. The workaround changes the TLB flushing routines to invalidate
1116 entries regardless of the ASID.
1119 source "arch/arm/common/Kconfig"
1129 Find out whether you have ISA slots on your motherboard. ISA is the
1130 name of a bus system, i.e. the way the CPU talks to the other stuff
1131 inside your box. Other bus systems are PCI, EISA, MicroChannel
1132 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1133 newer boards don't support it. If you have ISA, say Y, otherwise N.
1135 # Select ISA DMA controller support
1140 # Select ISA DMA interface
1145 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1147 Find out whether you have a PCI motherboard. PCI is the name of a
1148 bus system, i.e. the way the CPU talks to the other stuff inside
1149 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1150 VESA. If you have PCI, say Y, otherwise N.
1159 # Select the host bridge type
1160 config PCI_HOST_VIA82C505
1162 depends on PCI && ARCH_SHARK
1165 config PCI_HOST_ITE8152
1167 depends on PCI && MACH_ARMCORE
1171 source "drivers/pci/Kconfig"
1173 source "drivers/pcmcia/Kconfig"
1177 menu "Kernel Features"
1179 source "kernel/time/Kconfig"
1182 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1183 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1184 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1185 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1186 depends on GENERIC_CLOCKEVENTS
1187 select USE_GENERIC_SMP_HELPERS
1188 select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
1189 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1191 This enables support for systems with more than one CPU. If you have
1192 a system with only one CPU, like most personal computers, say N. If
1193 you have a system with more than one CPU, say Y.
1195 If you say N here, the kernel will run on single and multiprocessor
1196 machines, but will use only one CPU of a multiprocessor machine. If
1197 you say Y here, the kernel will run on many, but not all, single
1198 processor machines. On a single processor machine, the kernel will
1199 run faster if you say N here.
1201 See also <file:Documentation/i386/IO-APIC.txt>,
1202 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1203 <http://www.linuxdoc.org/docs.html#howto>.
1205 If you don't know what to do here, say N.
1211 This option enables support for the ARM system coherency unit
1217 This options enables support for the ARM timer and watchdog unit
1220 prompt "Memory split"
1223 Select the desired split between kernel and user memory.
1225 If you are not absolutely sure what you are doing, leave this
1229 bool "3G/1G user/kernel split"
1231 bool "2G/2G user/kernel split"
1233 bool "1G/3G user/kernel split"
1238 default 0x40000000 if VMSPLIT_1G
1239 default 0x80000000 if VMSPLIT_2G
1243 int "Maximum number of CPUs (2-32)"
1249 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1250 depends on SMP && HOTPLUG && EXPERIMENTAL
1252 Say Y here to experiment with turning CPUs off and on. CPUs
1253 can be controlled through /sys/devices/system/cpu.
1256 bool "Use local timer interrupts"
1257 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1258 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1259 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1261 select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
1262 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
1264 Enable support for local timers on SMP platforms, rather then the
1265 legacy IPI broadcast method. Local timers allows the system
1266 accounting to be spread across the timer interval, preventing a
1267 "thundering herd" at every timer tick.
1269 source kernel/Kconfig.preempt
1273 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1274 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1275 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1276 default AT91_TIMER_HZ if ARCH_AT91
1277 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1280 config THUMB2_KERNEL
1281 bool "Compile the kernel in Thumb-2 mode"
1282 depends on CPU_V7 && EXPERIMENTAL
1284 select ARM_ASM_UNIFIED
1286 By enabling this option, the kernel will be compiled in
1287 Thumb-2 mode. A compiler/assembler that understand the unified
1288 ARM-Thumb syntax is needed.
1292 config ARM_ASM_UNIFIED
1296 bool "Use the ARM EABI to compile the kernel"
1298 This option allows for the kernel to be compiled using the latest
1299 ARM ABI (aka EABI). This is only useful if you are using a user
1300 space environment that is also compiled with EABI.
1302 Since there are major incompatibilities between the legacy ABI and
1303 EABI, especially with regard to structure member alignment, this
1304 option also changes the kernel syscall calling convention to
1305 disambiguate both ABIs and allow for backward compatibility support
1306 (selected with CONFIG_OABI_COMPAT).
1308 To use this you need GCC version 4.0.0 or later.
1311 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1312 depends on AEABI && EXPERIMENTAL
1315 This option preserves the old syscall interface along with the
1316 new (ARM EABI) one. It also provides a compatibility layer to
1317 intercept syscalls that have structure arguments which layout
1318 in memory differs between the legacy ABI and the new ARM EABI
1319 (only for non "thumb" binaries). This option adds a tiny
1320 overhead to all syscalls and produces a slightly larger kernel.
1321 If you know you'll be using only pure EABI user space then you
1322 can say N here. If this option is not selected and you attempt
1323 to execute a legacy ABI binary then the result will be
1324 UNPREDICTABLE (in fact it can be predicted that it won't work
1325 at all). If in doubt say Y.
1327 config ARCH_HAS_HOLES_MEMORYMODEL
1330 config ARCH_SPARSEMEM_ENABLE
1333 config ARCH_SPARSEMEM_DEFAULT
1334 def_bool ARCH_SPARSEMEM_ENABLE
1336 config ARCH_SELECT_MEMORY_MODEL
1337 def_bool ARCH_SPARSEMEM_ENABLE
1340 bool "High Memory Support (EXPERIMENTAL)"
1341 depends on MMU && EXPERIMENTAL
1343 The address space of ARM processors is only 4 Gigabytes large
1344 and it has to accommodate user address space, kernel address
1345 space as well as some memory mapped IO. That means that, if you
1346 have a large amount of physical memory and/or IO, not all of the
1347 memory can be "permanently mapped" by the kernel. The physical
1348 memory that is not permanently mapped is called "high memory".
1350 Depending on the selected kernel/user memory split, minimum
1351 vmalloc space and actual amount of RAM, you may not need this
1352 option which should result in a slightly faster kernel.
1357 bool "Allocate 2nd-level pagetables from highmem"
1359 depends on !OUTER_CACHE
1361 config HW_PERF_EVENTS
1362 bool "Enable hardware performance counter support for perf events"
1363 depends on PERF_EVENTS && CPU_HAS_PMU
1366 Enable hardware performance counter support for perf events. If
1367 disabled, perf events will use software events only.
1372 This enables support for sparse irqs. This is useful in general
1373 as most CPUs have a fairly sparse array of IRQ vectors, which
1374 the irq_desc then maps directly on to. Systems with a high
1375 number of off-chip IRQs will want to treat this as
1376 experimental until they have been independently verified.
1380 config FORCE_MAX_ZONEORDER
1381 int "Maximum zone order" if ARCH_SHMOBILE
1382 range 11 64 if ARCH_SHMOBILE
1383 default "9" if SA1111
1386 The kernel memory allocator divides physically contiguous memory
1387 blocks into "zones", where each zone is a power of two number of
1388 pages. This option selects the largest power of two that the kernel
1389 keeps in the memory allocator. If you need to allocate very large
1390 blocks of physically contiguous memory, then you may need to
1391 increase this value.
1393 This config option is actually maximum order plus one. For example,
1394 a value of 11 means that the largest free memory block is 2^10 pages.
1397 bool "Timer and CPU usage LEDs"
1398 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1399 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1400 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1401 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1402 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1403 ARCH_AT91 || ARCH_DAVINCI || \
1404 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1406 If you say Y here, the LEDs on your machine will be used
1407 to provide useful information about your current system status.
1409 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1410 be able to select which LEDs are active using the options below. If
1411 you are compiling a kernel for the EBSA-110 or the LART however, the
1412 red LED will simply flash regularly to indicate that the system is
1413 still functional. It is safe to say Y here if you have a CATS
1414 system, but the driver will do nothing.
1417 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1418 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1419 || MACH_OMAP_PERSEUS2
1421 depends on !GENERIC_CLOCKEVENTS
1422 default y if ARCH_EBSA110
1424 If you say Y here, one of the system LEDs (the green one on the
1425 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1426 will flash regularly to indicate that the system is still
1427 operational. This is mainly useful to kernel hackers who are
1428 debugging unstable kernels.
1430 The LART uses the same LED for both Timer LED and CPU usage LED
1431 functions. You may choose to use both, but the Timer LED function
1432 will overrule the CPU usage LED.
1435 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1437 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1438 || MACH_OMAP_PERSEUS2
1441 If you say Y here, the red LED will be used to give a good real
1442 time indication of CPU usage, by lighting whenever the idle task
1443 is not currently executing.
1445 The LART uses the same LED for both Timer LED and CPU usage LED
1446 functions. You may choose to use both, but the Timer LED function
1447 will overrule the CPU usage LED.
1449 config ALIGNMENT_TRAP
1451 depends on CPU_CP15_MMU
1452 default y if !ARCH_EBSA110
1453 select HAVE_PROC_CPU if PROC_FS
1455 ARM processors cannot fetch/store information which is not
1456 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1457 address divisible by 4. On 32-bit ARM processors, these non-aligned
1458 fetch/store instructions will be emulated in software if you say
1459 here, which has a severe performance impact. This is necessary for
1460 correct operation of some network protocols. With an IP-only
1461 configuration it is safe to say N, otherwise say Y.
1463 config UACCESS_WITH_MEMCPY
1464 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1465 depends on MMU && EXPERIMENTAL
1466 default y if CPU_FEROCEON
1468 Implement faster copy_to_user and clear_user methods for CPU
1469 cores where a 8-word STM instruction give significantly higher
1470 memory write throughput than a sequence of individual 32bit stores.
1472 A possible side effect is a slight increase in scheduling latency
1473 between threads sharing the same address space if they invoke
1474 such copy operations with large buffers.
1476 However, if the CPU data cache is using a write-allocate mode,
1477 this option is unlikely to provide any performance gain.
1481 prompt "Enable seccomp to safely compute untrusted bytecode"
1483 This kernel feature is useful for number crunching applications
1484 that may need to compute untrusted bytecode during their
1485 execution. By using pipes or other transports made available to
1486 the process as file descriptors supporting the read/write
1487 syscalls, it's possible to isolate those applications in
1488 their own address space using seccomp. Once seccomp is
1489 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1490 and the task is only allowed to execute a few safe syscalls
1491 defined by each seccomp mode.
1493 config CC_STACKPROTECTOR
1494 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1496 This option turns on the -fstack-protector GCC feature. This
1497 feature puts, at the beginning of functions, a canary value on
1498 the stack just before the return address, and validates
1499 the value just before actually returning. Stack based buffer
1500 overflows (that need to overwrite this return address) now also
1501 overwrite the canary, which gets detected and the attack is then
1502 neutralized via a kernel panic.
1503 This feature requires gcc version 4.2 or above.
1505 config DEPRECATED_PARAM_STRUCT
1506 bool "Provide old way to pass kernel parameters"
1508 This was deprecated in 2001 and announced to live on for 5 years.
1509 Some old boot loaders still use this way.
1515 # Compressed boot loader in ROM. Yes, we really want to ask about
1516 # TEXT and BSS so we preserve their values in the config files.
1517 config ZBOOT_ROM_TEXT
1518 hex "Compressed ROM boot loader base address"
1521 The physical address at which the ROM-able zImage is to be
1522 placed in the target. Platforms which normally make use of
1523 ROM-able zImage formats normally set this to a suitable
1524 value in their defconfig file.
1526 If ZBOOT_ROM is not enabled, this has no effect.
1528 config ZBOOT_ROM_BSS
1529 hex "Compressed ROM boot loader BSS address"
1532 The base address of an area of read/write memory in the target
1533 for the ROM-able zImage which must be available while the
1534 decompressor is running. It must be large enough to hold the
1535 entire decompressed kernel plus an additional 128 KiB.
1536 Platforms which normally make use of ROM-able zImage formats
1537 normally set this to a suitable value in their defconfig file.
1539 If ZBOOT_ROM is not enabled, this has no effect.
1542 bool "Compressed boot loader in ROM/flash"
1543 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1545 Say Y here if you intend to execute your compressed kernel image
1546 (zImage) directly from ROM or flash. If unsure, say N.
1549 string "Default kernel command string"
1552 On some architectures (EBSA110 and CATS), there is currently no way
1553 for the boot loader to pass arguments to the kernel. For these
1554 architectures, you should supply some command-line options at build
1555 time by entering them here. As a minimum, you should specify the
1556 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1558 config CMDLINE_FORCE
1559 bool "Always use the default kernel command string"
1560 depends on CMDLINE != ""
1562 Always use the default kernel command string, even if the boot
1563 loader passes other arguments to the kernel.
1564 This is useful if you cannot or don't want to change the
1565 command-line options your boot loader passes to the kernel.
1570 bool "Kernel Execute-In-Place from ROM"
1571 depends on !ZBOOT_ROM
1573 Execute-In-Place allows the kernel to run from non-volatile storage
1574 directly addressable by the CPU, such as NOR flash. This saves RAM
1575 space since the text section of the kernel is not loaded from flash
1576 to RAM. Read-write sections, such as the data section and stack,
1577 are still copied to RAM. The XIP kernel is not compressed since
1578 it has to run directly from flash, so it will take more space to
1579 store it. The flash address used to link the kernel object files,
1580 and for storing it, is configuration dependent. Therefore, if you
1581 say Y here, you must know the proper physical address where to
1582 store the kernel image depending on your own flash memory usage.
1584 Also note that the make target becomes "make xipImage" rather than
1585 "make zImage" or "make Image". The final kernel binary to put in
1586 ROM memory will be arch/arm/boot/xipImage.
1590 config XIP_PHYS_ADDR
1591 hex "XIP Kernel Physical Location"
1592 depends on XIP_KERNEL
1593 default "0x00080000"
1595 This is the physical address in your flash memory the kernel will
1596 be linked for and stored to. This address is dependent on your
1600 bool "Kexec system call (EXPERIMENTAL)"
1601 depends on EXPERIMENTAL
1603 kexec is a system call that implements the ability to shutdown your
1604 current kernel, and to start another kernel. It is like a reboot
1605 but it is independent of the system firmware. And like a reboot
1606 you can start any kernel with it, not just Linux.
1608 It is an ongoing process to be certain the hardware in a machine
1609 is properly shutdown, so do not be surprised if this code does not
1610 initially work for you. It may help to enable device hotplugging
1614 bool "Export atags in procfs"
1618 Should the atags used to boot the kernel be exported in an "atags"
1619 file in procfs. Useful with kexec.
1621 config AUTO_ZRELADDR
1622 bool "Auto calculation of the decompressed kernel image address"
1623 depends on !ZBOOT_ROM && !ARCH_U300
1625 ZRELADDR is the physical address where the decompressed kernel
1626 image will be placed. If AUTO_ZRELADDR is selected, the address
1627 will be determined at run-time by masking the current IP with
1628 0xf8000000. This assumes the zImage being placed in the first 128MB
1629 from start of memory.
1633 menu "CPU Power Management"
1637 source "drivers/cpufreq/Kconfig"
1639 config CPU_FREQ_SA1100
1642 config CPU_FREQ_SA1110
1645 config CPU_FREQ_INTEGRATOR
1646 tristate "CPUfreq driver for ARM Integrator CPUs"
1647 depends on ARCH_INTEGRATOR && CPU_FREQ
1650 This enables the CPUfreq driver for ARM Integrator CPUs.
1652 For details, take a look at <file:Documentation/cpu-freq>.
1658 depends on CPU_FREQ && ARCH_PXA && PXA25x
1660 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1662 config CPU_FREQ_S3C64XX
1663 bool "CPUfreq support for Samsung S3C64XX CPUs"
1664 depends on CPU_FREQ && CPU_S3C6410
1669 Internal configuration node for common cpufreq on Samsung SoC
1671 config CPU_FREQ_S3C24XX
1672 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1673 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1676 This enables the CPUfreq driver for the Samsung S3C24XX family
1679 For details, take a look at <file:Documentation/cpu-freq>.
1683 config CPU_FREQ_S3C24XX_PLL
1684 bool "Support CPUfreq changing of PLL frequency"
1685 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1687 Compile in support for changing the PLL frequency from the
1688 S3C24XX series CPUfreq driver. The PLL takes time to settle
1689 after a frequency change, so by default it is not enabled.
1691 This also means that the PLL tables for the selected CPU(s) will
1692 be built which may increase the size of the kernel image.
1694 config CPU_FREQ_S3C24XX_DEBUG
1695 bool "Debug CPUfreq Samsung driver core"
1696 depends on CPU_FREQ_S3C24XX
1698 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1700 config CPU_FREQ_S3C24XX_IODEBUG
1701 bool "Debug CPUfreq Samsung driver IO timing"
1702 depends on CPU_FREQ_S3C24XX
1704 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1706 config CPU_FREQ_S3C24XX_DEBUGFS
1707 bool "Export debugfs for CPUFreq"
1708 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1710 Export status information via debugfs.
1714 source "drivers/cpuidle/Kconfig"
1718 menu "Floating point emulation"
1720 comment "At least one emulation must be selected"
1723 bool "NWFPE math emulation"
1724 depends on !AEABI || OABI_COMPAT
1726 Say Y to include the NWFPE floating point emulator in the kernel.
1727 This is necessary to run most binaries. Linux does not currently
1728 support floating point hardware so you need to say Y here even if
1729 your machine has an FPA or floating point co-processor podule.
1731 You may say N here if you are going to load the Acorn FPEmulator
1732 early in the bootup.
1735 bool "Support extended precision"
1736 depends on FPE_NWFPE
1738 Say Y to include 80-bit support in the kernel floating-point
1739 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1740 Note that gcc does not generate 80-bit operations by default,
1741 so in most cases this option only enlarges the size of the
1742 floating point emulator without any good reason.
1744 You almost surely want to say N here.
1747 bool "FastFPE math emulation (EXPERIMENTAL)"
1748 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1750 Say Y here to include the FAST floating point emulator in the kernel.
1751 This is an experimental much faster emulator which now also has full
1752 precision for the mantissa. It does not support any exceptions.
1753 It is very simple, and approximately 3-6 times faster than NWFPE.
1755 It should be sufficient for most programs. It may be not suitable
1756 for scientific calculations, but you have to check this for yourself.
1757 If you do not feel you need a faster FP emulation you should better
1761 bool "VFP-format floating point maths"
1762 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1764 Say Y to include VFP support code in the kernel. This is needed
1765 if your hardware includes a VFP unit.
1767 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1768 release notes and additional status information.
1770 Say N if your target does not have VFP hardware.
1778 bool "Advanced SIMD (NEON) Extension support"
1779 depends on VFPv3 && CPU_V7
1781 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1786 menu "Userspace binary formats"
1788 source "fs/Kconfig.binfmt"
1791 tristate "RISC OS personality"
1794 Say Y here to include the kernel code necessary if you want to run
1795 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1796 experimental; if this sounds frightening, say N and sleep in peace.
1797 You can also say M here to compile this support as a module (which
1798 will be called arthur).
1802 menu "Power management options"
1804 source "kernel/power/Kconfig"
1806 config ARCH_SUSPEND_POSSIBLE
1811 source "net/Kconfig"
1813 source "drivers/Kconfig"
1817 source "arch/arm/Kconfig.debug"
1819 source "security/Kconfig"
1821 source "crypto/Kconfig"
1823 source "lib/Kconfig"