2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
17 #include <asm/sections.h>
18 #include <asm/arcregs.h>
20 #include <asm/cache.h>
21 #include <asm/setup.h>
24 #include <asm/arcregs.h>
26 #include <asm/unwind.h>
29 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
31 int running_on_hw = 1; /* vs. on ISS */
33 char __initdata command_line[COMMAND_LINE_SIZE];
35 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
37 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
40 void __init read_arc_build_cfg_regs(void)
42 struct bcr_perip uncached_space;
43 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
46 READ_BCR(AUX_IDENTITY, cpu->core);
48 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
50 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
51 if (cpu->vec_base == 0)
52 cpu->vec_base = (unsigned int)_int_vec_base_lds;
54 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
55 cpu->uncached_base = uncached_space.start << 24;
57 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
58 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
59 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
60 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
61 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
62 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
64 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
65 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
67 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
69 read_decode_mmu_bcr();
70 read_decode_cache_bcr();
72 READ_BCR(ARC_REG_FP_BCR, cpu->fp);
73 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
76 static const struct cpuinfo_data arc_cpu_tbl[] = {
77 { {0x10, "ARCTangent A5"}, 0x1F},
78 { {0x20, "ARC 600" }, 0x2F},
79 { {0x30, "ARC 700" }, 0x33},
80 { {0x34, "ARC 700 R4.10"}, 0x34},
84 char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
87 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
88 struct bcr_identity *core = &cpu->core;
89 const struct cpuinfo_data *tbl;
91 #ifdef CONFIG_CPU_BIG_ENDIAN
96 n += scnprintf(buf + n, len - n,
97 "\nARC IDENTITY\t: Family [%#02x]"
98 " Cpu-id [%#02x] Chip-id [%#4x]\n",
99 core->family, core->cpu_id,
102 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
103 if ((core->family >= tbl->info.id) &&
104 (core->family <= tbl->up_range)) {
105 n += scnprintf(buf + n, len - n,
106 "processor\t: %s %s\n",
108 be ? "[Big Endian]" : "");
113 if (tbl->info.id == 0)
114 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
116 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
117 (unsigned int)(arc_get_core_freq() / 1000000),
118 (unsigned int)(arc_get_core_freq() / 10000) % 100);
120 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
121 (cpu->timers & 0x200) ? "TIMER1" : "",
122 (cpu->timers & 0x100) ? "TIMER0" : "");
124 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
127 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
133 static const struct id_to_str mul_type_nm[] = {
135 { 0x1, "32x32 (spl Result Reg)" },
136 { 0x2, "32x32 (ANY Result Reg)" }
139 static const struct id_to_str mac_mul_nm[] = {
142 {0x2, "Dual 16 x 16"},
146 {0x6, "Dual 16x16 and 32x16"}
149 char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
152 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
155 #define IS_AVAIL1(var, str) ((var) ? str : "")
156 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
157 #define IS_USED(var) ((var) ? "(in-use)" : "(not used)")
159 n += scnprintf(buf + n, len - n,
160 "Extn [700-Base]\t: %s %s %s %s %s %s\n",
161 IS_AVAIL2(cpu->extn.norm, "norm,"),
162 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
163 IS_AVAIL1(cpu->extn.swap, "swap,"),
164 IS_AVAIL2(cpu->extn.minmax, "minmax,"),
165 IS_AVAIL1(cpu->extn.crc, "crc,"),
166 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
168 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
169 mul_type_nm[cpu->extn.mul].str);
171 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
172 mac_mul_nm[cpu->extn_mac_mul.type].str);
174 if (cpu->core.family == 0x34) {
175 n += scnprintf(buf + n, len - n,
176 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
177 IS_USED(__CONFIG_ARC_HAS_LLSC_VAL),
178 IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL),
179 IS_USED(__CONFIG_ARC_HAS_RTSC_VAL));
182 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
183 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
186 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
187 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
190 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
191 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
193 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
194 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
197 n += scnprintf(buf + n, len - n, "SP [v%d] %s",
198 cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
201 n += scnprintf(buf + n, len - n, "DP [v%d] %s",
202 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
204 n += scnprintf(buf + n, len - n, "\n");
206 #ifdef _ASM_GENERIC_UNISTD_H
207 n += scnprintf(buf + n, len - n,
208 "OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n");
215 * Ensure that FP hardware and kernel config match
216 * -If hardware contains DPFP, kernel needs to save/restore FPU state
217 * across context switches
218 * -If hardware lacks DPFP, but kernel configured to save FPU state then
219 * kernel trying to access non-existant DPFP regs will crash
221 * We only check for Dbl precision Floating Point, because only DPFP
222 * hardware has dedicated regs which need to be saved/restored on ctx-sw
223 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
225 void __init arc_chk_fpu(void)
227 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
230 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
231 pr_warn("DPFP support broken in this kernel...\n");
234 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
235 panic("H/w lacks DPFP support, apps won't work\n");
241 * Initialize and setup the processor core
242 * This is called by all the CPUs thus should not do special case stuff
243 * such as only for boot CPU etc
246 void __init setup_processor(void)
249 int cpu_id = smp_processor_id();
251 read_arc_build_cfg_regs();
254 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
260 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
263 printk(arc_platform_smp_cpuinfo());
269 void __init __attribute__((weak)) arc_platform_early_init(void)
273 void __init setup_arch(char **cmdline_p)
277 #ifdef CONFIG_CMDLINE_UBOOT
278 /* Make sure that a whitespace is inserted before */
279 strlcat(command_line, " ", sizeof(command_line));
282 * Append .config cmdline to base command line, which might already
283 * contain u-boot "bootargs" (handled by head.S, if so configured)
285 strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
287 /* Save unparsed command line copy for /proc/cmdline */
288 strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
289 *cmdline_p = command_line;
291 rc = setup_machine_fdt(__dtb_start);
293 /* To force early parsing of things like mem=xxx */
296 /* Platform/board specific: e.g. early console registration */
297 arc_platform_early_init();
307 unflatten_device_tree();
309 /* Can be issue if someone passes cmd line arg "ro"
310 * But that is unlikely so keeping it as it is
312 root_mountflags &= ~MS_RDONLY;
316 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
317 conswitchp = &dummy_con;
325 * Get CPU information for use by the procfs.
328 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
329 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
331 static int show_cpuinfo(struct seq_file *m, void *v)
334 int cpu_id = ptr_to_cpu(v);
336 str = (char *)__get_free_page(GFP_TEMPORARY);
340 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
342 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
343 loops_per_jiffy / (500000 / HZ),
344 (loops_per_jiffy / (5000 / HZ)) % 100);
346 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
348 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
350 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
353 seq_printf(m, arc_platform_smp_cpuinfo());
356 free_page((unsigned long)str);
358 seq_printf(m, "\n\n");
363 static void *c_start(struct seq_file *m, loff_t *pos)
366 * Callback returns cpu-id to iterator for show routine, NULL to stop.
367 * However since NULL is also a valid cpu-id (0), we use a round-about
368 * way to pass it w/o having to kmalloc/free a 2 byte string.
369 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
371 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
374 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
377 return c_start(m, pos);
380 static void c_stop(struct seq_file *m, void *v)
384 const struct seq_operations cpuinfo_op = {
391 static DEFINE_PER_CPU(struct cpu, cpu_topology);
393 static int __init topology_init(void)
397 for_each_present_cpu(cpu)
398 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
403 subsys_initcall(topology_init);