1 Memory Layout on AArch64 Linux
2 ==============================
4 Author: Catalin Marinas <catalin.marinas@arm.com>
6 This document describes the virtual memory layout used by the AArch64
7 Linux kernel. The architecture allows up to 4 levels of translation
8 tables with a 4KB page size and up to 3 levels with a 64KB page size.
10 AArch64 Linux uses either 3 levels or 4 levels of translation tables
11 with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
12 (256TB) virtual addresses, respectively, for both user and kernel. With
13 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
14 virtual address, are used but the memory layout is the same.
16 User addresses have bits 63:48 set to 0 while the kernel addresses have
17 the same bits set to 1. TTBRx selection is given by bit 63 of the
18 virtual address. The swapper_pg_dir contains only kernel (global)
19 mappings while the user pgd contains only user (non-global) mappings.
20 The swapper_pg_dir address is written to TTBR1 and never written to
24 AArch64 Linux memory layout with 4KB pages + 3 levels:
27 -----------------------------------------------------------------------
28 0000000000000000 0000007fffffffff 512GB user
29 ffffff8000000000 ffffffffffffffff 512GB kernel
32 AArch64 Linux memory layout with 4KB pages + 4 levels:
35 -----------------------------------------------------------------------
36 0000000000000000 0000ffffffffffff 256TB user
37 ffff000000000000 ffffffffffffffff 256TB kernel
40 AArch64 Linux memory layout with 64KB pages + 2 levels:
43 -----------------------------------------------------------------------
44 0000000000000000 000003ffffffffff 4TB user
45 fffffc0000000000 ffffffffffffffff 4TB kernel
48 AArch64 Linux memory layout with 64KB pages + 3 levels:
51 -----------------------------------------------------------------------
52 0000000000000000 0000ffffffffffff 256TB user
53 ffff000000000000 ffffffffffffffff 256TB kernel
56 For details of the virtual kernel memory layout please see the kernel
60 Translation table lookup with 4KB pages:
62 +--------+--------+--------+--------+--------+--------+--------+--------+
63 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
64 +--------+--------+--------+--------+--------+--------+--------+--------+
67 | | | | | [11:0] in-page offset
68 | | | | +-> [20:12] L3 index
69 | | | +-----------> [29:21] L2 index
70 | | +---------------------> [38:30] L1 index
71 | +-------------------------------> [47:39] L0 index
72 +-------------------------------------------------> [63] TTBR0/1
75 Translation table lookup with 64KB pages:
77 +--------+--------+--------+--------+--------+--------+--------+--------+
78 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
79 +--------+--------+--------+--------+--------+--------+--------+--------+
82 | | | | [15:0] in-page offset
83 | | | +----------> [28:16] L3 index
84 | | +--------------------------> [41:29] L2 index
85 | +-------------------------------> [47:42] L1 index
86 +-------------------------------------------------> [63] TTBR0/1
89 When using KVM, the hypervisor maps kernel pages in EL2, at a fixed
90 offset from the kernel VA (top 24bits of the kernel VA set to zero):
93 -----------------------------------------------------------------------
94 0000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP