#if defined(NO_HARDWARE)
rate = SYS_SGX_MAX_FREQ_NO_HW;
#else
- PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
-
rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK);
PVR_ASSERT(rate != 0);
#endif
cnd->rate);
if (CLK_PRE_RATE_CHANGE == event) {
- pvr_lock();
+ pvr_dev_lock();
PVR_TRACE("vdd2_pre_post_func: CLK_PRE_RATE_CHANGE event");
vdd2_pre_func(n, event, ptr);
} else if (CLK_POST_RATE_CHANGE == event) {
PVR_TRACE("vdd2_pre_post_func: CLK_POST_RATE_CHANGE event");
vdd2_post_func(n, event, ptr);
- pvr_unlock();
+ pvr_dev_unlock();
} else if (CLK_ABORT_RATE_CHANGE == event) {
PVR_TRACE("vdd2_pre_post_func: CLK_ABORT_RATE_CHANGE event");
- pvr_unlock();
+ pvr_dev_unlock();
} else {
printk(KERN_ERR "vdd2_pre_post_func: unexpected event (%lu)\n",
event);
container_of(d_work, struct ENV_DATA, sPerfWork);
pvr_lock();
+
+ if (pvr_is_disabled()) {
+ pvr_unlock();
+ return;
+ }
+
load = sgx_current_load();
+
pvr_unlock();
+
if (load) {
vdd1 = 500000000;
vdd2 = 400000;
struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
struct clk *psCLK;
struct clk *core_ck = NULL;
+ unsigned long rate;
int r;
psCLK = clk_get(NULL, "sgx_fck");
}
clk_put(core_ck);
- r = clk_set_rate(psSysSpecData->psSGX_FCK,
- sgx_get_max_freq());
+ /* +1 to account for rounding errors */
+ rate = clk_round_rate(psSysSpecData->psSGX_FCK, sgx_get_max_freq() + 1);
+ r = clk_set_rate(psSysSpecData->psSGX_FCK, rate);
if (r < 0) {
- unsigned long rate;
+ unsigned long current_rate;
- rate = clk_get_rate(psSysSpecData->psSGX_FCK);
- rate /= 1000000;
- pr_warning("error %d when setting SGX fclk to %luMHz, "
- "falling back to %luMHz\n",
- r, sgx_get_max_freq() / 1000000, rate);
- }
+ current_rate = clk_get_rate(psSysSpecData->psSGX_FCK);
+ pr_warning("error %d when setting SGX fclk to %lu Hz, "
+ "falling back to %lu Hz\n", r, rate, current_rate);
+ } else {
+ pr_info("SGX clock rate %lu MHz\n", rate / 1000000);
+ };
RegisterConstraintNotifications(psSysSpecData);
return PVRSRV_OK;