arm: a37xx: pci: Set Max Payload Size and Max Read Request Size to 512 bytes
authorPali Rohár <pali@kernel.org>
Fri, 5 Feb 2021 14:32:28 +0000 (15:32 +0100)
committerStefan Roese <sr@denx.de>
Fri, 26 Feb 2021 09:22:29 +0000 (10:22 +0100)
commitcba6edd68b15f8a82f5a28c7db4d0b17866bb5cd
tree7987cb13b1b2c521d007771d58dc50f4c2be3a17
parentc28d5d704d3347fcbe5e49ab561973c00bf9337f
arm: a37xx: pci: Set Max Payload Size and Max Read Request Size to 512 bytes

Fix usage of VL805 XHCI PCIe controller when it is connected via PCIe to
Armada 3720 SOC. Without this U-Boot crashes when trying to access
enumerated USB devices connected to this XHCI PCIe controller.

This should be done according to the PCIe Link Initialization sequence, as
defined in Marvell Armada 3720 Functional Specification.

Linux has this code too.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
drivers/pci/pci-aardvark.c