Ben Skeggs [Thu, 5 Jun 2014 00:59:55 +0000 (10:59 +1000)]
drm/nv50-: prepare for attaching a SOR to multiple heads
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 4 Jun 2014 01:43:50 +0000 (11:43 +1000)]
drm/gf119-/disp: fix debug output on update failure
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 3 Jun 2014 04:48:18 +0000 (14:48 +1000)]
drm/nouveau/disp/dp: make use of postcursor when its available
And at the same time, obey the spec better wrt out-of-range requests.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 3 Jun 2014 02:56:18 +0000 (12:56 +1000)]
drm/g94-/disp/dp: take max pullup value across all lanes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 3 Jun 2014 02:47:31 +0000 (12:47 +1000)]
drm/nouveau/bios/dp: parse lane postcursor data
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 30 May 2014 15:48:06 +0000 (01:48 +1000)]
drm/nouveau/dp: fix support for dpms
SOR_PWR has no effect to power-off DP links, unlike other SOR protocols.
Instead, on the source side, we cut power to the lanes after having put
the sink into D3. Link training takes care of everything required to
bring it back again.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 30 May 2014 06:20:58 +0000 (16:20 +1000)]
drm/nouveau: register a drm_dp_aux channel for each dp connector
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 26 May 2014 02:09:06 +0000 (12:09 +1000)]
drm/g94-/disp: add method to power-off dp lanes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 20 May 2014 00:18:03 +0000 (10:18 +1000)]
drm/nouveau/disp/dp: maintain link in response to hpd signal
This previously worked for the most part due to userspace doing a
modeset in response to HPD interrupts. This will allow us to
properly handle cases where sync is lost for other reasons, or if
userspace isn't caring.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 26 May 2014 02:00:07 +0000 (12:00 +1000)]
drm/g94-/disp: bash and wait for something after changing lane power regs
Some kind of update? Needed to make the power-down take effect at least.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 26 May 2014 01:57:57 +0000 (11:57 +1000)]
drm/nouveau/disp/dp: split link config/power into two steps
We want to be able to power down the lanes for DPMS off.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 27 May 2014 05:00:36 +0000 (15:00 +1000)]
drm/nv50/disp: train PIOR-attached DP from second supervisor
Same place as for SOR, between detach and attach phases.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 19 May 2014 04:06:07 +0000 (14:06 +1000)]
drm/nouveau/disp/dp: make use of existing output data for link training
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 21 May 2014 01:39:07 +0000 (11:39 +1000)]
drm/gf119/disp: start removing direct vbios parsing from supervisor
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 21 May 2014 01:24:43 +0000 (11:24 +1000)]
drm/nv50/disp: start removing direct vbios parsing from supervisor
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 19 May 2014 01:54:09 +0000 (11:54 +1000)]
drm/nouveau/disp/dp: maintain receiver caps in response to hpd signal
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 17 May 2014 01:19:54 +0000 (11:19 +1000)]
drm/nouveau/disp/dp: create subclass for dp outputs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 30 May 2014 02:49:17 +0000 (12:49 +1000)]
drm/nouveau: use connector events for HPD instead of GPIO watching
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 16 May 2014 04:36:15 +0000 (14:36 +1000)]
drm/nouveau/disp: add internal representaion of output paths and connectors
This will, at some point, be used to replace various bits and pieces of
code doing direct bios parsing. For now, it'll just be used for some
DP improvements.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 14 May 2014 01:10:02 +0000 (11:10 +1000)]
drm/nouveau/bios: extend connector table parsing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 14 May 2014 00:26:02 +0000 (10:26 +1000)]
drm/nouveau/disp: nothing to see here
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 11 Jun 2014 00:28:18 +0000 (10:28 +1000)]
drm/nouveau/i2c/anx9805: add debugging to aux transactions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 29 May 2014 01:35:10 +0000 (11:35 +1000)]
drm/nouveau/i2c: introduce locking at a per-port level
There's also provisions to allow a pad to be locked with a specific
routing, for an indefinite period of time. This will be used in
future patches.
The G94+ pad driver will now also power-down pads when not required.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 29 May 2014 01:07:16 +0000 (11:07 +1000)]
drm/nouveau/i2c: balance port acquire/release
This was a half-finished hack before, just enough to handle the shared
aux/i2c pad thing on G94 and up.
We got lucky with locking etc up until now, as this was (generally) all
protected by the DRM mode_config lock. It's about to become a lot more
likely to hit the races.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 04:53:34 +0000 (14:53 +1000)]
drm/gk104/i2c: add aux channel interrupt driver
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 04:50:25 +0000 (14:50 +1000)]
drm/g94/i2c: add aux channel interrupt driver
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 04:47:36 +0000 (14:47 +1000)]
drm/nouveau/i2c: add interfaces to support handling aux channel interrupts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 03:59:26 +0000 (13:59 +1000)]
drm/nouveau/i2c: start hiding subdev-internal interfaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 7 May 2014 02:41:29 +0000 (12:41 +1000)]
drm/nouveau/i2c: remove unnecessary i2c_set_adapdata()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 7 May 2014 05:13:45 +0000 (15:13 +1000)]
drm/nouveau/i2c: properly hand aux reply back to caller, and only retry on defer
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 04:36:49 +0000 (14:36 +1000)]
drm/nv50-/mc: also pass PMGR interrupts onto I2C subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 05:54:17 +0000 (15:54 +1000)]
drm/nouveau/gpio: send separate event types for high/low transitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 00:33:23 +0000 (10:33 +1000)]
drm/nouveau/gpio: use base constructor for all implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 00:17:35 +0000 (10:17 +1000)]
drm/nouveau/gpio: move on-reset intr disable-and-ack to common code
Re-uses the implementation's accessor functions rather than requiring
and init/fini implementation for each chipset.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 12 May 2014 06:14:11 +0000 (16:14 +1000)]
drm/nouveau/gpio: split "toggled" interrupt into "went high" / "went low"
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 12 May 2014 05:22:42 +0000 (15:22 +1000)]
drm/nouveau/gpio: split g92 class from nv50
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 12 May 2014 04:18:06 +0000 (14:18 +1000)]
drm/nouveau/gpio: use indirect pointer to base class definition
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 16 May 2014 00:49:28 +0000 (10:49 +1000)]
drm/nouveau/disp/dp: support training to highest rate, rather than a target
We really want this for, at least, MST devices.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 15 May 2014 12:20:40 +0000 (22:20 +1000)]
drm/nouveau/disp/dp: support postcursor in link training
Not enabled at the backends yet, but will read status and send back max
reached at level 0.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 13 May 2014 05:30:15 +0000 (15:30 +1000)]
drm/nouveau/core: allow event source to handle multiple event types per index
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Sat, 7 Jun 2014 19:39:45 +0000 (15:39 -0400)]
drm/gk208/gr: add missing registers to grctx init
This fixes hangs on GK208 which happen instantaneously on trying to use a
geometry shader.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org # v3.14+
Mario Kleiner [Mon, 12 May 2014 22:42:08 +0000 (00:42 +0200)]
drm/nouveau/kms/nv04-nv40: fix pageflip events via special case.
Cards with nv04 display engine can't reliably use vblank
counts and timestamps computed via drm_handle_vblank(), as
the function gets invoked after sending the pageflip events.
Fix this by defaulting to the old crtcid = -1 fallback path
on <= NV-50 cards, and only using the precise path on NV-50
and later.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: <stable@vger.kernel.org> # 3.13+
Mario Kleiner [Wed, 19 Mar 2014 07:12:51 +0000 (08:12 +0100)]
drm/nv50-/mc: fix kms pageflip events by reordering irq handling order.
Whenever a single nouveau_mc_intr() main gpu irq-handler invocation was
responsible for calling both, the vblank-irq handler (display engine irq)
and kms-pageflip completion handler (from fifo irq), the order of
invocation was wrong. nouveau_finish_flip() was called before
drm_handle_vblank() for the vblank of pageflip completion, so the
emitted pageflip event contained stale vblank count and timestamp
from previous vblank. This caused failure in userspace to timestamp
properly.
Reorder order of invocation of engine irq handlers: Put
NVDEV_ENGINE_DISP always on top, and thereby before NVDEV_ENGINE_FIFO,
so that drm_handle_vblank() gets called to update vblank timestamps
and count before potential pageflip events make use of that
information.
This works on nv-50 and later, where kms-pageflip completion triggers
an irq either after a separate vblank irq, or both pageflip and vblank
trigger one common irq invocation, but never before vblank irqs.
v2 (Ben):
- removed mods for nv04-nv40, it doesn't help there anyway
- this is considered a hack, and a better solution should be found
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: <stable@vger.kernel.org> # 3.13+
Mario Kleiner [Wed, 28 May 2014 03:22:18 +0000 (05:22 +0200)]
drm/nouveau/disp/nv04-nv40: abort scanoutpos query on vga analog.
nv04_disp_scanoutpos() must abort to trigger simple timestamping
fallback if vtotal/htotal regs return zero. This happens if the
output isn't a digital output, but a vga analog output, as the
regs don't get initialized in that case.
Fixes timestamping failure on nv-40 and earlier with vga output.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: <stable@vger.kernel.org> # 3.14+
Ben Skeggs [Mon, 19 May 2014 04:54:33 +0000 (14:54 +1000)]
drm/nv50-/kms: wait for enough ring space in crtc_prepare()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 15 May 2014 12:00:06 +0000 (22:00 +1000)]
drm/nouveau/disp/dp: support training pattern 3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 15 May 2014 11:50:07 +0000 (21:50 +1000)]
drm/nouveau/disp/dp: support aux read interval during link training
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 12 May 2014 04:12:32 +0000 (14:12 +1000)]
drm/gk104/gpio: fix incorrect interrupt register usage
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 16 May 2014 03:52:19 +0000 (13:52 +1000)]
drm/nouveau/core: punt all object state change messages to trace level
Leave debug for the more interesting bits of info.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Sun, 18 May 2014 05:04:16 +0000 (01:04 -0400)]
drm/nouveau/clk: allow end-user reclocking for nv40, nvaa, and nve0 clock types
Use with caution.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ilia Mirkin [Sun, 18 May 2014 05:04:15 +0000 (01:04 -0400)]
drm/nouveau/fb: default NvMemExec to on, turning it off is used for debugging only
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Martin Peres [Thu, 3 Apr 2014 20:12:41 +0000 (22:12 +0200)]
drm/nouveau/bios: fix a potential NULL deref in the PROM shadowing function
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Martin Peres [Sun, 25 May 2014 22:42:13 +0000 (00:42 +0200)]
drm/nouveau/i2c: bump the i2c delay for the adt7473
Some adt7473 can't manage the 20µs delay we use for the bitbanging, bumping
it to 40µs seem to do the trick.
Signed-off-by: Martin Peres <martin.peres@free.fr>
Tested-by: Marcel Dopita <mdop@seznam.cz>
Martin Peres [Mon, 12 May 2014 21:19:07 +0000 (23:19 +0200)]
drm/nouveau/therm/fan/tach: default to 2 pulses per revolution
I spent some time this weekend trying to find in the vbios the number of
pulses per revolutions in the vbios but couldn't find it. It would seem
all my cards have 2 pulses per revolution so let's stick to that until
further notice.
Thermal table's id 0x48 may indicate this information but it would seem
that changing the value results in the blob power or clock gating the
RPM counter... We should ask NVIDIA about that, should be trivial-enough
for them to answer.
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
John Rowley [Mon, 12 May 2014 21:34:57 +0000 (21:34 +0000)]
drm/nvf0/device: enable video decoding engines on gk110/gk208
Only tested on nvf1, was advised to enable on all.
Signed-off-by: John Rowley <john.rowley08@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
John Rowley [Mon, 12 May 2014 21:34:56 +0000 (21:34 +0000)]
drm/nvf1/device: add support for 0xf1 (gk110b)
Signed-off-by: John Rowley <john.rowley08@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:42 +0000 (18:32 +0900)]
drm/nouveau/device: support for probing GK20A
Set the correct subdev/engine classes when GK20A (0xea) is probed.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:41 +0000 (18:32 +0900)]
drm/nouveau/graph: add GK20A support
Add a GR device for GK20A based on NVE4, with the correct classes
definitions (GK20A's 3D class is 0xa297).
Most of the NVE4 code can be used on GK20A, so make relevant bits of
NVE4 available to other chips as well.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:40 +0000 (18:32 +0900)]
drm/nouveau/graph: pad firmware code at load time
Pad the microcode to a multiple of 0x40 words, otherwise firmware will
fail to run from non-prepadded firmware files.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:39 +0000 (18:32 +0900)]
drm/nouveau/graph: enable when using external fw
nvc0_graph_ctor() would only let the graphics engine be enabled if its
oclass has a proper microcode linked to it. This prevents GR from being
enabled at all on chips that rely exclusively on external firmware, even
though such a use-case is valid.
Relax the conditions enabling the GR engine to also include the case
where an external firmware has also been loaded.
Also switch to external firmware if the graph class has no microcode
linked to it.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:38 +0000 (18:32 +0900)]
drm/nouveau/fifo: add GK20A support
GK20A's FIFO is compatible with NVE0, but only features 128 channels and
1 runlist.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:37 +0000 (18:32 +0900)]
drm/nouveau/fb: add GK20A support
Add a simple FB device for GK20A, as well as a RAM implementation
suitable for chips that use system memory as video RAM.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:36 +0000 (18:32 +0900)]
drm/nouveau/ibus: add GK20A support
Add support for initializing the priv ring of GK20A. This is done by the
BIOS on desktop GPUs, but needs to be done by hand on Tegra.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:35 +0000 (18:32 +0900)]
drm/nvc0/bar: support chips without BAR3
Adapt the NVC0 BAR driver to make it able to support chips that do not
expose a BAR3. When this happens, BAR1 is then used for USERD mapping
and the BAR alloc() functions is disabled, making GPU objects unable
to rely on BAR for data access and falling back to PRAMIN.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Fri, 2 May 2014 09:32:34 +0000 (18:32 +0900)]
drm/nouveau/bar: only ioremap BAR3 if it exists
Some chips that use system memory exclusively (e.g. GK20A) do not
expose 2 BAR regions. For them only BAR1 exists, and it should be used
for USERD mapping. Do not map BAR3 if its resource does not exist.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Damien Lespiau [Mon, 9 Jun 2014 13:40:35 +0000 (14:40 +0100)]
drm/doc: Fix nouveau typo
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 9 Jun 2014 22:53:00 +0000 (08:53 +1000)]
Merge tag 'drm/panel/for-3.16-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/panel: Changes for v3.16-rc1
This set of commits contains a couple of fixes to existing panel drivers
and support for some new panels.
One commit touches the DRM core in that in modifies the MIPI DSI support
to hook up the shutdown function so that drivers can provide code that's
run on shutdown. This is used by a subsequent commit to make the simple
panel driver power off the backlight on shutdown.
* tag 'drm/panel/for-3.16-rc1' of git://anongit.freedesktop.org/tegra/linux:
drm/panel: simple - Add AUO B133XTN01 panel support
drm/panel: simple - Disable panel on shutdown
drm/panel: add support for EDT ET057090DHU panel
drm/panel: Add support for EDT ETM0700G0DH6 and ET070080DH6 panels
drm/panel: ld9040: add power control sequence
drm/panel: s6e8aa0: silence array overflow warning
drm/dsi: Support device shutdown
Dave Airlie [Mon, 9 Jun 2014 22:51:19 +0000 (08:51 +1000)]
Merge tag 'drm/tegra/for-3.16-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v3.16-rc1
The majority of these changes are a slew of cleanups across the board.
A more noteworthy change is the addition of drm_dev_set_unique() and the
conversion of the Tegra DRM driver to use it. This allows us to get rid
of the host1x drm_bus implementation. Other USB and platform drivers can
be changed in a similar way. Unfortunately for most PCI devices there is
some userspace that relies on the old functionality and cannot be as
easily converted.
HDMI and hardware cursor support is added for Tegra124. The SOR output
gains support for exposing CRCs via debugfs, which can be used for
automated testing. Many values that were hardcoded in the SOR/eDP code
are now computed at runtime to increase compatibility with more devices.
* tag 'drm/tegra/for-3.16-rc1' of git://anongit.freedesktop.org/tegra/linux: (47 commits)
drm/tegra: sor - Remove obsolete comment
drm/tegra: sor - Enable only the necessary number of lanes
drm/tegra: sor - Power on only the necessary lanes
drm/tegra: sor - Do not program interlaced mode registers
drm/tegra: sor - Do not hardcode link speed
drm/tegra: sor - Do not hardcode number of blank symbols
drm/tegra: sor - Don't hardcode link parameters
drm/tegra: sor - Change power down ordering
drm/tegra: sor - Fix copy/paste error
drm/tegra: sor - Remove pixel clock rounding
drm/tegra: sor - Make debugfs setup consistent
drm/tegra: sor - Recursively remove debugfs tree
drm/tegra: dp - Mark the connector as hotplug capable
drm/tegra: dp - Implement hotplug detection in work queue
drm/tegra: Add hardware cursor support
drm/tegra: Remove host1x drm_bus implementation
drm: Document how to register devices without struct drm_bus
drm: Add device registration documentation
drm: Introduce drm_dev_set_unique()
gpu: host1x: Rename internal functions for clarity
...
Stéphane Marchesin [Sat, 24 May 2014 02:27:59 +0000 (19:27 -0700)]
drm/panel: simple - Add AUO B133XTN01 panel support
This panel is used by nyan-big and can be supported by the simple-panel
driver.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
[treding@nvidia.com: add device tree binding document]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:20:27 +0000 (16:20 +0200)]
drm/tegra: sor - Remove obsolete comment
According to the DP specification the disparity of the first symbol
should always be negative. It is therefore safe to assume that panels
will conform to that and therefore parameterizing this field should
never be necessary.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:29:46 +0000 (16:29 +0200)]
drm/tegra: sor - Enable only the necessary number of lanes
Instead of always enabling all four lanes, enable only the number probed
from the link.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:19:48 +0000 (16:19 +0200)]
drm/tegra: sor - Power on only the necessary lanes
Power on only those lanes required for the specified link.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:17:25 +0000 (16:17 +0200)]
drm/tegra: sor - Do not program interlaced mode registers
Interlaced mode is currently not supported on the SOR, so don't program
any associated registers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:16:23 +0000 (16:16 +0200)]
drm/tegra: sor - Do not hardcode link speed
Use the speed probed from the link at runtime rather than relying on a
hardcoded default.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:12:46 +0000 (16:12 +0200)]
drm/tegra: sor - Do not hardcode number of blank symbols
The number of HBLANK and VBLANK symbols can be computed at runtime so
that they can be set appropriately depending on the video mode and DP
link.
These values are used by the packet generation logic to determine how
many audio samples can be transferred during the blanking intervals.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 5 Jun 2014 14:31:10 +0000 (16:31 +0200)]
drm/tegra: sor - Don't hardcode link parameters
The currently hardcoded link parameters don't work on all eDP panels, so
compute the parameters at runtime depending on the mode and panel type
to allow the driver to cope with a wider variety of panels.
Note that the number of bits per pixel of the panel is still hardcoded,
but this can be addressed in a separate patch.
This is largely based on a patch by Stéphane Marchesin but the algorithm
was largely rewritten to be more readable and concise.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Stéphane Marchesin [Fri, 23 May 2014 03:32:48 +0000 (20:32 -0700)]
drm/tegra: sor - Change power down ordering
Lanes are powered up in decreasing order. Power them down in increasing
order for consistency.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Stéphane Marchesin [Fri, 23 May 2014 03:32:47 +0000 (20:32 -0700)]
drm/tegra: sor - Fix copy/paste error
The comment above mentions link A/B but this isn't what the code does,
so let's fix that.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Stéphane Marchesin [Fri, 23 May 2014 03:32:46 +0000 (20:32 -0700)]
drm/tegra: sor - Remove pixel clock rounding
The code currently rounds up the clock to the next MHZ, which is
rounding up a 69.5MHz clock to 70MHz on my machine. This in turn
prevents the display from syncing. Removing this rounding fixes eDP
for me.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dave Airlie [Fri, 6 Jun 2014 09:07:09 +0000 (19:07 +1000)]
Merge tag 'drm-intel-fixes-2014-06-06' of git://anongit.freedesktop.org/drm-intel into drm-next
> Bunch of stuff for 3.16 still:
> - Mipi dsi panel support for byt. Finally! From Shobhit&others. I've
> squeezed this in since it's a regression compared to vbios and we've
> been ridiculed about it a bit too often ...
> - connection_mutex deadlock fix in get_connector (only affects i915).
> - Core patches from Matt's primary plane from Matt Roper, I've pushed the
> i915 stuff to 3.17.
> - vlv power well sequencing fixes from Jesse.
> - Fix for cursor size changes from Chris.
> - agpbusy fixes from Ville.
> - A few smaller things.
>
* tag 'drm-intel-fixes-2014-06-06' of git://anongit.freedesktop.org/drm-intel: (32 commits)
drm/i915: BDW: Adding missing cursor offsets.
drm: Fix getconnector connection_mutex locking
drm/i915/bdw: Only use 2g GGTT for 32b platforms
drm/i915: Nuke pipe A quirk on i830M
drm/i915: fix display power sw state reporting
drm/i915: Always apply cursor width changes
drm/i915: tell the user if both KMS and UMS are disabled
drm/plane-helper: Add drm_plane_helper_check_update() (v3)
drm: Check CRTC compatibility in setplane
drm/i915: use VBT to determine whether to enumerate the VGA port
drm/i915: Don't WARN about ring idle bit on gen2
drm/i915: Silence the WARN if the user tries to GTT mmap an incoherent object
drm/i915: Move the C3 LP write bit setup to gen3_init_clock_gating() for KMS
drm/i915: Enable interrupt-based AGPBUSY# enable on 85x
drm/i915: Flip the sense of AGPBUSY_DIS bit
drm/i915: Set AGPBUSY# bit in init_clock_gating
drm/i915/vlv: add pll assertion when disabling DPIO common well
drm/i915/vlv: move DPIO common reset de-assert into __vlv_set_power_well
drm/i915/vlv: re-order power wells so DPIO common comes after TX
drm/i915/vlv: move CRI refclk enable into __vlv_set_power_well
...
Thierry Reding [Wed, 28 May 2014 11:46:12 +0000 (13:46 +0200)]
drm/tegra: sor - Make debugfs setup consistent
Other output drivers set up debugfs slightly differently. Bring the SOR
driver in line with those for consistency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 25 Apr 2014 14:48:36 +0000 (16:48 +0200)]
drm/tegra: sor - Recursively remove debugfs tree
Removing only the root directory will fail when there are still files in
it. Instead of manually removing all files, remove the whole directory
recursively.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 25 Apr 2014 14:44:48 +0000 (16:44 +0200)]
drm/tegra: dp - Mark the connector as hotplug capable
Doing so allows the hotplug events generated by the connector to be
properly handled by the DRM poll helpers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 25 Apr 2014 14:42:32 +0000 (16:42 +0200)]
drm/tegra: dp - Implement hotplug detection in work queue
Calling the drm_helper_hpd_irq_event() helper can sleep, so instead of
invoking it directly from the interrupt handler, schedule a work queue
and run it from there.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 20 Dec 2013 12:58:33 +0000 (13:58 +0100)]
drm/tegra: Add hardware cursor support
Enable hardware cursor support on Tegra124. Earlier generations support
the hardware cursor to some degree as well, but not in a way that can be
generically exposed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 22 May 2014 07:57:15 +0000 (09:57 +0200)]
drm/tegra: Remove host1x drm_bus implementation
The DRM core can now cope with drivers that don't have an associated
struct drm_bus, so the host1x implementation is no longer useful.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 23 Apr 2014 09:52:10 +0000 (11:52 +0200)]
drm: Document how to register devices without struct drm_bus
With the recent addition of the drm_set_unique() function, devices can
now be registered without requiring a drm_bus. Add a brief description
to the DRM docbook to show how that can be achieved.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 19 May 2014 11:39:07 +0000 (13:39 +0200)]
drm: Add device registration documentation
Describe how devices are registered using the drm_*_init() functions.
Adding this to docbook requires a largish set of changes to the comments
in drm_{pci,usb,platform}.c since they are doxygen-style rather than
proper kernel-doc and therefore mess with the docbook generation.
While at it, mark usage of drm_put_dev() as discouraged in favour of
calling drm_dev_unregister() and drm_dev_unref() directly.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 11 Apr 2014 13:23:00 +0000 (15:23 +0200)]
drm: Introduce drm_dev_set_unique()
Add a helper function that allows drivers to statically set the unique
name of the device. This will allow platform and USB drivers to get rid
of their DRM bus implementations and directly use drm_dev_alloc() and
drm_dev_register().
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 22 May 2014 09:12:17 +0000 (11:12 +0200)]
gpu: host1x: Rename internal functions for clarity
The internal host1x_{,un}register_client() functions can potentially be
confused with public the host1x_client_{,un}register() functions.
Rename them to host1x_{add,del}_client() to remove some of the possible
confusion.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 13 May 2014 14:46:11 +0000 (16:46 +0200)]
drm/tegra: gem - Make tegra_bo_import() static
The function is never used outside of the source file and therefore can
be locally scoped.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 15 Nov 2013 15:07:32 +0000 (16:07 +0100)]
drm/tegra: hdmi - Add Tegra124 support
Tegra124 is mostly backwards-compatible with Tegra114. However, Tegra124
supports a few more features (e.g. interlacing, ...). Introduce a new
compatible string and TMDS tables to cope with these differences.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 26 Mar 2014 10:13:16 +0000 (11:13 +0100)]
drm/tegra: sor - Protect CRC debugfs against enable state
Accessing the CRC debugfs file will hang the system if the SOR is not
enabled, so make sure that it is stays enabled until the CRC has been
read.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 14 Mar 2014 13:20:42 +0000 (14:20 +0100)]
drm/tegra: dsi - Do not needlessly recompute pclk
In some cases the pixel clock used to not be correct, which is why it
had to be recomputed. It turns out that the reason why it wasn't correct
is that it was used wrongly. If used correctly there's not need for the
recomputation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 26 Mar 2014 12:32:21 +0000 (13:32 +0100)]
drm/tegra: dc - Compute shift clock divider in output drivers
The shift clock divider is highly dependent on the type of output, so
push computation of it down into the output drivers. The old code used
to work merely by accident.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 26 Mar 2014 11:32:14 +0000 (12:32 +0100)]
drm/tegra: dc - Move around shift clock programming
Program the shift clock divider in tegra_crtc_setup_clk() since that's
where the divider is computed, so passing it around can be avoided.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 14 Mar 2014 13:25:43 +0000 (14:25 +0100)]
drm/tegra: dsi - Reset controller on driver unload
Assert the DSI controller's reset when the driver is unloaded to reduce
power consumption and to put the controller into a known state for
subsequent driver reloads.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 14 Mar 2014 13:19:17 +0000 (14:19 +0100)]
drm/tegra: dsi - Fix typo when disabling controller
When disabling the DSI controller, the code wasn't really doing what it
was supposed to.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 14 Mar 2014 13:15:10 +0000 (14:15 +0100)]
drm/tegra: dsi - Add enable guard
To prevent the enable or disable operations to potentially be run
multiple times, add guards to return early when the output is already
in the targetted state.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 14 Mar 2014 13:13:15 +0000 (14:13 +0100)]
drm/tegra: dsi - Initialize proper packet sequences
The packet sequencer needs to be programmed depending on the video mode
of the attached peripheral. Add support for non-burst video modes with
sync events (as opposed to sync pulses) and select either sequence
depending on the video mode.
Signed-off-by: Thierry Reding <treding@nvidia.com>
git.openpandora.org / pandora-kernel.git / log