#include <linux/clk.h>
#include <mach/hardware.h>
+ #include <mach/irqs.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
+ #include <asm/pmu.h>
#include <plat/control.h>
#include <plat/tc.h>
static inline void omap_init_mcspi(void) {}
#endif
+ static struct resource omap2_pmu_resource = {
+ .start = 3,
+ .end = 3,
+ .flags = IORESOURCE_IRQ,
+ };
+
+ static struct resource omap3_pmu_resource = {
+ .start = INT_34XX_BENCH_MPU_EMUL,
+ .end = INT_34XX_BENCH_MPU_EMUL,
+ .flags = IORESOURCE_IRQ,
+ };
+
+ static struct platform_device omap_pmu_device = {
+ .name = "arm-pmu",
+ .id = ARM_PMU_DEVICE_CPU,
+ .num_resources = 1,
+ };
+
+ static void omap_init_pmu(void)
+ {
+ if (cpu_is_omap24xx())
+ omap_pmu_device.resource = &omap2_pmu_resource;
+ else if (cpu_is_omap34xx())
+ omap_pmu_device.resource = &omap3_pmu_resource;
+ else
+ return;
+
+ platform_device_register(&omap_pmu_device);
+ }
+
+
#ifdef CONFIG_OMAP_SHA1_MD5
static struct resource sha1_md5_resources[] = {
{
static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
int controller_nr)
{
+ if ((mmc_controller->slots[0].switch_pin > 0) && \
+ (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
+ omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
+ OMAP_PIN_INPUT_PULLUP);
+ if ((mmc_controller->slots[0].gpio_wp > 0) && \
+ (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
+ omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
+ OMAP_PIN_INPUT_PULLUP);
+
if (cpu_is_omap2420() && controller_nr == 0) {
omap_cfg_reg(H18_24XX_MMC_CMD);
omap_cfg_reg(H15_24XX_MMC_CLKI);
static inline void omap_hdq_init(void) {}
#endif
+/*---------------------------------------------------------------------------*/
+
+#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
+ defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
+#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
+static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
+};
+#else
+static struct resource omap_vout_resource[2] = {
+};
+#endif
+
+static struct platform_device omap_vout_device = {
+ .name = "omap_vout",
+ .num_resources = ARRAY_SIZE(omap_vout_resource),
+ .resource = &omap_vout_resource[0],
+ .id = -1,
+};
+static void omap_init_vout(void)
+{
+ if (platform_device_register(&omap_vout_device) < 0)
+ printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
+}
+#else
+static inline void omap_init_vout(void) {}
+#endif
+
/*-------------------------------------------------------------------------*/
static int __init omap2_init_devices(void)
omap_init_camera();
omap_init_mbox();
omap_init_mcspi();
+ omap_init_pmu();
omap_hdq_init();
omap_init_sti();
omap_init_sha1_md5();
+ omap_init_vout();
return 0;
}
* omap_hwmod implementation for OMAP2/3/4
*
* Copyright (C) 2009 Nokia Corporation
- * Paul Walmsley
- * With fixes and testing from Kevin Hilman
*
- * Created in collaboration with (alphabetical order): Benoit Cousson,
- * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
- * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
+ * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
+ *
+ * Created in collaboration with (alphabetical order): Thara Gopinath,
+ * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
+ * Sawant, Santosh Shilimkar, Richard Woodruff
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
#include <linux/err.h>
#include <linux/list.h>
#include <linux/mutex.h>
- #include <linux/bootmem.h>
#include <plat/common.h>
#include <plat/cpu.h>
#define MAX_MODULE_RESET_WAIT 10000
/* Name of the OMAP hwmod for the MPU */
-#define MPU_INITIATOR_NAME "mpu_hwmod"
+#define MPU_INITIATOR_NAME "mpu"
/* omap_hwmod_list contains all registered struct omap_hwmods */
static LIST_HEAD(omap_hwmod_list);
*/
static int _init_main_clk(struct omap_hwmod *oh)
{
- struct clk *c;
int ret = 0;
if (!oh->main_clk)
return 0;
- c = omap_clk_get_by_name(oh->main_clk);
- WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s\n",
- oh->name, oh->main_clk);
- if (IS_ERR(c))
- ret = -EINVAL;
- oh->_clk = c;
+ oh->_clk = omap_clk_get_by_name(oh->main_clk);
+ if (!oh->_clk)
+ pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
+ oh->name, oh->main_clk);
+ return -EINVAL;
- WARN(!c->clkdm, "omap_hwmod: %s: missing clockdomain for %s.\n",
- oh->main_clk, c->name);
+ if (!oh->_clk->clkdm)
+ pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
+ oh->main_clk, oh->_clk->name);
return ret;
}
*/
static int _init_interface_clks(struct omap_hwmod *oh)
{
- struct omap_hwmod_ocp_if *os;
struct clk *c;
int i;
int ret = 0;
if (oh->slaves_cnt == 0)
return 0;
- for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+ for (i = 0; i < oh->slaves_cnt; i++) {
+ struct omap_hwmod_ocp_if *os = oh->slaves[i];
+
if (!os->clk)
continue;
c = omap_clk_get_by_name(os->clk);
- WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get "
- "interface_clk %s\n", oh->name, os->clk);
- if (IS_ERR(c))
+ if (!c)
+ pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
+ oh->name, os->clk);
ret = -EINVAL;
os->_clk = c;
}
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
c = omap_clk_get_by_name(oc->clk);
- WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk "
- "%s\n", oh->name, oc->clk);
- if (IS_ERR(c))
+ if (!c)
+ pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
+ oh->name, oc->clk);
ret = -EINVAL;
oc->_clk = c;
}
*/
static int _enable_clocks(struct omap_hwmod *oh)
{
- struct omap_hwmod_ocp_if *os;
int i;
pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
- if (oh->_clk && !IS_ERR(oh->_clk))
+ if (oh->_clk)
clk_enable(oh->_clk);
if (oh->slaves_cnt > 0) {
- for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+ for (i = 0; i < oh->slaves_cnt; i++) {
+ struct omap_hwmod_ocp_if *os = oh->slaves[i];
struct clk *c = os->_clk;
- if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
+ if (c && (os->flags & OCPIF_SWSUP_IDLE))
clk_enable(c);
}
}
*/
static int _disable_clocks(struct omap_hwmod *oh)
{
- struct omap_hwmod_ocp_if *os;
int i;
pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
- if (oh->_clk && !IS_ERR(oh->_clk))
+ if (oh->_clk)
clk_disable(oh->_clk);
if (oh->slaves_cnt > 0) {
- for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+ for (i = 0; i < oh->slaves_cnt; i++) {
+ struct omap_hwmod_ocp_if *os = oh->slaves[i];
struct clk *c = os->_clk;
- if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
+ if (c && (os->flags & OCPIF_SWSUP_IDLE))
clk_disable(c);
}
}
*/
static int _find_mpu_port_index(struct omap_hwmod *oh)
{
- struct omap_hwmod_ocp_if *os;
int i;
int found = 0;
if (!oh || oh->slaves_cnt == 0)
return -EINVAL;
- for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+ for (i = 0; i < oh->slaves_cnt; i++) {
+ struct omap_hwmod_ocp_if *os = oh->slaves[i];
+
if (os->user & OCP_USER_MPU) {
found = 1;
break;
if (!oh || oh->slaves_cnt == 0)
return NULL;
- os = *oh->slaves + index;
+ os = oh->slaves[index];
for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
if (mem->flags & ADDR_TYPE_RT) {
ret |= _init_interface_clks(oh);
ret |= _init_opt_clks(oh);
- oh->_state = _HWMOD_STATE_CLKS_INITED;
+ if (!ret)
+ oh->_state = _HWMOD_STATE_CLKS_INITED;
- return ret;
+ return 0;
}
/**
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
return 0;
- os = *oh->slaves + oh->_mpu_port_index;
+ os = oh->slaves[oh->_mpu_port_index];
- if (!(os->flags & OCPIF_HAS_IDLEST))
+ if (oh->flags & HWMOD_NO_IDLEST)
return 0;
/* XXX check module SIDLEMODE */
ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
oh->prcm.omap2.idlest_reg_id,
oh->prcm.omap2.idlest_idle_bit);
-#if 0
} else if (cpu_is_omap44xx()) {
- ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs,
- oh->prcm.omap4.device_offs);
-#endif
+ ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
} else {
BUG();
};
_add_initiator_dep(oh, mpu_oh);
_enable_clocks(oh);
- if (oh->class->sysc) {
- if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
- _update_sysc_cache(oh);
- _sysc_enable(oh);
- }
-
r = _wait_target_ready(oh);
- if (!r)
+ if (!r) {
oh->_state = _HWMOD_STATE_ENABLED;
+ /* Access the sysconfig only if the target is ready */
+ if (oh->class->sysc) {
+ if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
+ _update_sysc_cache(oh);
+ _sysc_enable(oh);
+ }
+ } else {
+ pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
+ oh->name, r);
+ }
+
return r;
}
*/
static int _setup(struct omap_hwmod *oh)
{
- struct omap_hwmod_ocp_if *os;
- int i;
+ int i, r;
if (!oh)
return -EINVAL;
/* Set iclk autoidle mode */
if (oh->slaves_cnt > 0) {
- for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+ for (i = 0; i < oh->slaves_cnt; i++) {
+ struct omap_hwmod_ocp_if *os = oh->slaves[i];
struct clk *c = os->_clk;
- if (!c || IS_ERR(c))
+ if (!c)
continue;
if (os->flags & OCPIF_SWSUP_IDLE) {
oh->_state = _HWMOD_STATE_INITIALIZED;
- _enable(oh);
+ r = _enable(oh);
+ if (r) {
+ pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
+ oh->name, oh->_state);
+ return 0;
+ }
if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
/*
ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt;
for (i = 0; i < oh->slaves_cnt; i++)
- ret += (*oh->slaves + i)->addr_cnt;
+ ret += oh->slaves[i]->addr_cnt;
return ret;
}
for (i = 0; i < oh->slaves_cnt; i++) {
struct omap_hwmod_ocp_if *os;
- os = *oh->slaves + i;
+ os = oh->slaves[i];
for (j = 0; j < os->addr_cnt; j++) {
(res + r)->start = (os->addr + j)->pa_start;