powerpc/85xx: Fix booting for P1021MDS boards
authorAnton Vorontsov <avorontsov@mvista.com>
Tue, 8 Jun 2010 09:55:50 +0000 (09:55 +0000)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 4 Aug 2010 19:16:01 +0000 (14:16 -0500)
P1021 processors have no dedicated ROM to store the QE microcode,
so the fimrware is stored externally, and it is U-Boot responsibility
to load it. It might be that the board is booting without QE, e.g.
currently U-Boot doesn't support QE for P1021MDS boards, which means
that QE isn't initialized, and so the board hangs early at boot.

This patch fixes the issue by marking QE as disabled and checking the
state in the probing code. U-Boot should fixup the state if it
initialized the QE.

Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/p1021mds.dts
arch/powerpc/platforms/85xx/mpc85xx_mds.c

index 7fad2df..ad5b852 100644 (file)
                bus-frequency = <0>;
                fsl,qe-num-riscs = <1>;
                fsl,qe-num-snums = <28>;
+               status = "disabled"; /* no firmware loaded */
 
                qeic: interrupt-controller@80 {
                        interrupt-controller;
index 35ab2b4..9dadcff 100644 (file)
@@ -158,6 +158,29 @@ static int mpc8568_mds_phy_fixups(struct phy_device *phydev)
 extern void __init mpc85xx_smp_init(void);
 #endif
 
+#ifdef CONFIG_QUICC_ENGINE
+static struct of_device_id mpc85xx_qe_ids[] __initdata = {
+       { .type = "qe", },
+       { .compatible = "fsl,qe", },
+       { },
+};
+
+static void __init mpc85xx_publish_qe_devices(void)
+{
+       struct device_node *np;
+
+       np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+       if (!of_device_is_available(np)) {
+               of_node_put(np);
+               return;
+       }
+
+       of_platform_bus_probe(NULL, mpc85xx_qe_ids, NULL);
+}
+#else
+static void __init mpc85xx_publish_qe_devices(void) { }
+#endif /* CONFIG_QUICC_ENGINE */
+
 static void __init mpc85xx_mds_setup_arch(void)
 {
        struct device_node *np;
@@ -218,6 +241,11 @@ static void __init mpc85xx_mds_setup_arch(void)
                        return;
        }
 
+       if (!of_device_is_available(np)) {
+               of_node_put(np);
+               return;
+       }
+
        qe_reset();
        of_node_put(np);
 
@@ -369,8 +397,6 @@ static struct of_device_id mpc85xx_ids[] = {
        { .type = "soc", },
        { .compatible = "soc", },
        { .compatible = "simple-bus", },
-       { .type = "qe", },
-       { .compatible = "fsl,qe", },
        { .compatible = "gianfar", },
        { .compatible = "fsl,rapidio-delta", },
        { .compatible = "fsl,mpc8548-guts", },
@@ -382,8 +408,6 @@ static struct of_device_id p1021_ids[] = {
        { .type = "soc", },
        { .compatible = "soc", },
        { .compatible = "simple-bus", },
-       { .type = "qe", },
-       { .compatible = "fsl,qe", },
        { .compatible = "gianfar", },
        {},
 };
@@ -395,16 +419,16 @@ static int __init mpc85xx_publish_devices(void)
        if (machine_is(mpc8569_mds))
                simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
 
-       /* Publish the QE devices */
        of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
+       mpc85xx_publish_qe_devices();
 
        return 0;
 }
 
 static int __init p1021_publish_devices(void)
 {
-       /* Publish the QE devices */
        of_platform_bus_probe(NULL, p1021_ids, NULL);
+       mpc85xx_publish_qe_devices();
 
        return 0;
 }
@@ -443,12 +467,19 @@ static void __init mpc85xx_mds_pic_init(void)
        mpic_init(mpic);
 
 #ifdef CONFIG_QUICC_ENGINE
+       np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+       if (!of_device_is_available(np)) {
+               of_node_put(np);
+               return;
+       }
+
        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
        if (!np) {
                np = of_find_node_by_type(NULL, "qeic");
                if (!np)
                        return;
        }
+
        if (machine_is(p1021_mds))
                qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
                                qe_ic_cascade_high_mpic);