Merge branch 'irq-final-for-linus-v2' of git://git.kernel.org/pub/scm/linux/kernel...
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 29 Mar 2011 17:46:15 +0000 (10:46 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 29 Mar 2011 17:46:15 +0000 (10:46 -0700)
* 'irq-final-for-linus-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (111 commits)
  gpio: ab8500: Mark broken
  genirq: Remove move_*irq leftovers
  genirq: Remove compat code
  drivers: Final irq namespace conversion
  mn10300: Use generic show_interrupts()
  mn10300: Cleanup irq_desc access
  mn10300: Convert genirq namespace
  frv: Use generic show_interrupts()
  frv: Convert genirq namespace
  frv: Select GENERIC_HARDIRQS_NO_DEPRECATED
  frv: Convert cpu irq_chip to new functions
  frv: Convert mb93493 irq_chip to new functions
  frv: Convert mb93093 irq_chip to new function
  frv: Convert mb93091 irq_chip to new functions
  frv: Fix typo from __do_IRQ overhaul
  frv: Remove stale irq_chip.end
  m68k: Convert irq function namespace
  xen: Use new irq_move functions
  xen: Cleanup genirq namespace
  unicore32: Use generic show_interrupts()
  ...

409 files changed:
arch/alpha/Kconfig
arch/alpha/kernel/irq.c
arch/alpha/kernel/irq_alpha.c
arch/alpha/kernel/irq_i8259.c
arch/alpha/kernel/irq_pyxis.c
arch/alpha/kernel/irq_srm.c
arch/alpha/kernel/sys_alcor.c
arch/alpha/kernel/sys_cabriolet.c
arch/alpha/kernel/sys_dp264.c
arch/alpha/kernel/sys_eb64p.c
arch/alpha/kernel/sys_eiger.c
arch/alpha/kernel/sys_jensen.c
arch/alpha/kernel/sys_marvel.c
arch/alpha/kernel/sys_mikasa.c
arch/alpha/kernel/sys_noritake.c
arch/alpha/kernel/sys_rawhide.c
arch/alpha/kernel/sys_rx164.c
arch/alpha/kernel/sys_sable.c
arch/alpha/kernel/sys_takara.c
arch/alpha/kernel/sys_titan.c
arch/alpha/kernel/sys_wildfire.c
arch/arm/Kconfig
arch/arm/common/gic.c
arch/arm/common/it8152.c
arch/arm/common/locomo.c
arch/arm/common/sa1111.c
arch/arm/common/vic.c
arch/arm/include/asm/hw_irq.h
arch/arm/kernel/bios32.c
arch/arm/kernel/ecard.c
arch/arm/kernel/irq.c
arch/arm/mach-at91/at91cap9_devices.c
arch/arm/mach-at91/gpio.c
arch/arm/mach-at91/include/mach/at572d940hf.h
arch/arm/mach-at91/irq.c
arch/arm/mach-bcmring/irq.c
arch/arm/mach-clps711x/irq.c
arch/arm/mach-davinci/cp_intc.c
arch/arm/mach-davinci/gpio.c
arch/arm/mach-davinci/irq.c
arch/arm/mach-dove/include/mach/dove.h
arch/arm/mach-dove/irq.c
arch/arm/mach-dove/mpp.c
arch/arm/mach-ebsa110/core.c
arch/arm/mach-ep93xx/gpio.c
arch/arm/mach-exynos4/irq-combiner.c
arch/arm/mach-exynos4/irq-eint.c
arch/arm/mach-footbridge/common.c
arch/arm/mach-footbridge/dc21285-timer.c
arch/arm/mach-footbridge/isa-irq.c
arch/arm/mach-gemini/gpio.c
arch/arm/mach-gemini/irq.c
arch/arm/mach-h720x/common.c
arch/arm/mach-h720x/cpu-h7202.c
arch/arm/mach-iop13xx/irq.c
arch/arm/mach-iop13xx/msi.c
arch/arm/mach-iop32x/irq.c
arch/arm/mach-iop33x/irq.c
arch/arm/mach-ixp2000/core.c
arch/arm/mach-ixp2000/ixdp2x00.c
arch/arm/mach-ixp2000/ixdp2x01.c
arch/arm/mach-ixp23xx/core.c
arch/arm/mach-ixp23xx/ixdp2351.c
arch/arm/mach-ixp23xx/roadrunner.c
arch/arm/mach-ixp4xx/avila-pci.c
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-ixp4xx/coyote-pci.c
arch/arm/mach-ixp4xx/dsmg600-pci.c
arch/arm/mach-ixp4xx/fsg-pci.c
arch/arm/mach-ixp4xx/gateway7001-pci.c
arch/arm/mach-ixp4xx/goramo_mlr.c
arch/arm/mach-ixp4xx/gtwx5715-pci.c
arch/arm/mach-ixp4xx/ixdp425-pci.c
arch/arm/mach-ixp4xx/ixdpg425-pci.c
arch/arm/mach-ixp4xx/nas100d-pci.c
arch/arm/mach-ixp4xx/nslu2-pci.c
arch/arm/mach-ixp4xx/vulcan-pci.c
arch/arm/mach-ixp4xx/wg302v2-pci.c
arch/arm/mach-kirkwood/irq.c
arch/arm/mach-ks8695/gpio.c
arch/arm/mach-ks8695/irq.c
arch/arm/mach-lpc32xx/irq.c
arch/arm/mach-mmp/irq-mmp2.c
arch/arm/mach-mmp/irq-pxa168.c
arch/arm/mach-msm/board-msm8960.c
arch/arm/mach-msm/board-msm8x60.c
arch/arm/mach-msm/board-trout-gpio.c
arch/arm/mach-msm/board-trout-mmc.c
arch/arm/mach-msm/gpio-v2.c
arch/arm/mach-msm/gpio.c
arch/arm/mach-msm/irq-vic.c
arch/arm/mach-msm/irq.c
arch/arm/mach-msm/sirc.c
arch/arm/mach-mv78xx0/irq.c
arch/arm/mach-mx3/mach-mx31ads.c
arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
arch/arm/mach-mxs/gpio.c
arch/arm/mach-mxs/icoll.c
arch/arm/mach-netx/generic.c
arch/arm/mach-ns9xxx/board-a9m9750dev.c
arch/arm/mach-ns9xxx/include/mach/board.h
arch/arm/mach-ns9xxx/include/mach/module.h
arch/arm/mach-ns9xxx/irq.c
arch/arm/mach-nuc93x/irq.c
arch/arm/mach-omap1/board-osk.c
arch/arm/mach-omap1/board-palmz71.c
arch/arm/mach-omap1/board-voiceblue.c
arch/arm/mach-omap1/fpga.c
arch/arm/mach-omap1/irq.c
arch/arm/mach-omap2/gpmc.c
arch/arm/mach-omap2/irq.c
arch/arm/mach-orion5x/db88f5281-setup.c
arch/arm/mach-orion5x/irq.c
arch/arm/mach-orion5x/rd88f5182-setup.c
arch/arm/mach-orion5x/terastation_pro2-setup.c
arch/arm/mach-orion5x/ts209-setup.c
arch/arm/mach-pnx4008/irq.c
arch/arm/mach-pxa/balloon3.c
arch/arm/mach-pxa/cm-x2xx-pci.c
arch/arm/mach-pxa/cm-x300.c
arch/arm/mach-pxa/irq.c
arch/arm/mach-pxa/lpd270.c
arch/arm/mach-pxa/lubbock.c
arch/arm/mach-pxa/mainstone.c
arch/arm/mach-pxa/pcm990-baseboard.c
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/viper.c
arch/arm/mach-pxa/zeus.c
arch/arm/mach-rpc/irq.c
arch/arm/mach-s3c2410/bast-irq.c
arch/arm/mach-s3c2412/irq.c
arch/arm/mach-s3c2416/irq.c
arch/arm/mach-s3c2440/irq.c
arch/arm/mach-s3c2440/s3c244x-irq.c
arch/arm/mach-s3c2443/irq.c
arch/arm/mach-s3c64xx/irq-eint.c
arch/arm/mach-sa1100/cerf.c
arch/arm/mach-sa1100/irq.c
arch/arm/mach-sa1100/neponset.c
arch/arm/mach-sa1100/pleb.c
arch/arm/mach-shark/irq.c
arch/arm/mach-shmobile/board-ap4evb.c
arch/arm/mach-shmobile/board-mackerel.c
arch/arm/mach-shmobile/intc-sh7367.c
arch/arm/mach-shmobile/intc-sh7372.c
arch/arm/mach-shmobile/intc-sh7377.c
arch/arm/mach-tcc8k/irq.c
arch/arm/mach-tegra/gpio.c
arch/arm/mach-tegra/irq.c
arch/arm/mach-ux500/modem-irq-db5500.c
arch/arm/mach-versatile/core.c
arch/arm/mach-vt8500/irq.c
arch/arm/mach-w90x900/irq.c
arch/arm/plat-mxc/3ds_debugboard.c
arch/arm/plat-mxc/avic.c
arch/arm/plat-mxc/gpio.c
arch/arm/plat-mxc/irq-common.c
arch/arm/plat-mxc/tzic.c
arch/arm/plat-nomadik/gpio.c
arch/arm/plat-omap/gpio.c
arch/arm/plat-orion/gpio.c
arch/arm/plat-orion/irq.c
arch/arm/plat-pxa/gpio.c
arch/arm/plat-s3c24xx/irq.c
arch/arm/plat-s5p/irq-eint.c
arch/arm/plat-s5p/irq-gpioint.c
arch/arm/plat-samsung/irq-uart.c
arch/arm/plat-samsung/irq-vic-timer.c
arch/arm/plat-samsung/wakeup-mask.c
arch/arm/plat-spear/shirq.c
arch/arm/plat-stmp3xxx/irq.c
arch/arm/plat-stmp3xxx/pinmux.c
arch/arm/plat-versatile/fpga-irq.c
arch/blackfin/kernel/irqchip.c
arch/blackfin/kernel/trace.c
arch/blackfin/mach-bf561/smp.c
arch/blackfin/mach-common/ints-priority.c
arch/frv/Kconfig
arch/frv/kernel/irq-mb93091.c
arch/frv/kernel/irq-mb93093.c
arch/frv/kernel/irq-mb93493.c
arch/frv/kernel/irq.c
arch/ia64/Kconfig
arch/ia64/hp/sim/hpsim_irq.c
arch/ia64/include/asm/hw_irq.h
arch/ia64/kernel/iosapic.c
arch/ia64/kernel/irq.c
arch/ia64/kernel/irq_ia64.c
arch/ia64/kernel/irq_lsapic.c
arch/ia64/kernel/mca.c
arch/ia64/kernel/msi_ia64.c
arch/ia64/kernel/smpboot.c
arch/ia64/sn/kernel/irq.c
arch/ia64/sn/kernel/msi_sn.c
arch/ia64/xen/irq_xen.c
arch/m68k/kernel/irq.c
arch/m68k/platform/5249/intc2.c
arch/m68k/platform/5272/intc.c
arch/m68k/platform/68328/ints.c
arch/m68k/platform/68360/ints.c
arch/m68k/platform/coldfire/intc-2.c
arch/m68k/platform/coldfire/intc-simr.c
arch/m68k/platform/coldfire/intc.c
arch/microblaze/Kconfig
arch/microblaze/kernel/intc.c
arch/microblaze/kernel/irq.c
arch/microblaze/pci/pci-common.c
arch/mips/alchemy/devboards/bcsr.c
arch/mips/alchemy/devboards/db1200/setup.c
arch/mips/alchemy/devboards/db1x00/board_setup.c
arch/mips/alchemy/devboards/pb1000/board_setup.c
arch/mips/alchemy/devboards/pb1100/board_setup.c
arch/mips/alchemy/devboards/pb1200/board_setup.c
arch/mips/alchemy/devboards/pb1500/board_setup.c
arch/mips/alchemy/devboards/pb1550/board_setup.c
arch/mips/alchemy/mtx-1/board_setup.c
arch/mips/alchemy/xxs1500/board_setup.c
arch/mips/ar7/irq.c
arch/mips/ath79/irq.c
arch/mips/bcm63xx/irq.c
arch/mips/cavium-octeon/octeon-irq.c
arch/mips/cavium-octeon/setup.c
arch/mips/cavium-octeon/smp.c
arch/mips/dec/ioasic-irq.c
arch/mips/dec/kn02-irq.c
arch/mips/emma/markeins/irq.c
arch/mips/include/asm/mach-cavium-octeon/irq.h
arch/mips/include/asm/octeon/octeon.h
arch/mips/include/asm/unistd.h
arch/mips/jazz/irq.c
arch/mips/jz4740/gpio.c
arch/mips/jz4740/irq.c
arch/mips/kernel/i8259.c
arch/mips/kernel/irq-gic.c
arch/mips/kernel/irq-gt641xx.c
arch/mips/kernel/irq-msc01.c
arch/mips/kernel/irq-rm7000.c
arch/mips/kernel/irq-rm9000.c
arch/mips/kernel/irq.c
arch/mips/kernel/irq_cpu.c
arch/mips/kernel/irq_txx9.c
arch/mips/kernel/smtc.c
arch/mips/lasat/interrupt.c
arch/mips/loongson/common/bonito-irq.c
arch/mips/mti-malta/malta-int.c
arch/mips/mti-malta/malta-time.c
arch/mips/pci/msi-octeon.c
arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
arch/mips/pmc-sierra/msp71xx/msp_smp.c
arch/mips/pnx833x/common/interrupts.c
arch/mips/pnx8550/common/int.c
arch/mips/powertv/asic/irq_asic.c
arch/mips/rb532/irq.c
arch/mips/sgi-ip22/ip22-int.c
arch/mips/sgi-ip27/ip27-irq.c
arch/mips/sgi-ip27/ip27-timer.c
arch/mips/sgi-ip32/ip32-irq.c
arch/mips/sibyte/bcm1480/irq.c
arch/mips/sibyte/sb1250/irq.c
arch/mips/sni/a20r.c
arch/mips/sni/pcimt.c
arch/mips/sni/pcit.c
arch/mips/sni/rm200.c
arch/mips/txx9/generic/irq_tx4927.c
arch/mips/txx9/generic/irq_tx4938.c
arch/mips/txx9/generic/irq_tx4939.c
arch/mips/txx9/jmr3927/irq.c
arch/mips/txx9/rbtx4927/irq.c
arch/mips/txx9/rbtx4938/irq.c
arch/mips/txx9/rbtx4939/irq.c
arch/mips/vr41xx/common/icu.c
arch/mips/vr41xx/common/irq.c
arch/mn10300/Kconfig
arch/mn10300/kernel/irq.c
arch/mn10300/kernel/mn10300-serial.c
arch/mn10300/kernel/smp.c
arch/mn10300/unit-asb2364/irq-fpga.c
arch/parisc/kernel/irq.c
arch/powerpc/Kconfig
arch/powerpc/kernel/irq.c
arch/powerpc/kernel/machine_kexec.c
arch/powerpc/kernel/pci-common.c
arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
arch/powerpc/platforms/52xx/media5200.c
arch/powerpc/platforms/52xx/mpc52xx_gpt.c
arch/powerpc/platforms/52xx/mpc52xx_pic.c
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
arch/powerpc/platforms/85xx/ksi8560.c
arch/powerpc/platforms/85xx/mpc85xx_ads.c
arch/powerpc/platforms/85xx/mpc85xx_cds.c
arch/powerpc/platforms/85xx/mpc85xx_ds.c
arch/powerpc/platforms/85xx/sbc8560.c
arch/powerpc/platforms/85xx/socrates_fpga_pic.c
arch/powerpc/platforms/85xx/stx_gp3.c
arch/powerpc/platforms/85xx/tqm85xx.c
arch/powerpc/platforms/86xx/gef_pic.c
arch/powerpc/platforms/86xx/pic.c
arch/powerpc/platforms/8xx/m8xx_setup.c
arch/powerpc/platforms/cell/axon_msi.c
arch/powerpc/platforms/cell/beat_interrupt.c
arch/powerpc/platforms/cell/interrupt.c
arch/powerpc/platforms/cell/setup.c
arch/powerpc/platforms/cell/spider-pic.c
arch/powerpc/platforms/chrp/setup.c
arch/powerpc/platforms/embedded6xx/flipper-pic.c
arch/powerpc/platforms/embedded6xx/hlwd-pic.c
arch/powerpc/platforms/embedded6xx/holly.c
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
arch/powerpc/platforms/iseries/irq.c
arch/powerpc/platforms/maple/pci.c
arch/powerpc/platforms/pasemi/setup.c
arch/powerpc/platforms/powermac/pci.c
arch/powerpc/platforms/powermac/pic.c
arch/powerpc/platforms/ps3/interrupt.c
arch/powerpc/platforms/pseries/msi.c
arch/powerpc/platforms/pseries/setup.c
arch/powerpc/platforms/pseries/xics.c
arch/powerpc/sysdev/cpm1.c
arch/powerpc/sysdev/cpm2_pic.c
arch/powerpc/sysdev/fsl_msi.c
arch/powerpc/sysdev/i8259.c
arch/powerpc/sysdev/ipic.c
arch/powerpc/sysdev/mpc8xx_pic.c
arch/powerpc/sysdev/mpc8xxx_gpio.c
arch/powerpc/sysdev/mpic.c
arch/powerpc/sysdev/mpic_pasemi_msi.c
arch/powerpc/sysdev/mpic_u3msi.c
arch/powerpc/sysdev/mv64x60_pic.c
arch/powerpc/sysdev/qe_lib/qe_ic.c
arch/powerpc/sysdev/tsi108_pci.c
arch/powerpc/sysdev/uic.c
arch/powerpc/sysdev/xilinx_intc.c
arch/sh/boards/board-magicpanelr2.c
arch/sh/boards/mach-cayman/irq.c
arch/sh/boards/mach-dreamcast/irq.c
arch/sh/boards/mach-ecovec24/setup.c
arch/sh/boards/mach-microdev/irq.c
arch/sh/boards/mach-se/7206/irq.c
arch/sh/boards/mach-se/7343/irq.c
arch/sh/boards/mach-se/7722/irq.c
arch/sh/boards/mach-se/7724/irq.c
arch/sh/boards/mach-x3proto/gpio.c
arch/sh/cchips/hd6446x/hd64461.c
arch/sh/kernel/cpu/irq/imask.c
arch/sh/kernel/cpu/irq/intc-sh5.c
arch/sh/kernel/cpu/irq/ipr.c
arch/sparc/Kconfig
arch/sparc/kernel/irq_64.c
arch/sparc/kernel/pci.c
arch/sparc/kernel/pci_msi.c
arch/unicore32/Kconfig
arch/unicore32/kernel/irq.c
drivers/ata/pata_ixp4xx_cf.c
drivers/ata/pata_rb532_cf.c
drivers/gpio/Kconfig
drivers/hwmon/gpio-fan.c
drivers/input/keyboard/lm8323.c
drivers/input/serio/ams_delta_serio.c
drivers/input/touchscreen/mainstone-wm97xx.c
drivers/input/touchscreen/zylonite-wm97xx.c
drivers/misc/sgi-gru/grufile.c
drivers/mmc/host/sdhci-spear.c
drivers/net/dm9000.c
drivers/net/wireless/p54/p54spi.c
drivers/net/wireless/wl1251/sdio.c
drivers/net/wireless/wl1251/spi.c
drivers/parisc/eisa.c
drivers/parisc/gsc.c
drivers/parisc/superio.c
drivers/pci/dmar.c
drivers/pci/htirq.c
drivers/pci/intel-iommu.c
drivers/pci/intr_remapping.c
drivers/pci/msi.c
drivers/pcmcia/bfin_cf_pcmcia.c
drivers/pcmcia/db1xxx_ss.c
drivers/pcmcia/sa1100_nanoengine.c
drivers/pcmcia/soc_common.c
drivers/pcmcia/xxs1500_ss.c
drivers/platform/x86/intel_pmic_gpio.c
drivers/power/z2_battery.c
drivers/rtc/rtc-sh.c
drivers/sh/intc/core.c
drivers/sh/intc/virq.c
drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c
drivers/tty/hvc/hvc_xen.c
drivers/tty/serial/msm_serial_hs.c
drivers/usb/host/oxu210hp-hcd.c
drivers/usb/musb/tusb6010.c
drivers/w1/masters/ds1wm.c
drivers/xen/events.c
include/linux/irq.h
include/linux/irqdesc.h
kernel/irq/Kconfig
kernel/irq/autoprobe.c
kernel/irq/chip.c
kernel/irq/compat.h [deleted file]
kernel/irq/debug.h
kernel/irq/dummychip.c
kernel/irq/handle.c
kernel/irq/internals.h
kernel/irq/manage.c
kernel/irq/migration.c
kernel/irq/proc.c
kernel/irq/resend.c
kernel/irq/settings.h
kernel/irq/spurious.c

index cc31bec..bd4160c 100644 (file)
@@ -11,6 +11,7 @@ config ALPHA
        select HAVE_GENERIC_HARDIRQS
        select GENERIC_IRQ_PROBE
        select AUTO_IRQ_AFFINITY if SMP
+       select GENERIC_IRQ_SHOW
        select GENERIC_HARDIRQS_NO_DEPRECATED
        help
          The Alpha is a 64-bit general-purpose processor designed and
index a19d600..381431a 100644 (file)
@@ -67,68 +67,21 @@ int irq_select_affinity(unsigned int irq)
 }
 #endif /* CONFIG_SMP */
 
-int
-show_interrupts(struct seq_file *p, void *v)
+int arch_show_interrupts(struct seq_file *p, int prec)
 {
        int j;
-       int irq = *(loff_t *) v;
-       struct irqaction * action;
-       struct irq_desc *desc;
-       unsigned long flags;
 
 #ifdef CONFIG_SMP
-       if (irq == 0) {
-               seq_puts(p, "           ");
-               for_each_online_cpu(j)
-                       seq_printf(p, "CPU%d       ", j);
-               seq_putc(p, '\n');
-       }
-#endif
-
-       if (irq < ACTUAL_NR_IRQS) {
-               desc = irq_to_desc(irq);
-
-               if (!desc)
-                       return 0;
-
-               raw_spin_lock_irqsave(&desc->lock, flags);
-               action = desc->action;
-               if (!action) 
-                       goto unlock;
-               seq_printf(p, "%3d: ", irq);
-#ifndef CONFIG_SMP
-               seq_printf(p, "%10u ", kstat_irqs(irq));
-#else
-               for_each_online_cpu(j)
-                       seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j));
+       seq_puts(p, "IPI: ");
+       for_each_online_cpu(j)
+               seq_printf(p, "%10lu ", cpu_data[j].ipi_count);
+       seq_putc(p, '\n');
 #endif
-               seq_printf(p, " %14s", get_irq_desc_chip(desc)->name);
-               seq_printf(p, "  %c%s",
-                       (action->flags & IRQF_DISABLED)?'+':' ',
-                       action->name);
-
-               for (action=action->next; action; action = action->next) {
-                       seq_printf(p, ", %c%s",
-                                 (action->flags & IRQF_DISABLED)?'+':' ',
-                                  action->name);
-               }
-
-               seq_putc(p, '\n');
-unlock:
-               raw_spin_unlock_irqrestore(&desc->lock, flags);
-       } else if (irq == ACTUAL_NR_IRQS) {
-#ifdef CONFIG_SMP
-               seq_puts(p, "IPI: ");
-               for_each_online_cpu(j)
-                       seq_printf(p, "%10lu ", cpu_data[j].ipi_count);
-               seq_putc(p, '\n');
-#endif
-               seq_puts(p, "PMI: ");
-               for_each_online_cpu(j)
-                       seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j));
-               seq_puts(p, "          Performance Monitoring\n");
-               seq_printf(p, "ERR: %10lu\n", irq_err_count);
-       }
+       seq_puts(p, "PMI: ");
+       for_each_online_cpu(j)
+               seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j));
+       seq_puts(p, "          Performance Monitoring\n");
+       seq_printf(p, "ERR: %10lu\n", irq_err_count);
        return 0;
 }
 
index 411ca11..1479dc6 100644 (file)
@@ -228,7 +228,7 @@ struct irqaction timer_irqaction = {
 void __init
 init_rtc_irq(void)
 {
-       set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip,
+       irq_set_chip_and_handler_name(RTC_IRQ, &no_irq_chip,
                                      handle_simple_irq, "RTC");
        setup_irq(RTC_IRQ, &timer_irqaction);
 }
index c7cc981..e1861c7 100644 (file)
@@ -92,7 +92,7 @@ init_i8259a_irqs(void)
        outb(0xff, 0xA1);       /* mask all of 8259A-2 */
 
        for (i = 0; i < 16; i++) {
-               set_irq_chip_and_handler(i, &i8259a_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &i8259a_irq_type, handle_level_irq);
        }
 
        setup_irq(2, &cascade);
index b30227f..13c97a5 100644 (file)
@@ -102,7 +102,7 @@ init_pyxis_irqs(unsigned long ignore_mask)
        for (i = 16; i < 48; ++i) {
                if ((ignore_mask >> i) & 1)
                        continue;
-               set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &pyxis_irq_type, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index 82a47bb..a79fa30 100644 (file)
@@ -51,7 +51,7 @@ init_srm_irqs(long max, unsigned long ignore_mask)
        for (i = 16; i < max; ++i) {
                if (i < 64 && ((ignore_mask >> i) & 1))
                        continue;
-               set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &srm_irq_type, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 }
index 88d95e8..0e14399 100644 (file)
@@ -125,7 +125,7 @@ alcor_init_irq(void)
                   on while IRQ probing.  */
                if (i >= 16+20 && i <= 16+30)
                        continue;
-               set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &alcor_irq_type, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
        i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq;
index 57eb630..c8c112d 100644 (file)
@@ -105,8 +105,8 @@ common_init_irq(void (*srm_dev_int)(unsigned long v))
                outb(0xff, 0x806);
 
                for (i = 16; i < 35; ++i) {
-                       set_irq_chip_and_handler(i, &cabriolet_irq_type,
-                               handle_level_irq);
+                       irq_set_chip_and_handler(i, &cabriolet_irq_type,
+                                                handle_level_irq);
                        irq_set_status_flags(i, IRQ_LEVEL);
                }
        }
index 481df4e..5ac00fd 100644 (file)
@@ -270,7 +270,7 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax)
 {
        long i;
        for (i = imin; i <= imax; ++i) {
-               set_irq_chip_and_handler(i, ops, handle_level_irq);
+               irq_set_chip_and_handler(i, ops, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 }
index 402e908..a7a23b4 100644 (file)
@@ -118,7 +118,7 @@ eb64p_init_irq(void)
        init_i8259a_irqs();
 
        for (i = 16; i < 32; ++i) {
-               set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &eb64p_irq_type, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index 0b44a54..a60cd5b 100644 (file)
@@ -138,7 +138,7 @@ eiger_init_irq(void)
        init_i8259a_irqs();
 
        for (i = 16; i < 128; ++i) {
-               set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &eiger_irq_type, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 }
index 00341b7..7f1a87f 100644 (file)
@@ -171,11 +171,11 @@ jensen_init_irq(void)
 {
        init_i8259a_irqs();
 
-       set_irq_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq);
-       set_irq_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq);
-       set_irq_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq);
-       set_irq_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq);
-       set_irq_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq);
+       irq_set_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq);
+       irq_set_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq);
+       irq_set_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq);
+       irq_set_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq);
+       irq_set_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq);
 
        common_init_isa_dma();
 }
index e619107..388b99d 100644 (file)
@@ -276,7 +276,7 @@ init_io7_irqs(struct io7 *io7,
 
        /* Set up the lsi irqs.  */
        for (i = 0; i < 128; ++i) {
-               set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq);
+               irq_set_chip_and_handler(base + i, lsi_ops, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
@@ -290,7 +290,7 @@ init_io7_irqs(struct io7 *io7,
 
        /* Set up the msi irqs.  */
        for (i = 128; i < (128 + 512); ++i) {
-               set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq);
+               irq_set_chip_and_handler(base + i, msi_ops, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
@@ -308,8 +308,8 @@ marvel_init_irq(void)
 
        /* Reserve the legacy irqs.  */
        for (i = 0; i < 16; ++i) {
-               set_irq_chip_and_handler(i, &marvel_legacy_irq_type,
-                       handle_level_irq);
+               irq_set_chip_and_handler(i, &marvel_legacy_irq_type,
+                                        handle_level_irq);
        }
 
        /* Init the io7 irqs.  */
index cf7f43d..0e6e469 100644 (file)
@@ -98,7 +98,8 @@ mikasa_init_irq(void)
        mikasa_update_irq_hw(0);
 
        for (i = 16; i < 32; ++i) {
-               set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &mikasa_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index 92bc188..a00ac70 100644 (file)
@@ -127,7 +127,8 @@ noritake_init_irq(void)
        outw(0, 0x54c);
 
        for (i = 16; i < 48; ++i) {
-               set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &noritake_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index 936d414..7f52161 100644 (file)
@@ -180,7 +180,8 @@ rawhide_init_irq(void)
        }
 
        for (i = 16; i < 128; ++i) {
-               set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &rawhide_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index cea22a6..216d94d 100644 (file)
@@ -99,7 +99,7 @@ rx164_init_irq(void)
 
        rx164_update_irq_hw(0);
        for (i = 16; i < 40; ++i) {
-               set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &rx164_irq_type, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index a349538..da714e4 100644 (file)
@@ -518,8 +518,8 @@ sable_lynx_init_irq(int nr_of_irqs)
        long i;
 
        for (i = 0; i < nr_of_irqs; ++i) {
-               set_irq_chip_and_handler(i, &sable_lynx_irq_type,
-                       handle_level_irq);
+               irq_set_chip_and_handler(i, &sable_lynx_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index 42a5331..a31f8cd 100644 (file)
@@ -138,7 +138,8 @@ takara_init_irq(void)
                takara_update_irq_hw(i, -1);
 
        for (i = 16; i < 128; ++i) {
-               set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq);
+               irq_set_chip_and_handler(i, &takara_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 
index 8c13a0c..fea0e46 100644 (file)
@@ -179,7 +179,7 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax)
 {
        long i;
        for (i = imin; i <= imax; ++i) {
-               set_irq_chip_and_handler(i, ops, handle_level_irq);
+               irq_set_chip_and_handler(i, ops, handle_level_irq);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
 }
index ca60a38..d3cb28b 100644 (file)
@@ -183,17 +183,17 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
        for (i = 0; i < 16; ++i) {
                if (i == 2)
                        continue;
-               set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
-                       handle_level_irq);
+               irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i + irq_bias, IRQ_LEVEL);
        }
 
-       set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type,
-               handle_level_irq);
+       irq_set_chip_and_handler(36 + irq_bias, &wildfire_irq_type,
+                                handle_level_irq);
        irq_set_status_flags(36 + irq_bias, IRQ_LEVEL);
        for (i = 40; i < 64; ++i) {
-               set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
-                       handle_level_irq);
+               irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type,
+                                        handle_level_irq);
                irq_set_status_flags(i + irq_bias, IRQ_LEVEL);
        }
 
index efe06e0..7c0effb 100644 (file)
@@ -28,6 +28,7 @@ config ARM
        select HAVE_C_RECORDMCOUNT
        select HAVE_GENERIC_HARDIRQS
        select HAVE_SPARSE_IRQ
+       select GENERIC_IRQ_SHOW
        help
          The ARM series is a line of low-power-consumption RISC chip designs
          licensed by ARM Ltd and targeted at embedded applications and
index cb6b041..f70ec7d 100644 (file)
@@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
 
 static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
-       struct gic_chip_data *chip_data = get_irq_data(irq);
-       struct irq_chip *chip = get_irq_chip(irq);
+       struct gic_chip_data *chip_data = irq_get_handler_data(irq);
+       struct irq_chip *chip = irq_get_chip(irq);
        unsigned int cascade_irq, gic_irq;
        unsigned long status;
 
@@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
 {
        if (gic_nr >= MAX_GIC_NR)
                BUG();
-       if (set_irq_data(irq, &gic_data[gic_nr]) != 0)
+       if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0)
                BUG();
-       set_irq_chained_handler(irq, gic_handle_cascade_irq);
+       irq_set_chained_handler(irq, gic_handle_cascade_irq);
 }
 
 static void __init gic_dist_init(struct gic_chip_data *gic,
@@ -319,9 +319,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
         * Setup the Linux IRQ subsystem.
         */
        for (i = irq_start; i < irq_limit; i++) {
-               set_irq_chip(i, &gic_chip);
-               set_irq_chip_data(i, gic);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &gic_chip, handle_level_irq);
+               irq_set_chip_data(i, gic);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 
@@ -382,7 +381,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
        unsigned long flags;
 
        local_irq_save(flags);
-       irq_to_desc(irq)->status |= IRQ_NOPROBE;
+       irq_set_status_flags(irq, IRQ_NOPROBE);
        gic_unmask_irq(irq_get_irq_data(irq));
        local_irq_restore(flags);
 }
index fcddd48..7a21927 100644 (file)
@@ -88,8 +88,8 @@ void it8152_init_irq(void)
        __raw_writel((0), IT8152_INTC_LDCNIRR);
 
        for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) {
-               set_irq_chip(irq, &it8152_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &it8152_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
index a026a6b..b55c362 100644 (file)
@@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = {
 
 static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 {
-       struct locomo *lchip = get_irq_chip_data(irq);
+       struct locomo *lchip = irq_get_chip_data(irq);
        int req, i;
 
        /* Acknowledge the parent IRQ */
@@ -197,15 +197,14 @@ static void locomo_setup_irq(struct locomo *lchip)
        /*
         * Install handler for IRQ_LOCOMO_HW.
         */
-       set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
-       set_irq_chip_data(lchip->irq, lchip);
-       set_irq_chained_handler(lchip->irq, locomo_handler);
+       irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
+       irq_set_chip_data(lchip->irq, lchip);
+       irq_set_chained_handler(lchip->irq, locomo_handler);
 
        /* Install handlers for IRQ_LOCOMO_* */
        for ( ; irq <= lchip->irq_base + 3; irq++) {
-               set_irq_chip(irq, &locomo_chip);
-               set_irq_chip_data(irq, lchip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq);
+               irq_set_chip_data(irq, lchip);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
@@ -476,8 +475,8 @@ static void __locomo_remove(struct locomo *lchip)
        device_for_each_child(lchip->dev, NULL, locomo_remove_child);
 
        if (lchip->irq != NO_IRQ) {
-               set_irq_chained_handler(lchip->irq, NULL);
-               set_irq_data(lchip->irq, NULL);
+               irq_set_chained_handler(lchip->irq, NULL);
+               irq_set_handler_data(lchip->irq, NULL);
        }
 
        iounmap(lchip->base);
index eb9796b..a12b33c 100644 (file)
@@ -202,7 +202,7 @@ static void
 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
        unsigned int stat0, stat1, i;
-       struct sa1111 *sachip = get_irq_data(irq);
+       struct sa1111 *sachip = irq_get_handler_data(irq);
        void __iomem *mapbase = sachip->base + SA1111_INTC;
 
        stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
@@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
        sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
 
        for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
-               set_irq_chip(irq, &sa1111_low_chip);
-               set_irq_chip_data(irq, sachip);
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &sa1111_low_chip,
+                                        handle_edge_irq);
+               irq_set_chip_data(irq, sachip);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
        for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
-               set_irq_chip(irq, &sa1111_high_chip);
-               set_irq_chip_data(irq, sachip);
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &sa1111_high_chip,
+                                        handle_edge_irq);
+               irq_set_chip_data(irq, sachip);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
        /*
         * Register SA1111 interrupt
         */
-       set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
-       set_irq_data(sachip->irq, sachip);
-       set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
+       irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
+       irq_set_handler_data(sachip->irq, sachip);
+       irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
 }
 
 /*
@@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip)
        clk_disable(sachip->clk);
 
        if (sachip->irq != NO_IRQ) {
-               set_irq_chained_handler(sachip->irq, NULL);
-               set_irq_data(sachip->irq, NULL);
+               irq_set_chained_handler(sachip->irq, NULL);
+               irq_set_handler_data(sachip->irq, NULL);
 
                release_mem_region(sachip->phys + SA1111_INTC, 512);
        }
index ae5fe72..113085a 100644 (file)
@@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base,
                if (vic_sources & (1 << i)) {
                        unsigned int irq = irq_start + i;
 
-                       set_irq_chip(irq, &vic_chip);
-                       set_irq_chip_data(irq, base);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &vic_chip,
+                                                handle_level_irq);
+                       irq_set_chip_data(irq, base);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
        }
index 5586b7c..a71b417 100644 (file)
@@ -10,14 +10,6 @@ static inline void ack_bad_irq(int irq)
        irq_err_count++;
 }
 
-/*
- * Obsolete inline function for calling irq descriptor handlers.
- */
-static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc)
-{
-       desc->handle_irq(irq, desc);
-}
-
 void set_irq_flags(unsigned int irq, unsigned int flags);
 
 #define IRQF_VALID     (1 << 0)
index d86fcd4..e4ee050 100644 (file)
@@ -158,31 +158,6 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285);
 
-/*
- * Same as above. The PrPMC800 carrier board for the PrPMC1100 
- * card maps the host-bridge @ 00:01:00 for some reason and it
- * ends up getting scanned. Note that we only want to do this
- * fixup when we find the IXP4xx on a PrPMC system, which is why
- * we check the machine type. We could be running on a board
- * with an IXP4xx target device and we don't want to kill the
- * resources in that case.
- */
-static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev)
-{
-       int i;
-
-       if (machine_is_prpmc1100()) {
-               dev->class &= 0xff;
-               dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
-               for (i = 0; i < PCI_NUM_RESOURCES; i++) {
-                       dev->resource[i].start = 0;
-                       dev->resource[i].end   = 0;
-                       dev->resource[i].flags = 0;
-               }
-       }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100);
-
 /*
  * PCI IDE controllers use non-standard I/O port decoding, respect it.
  */
index 2ad62df..d165001 100644 (file)
@@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type)
         */
        if (slot < 8) {
                ec->irq = 32 + slot;
-               set_irq_chip(ec->irq, &ecard_chip);
-               set_irq_handler(ec->irq, handle_level_irq);
+               irq_set_chip_and_handler(ec->irq, &ecard_chip,
+                                        handle_level_irq);
                set_irq_flags(ec->irq, IRQF_VALID);
        }
 
@@ -1103,7 +1103,7 @@ static int __init ecard_init(void)
 
        irqhw = ecard_probeirqhw();
 
-       set_irq_chained_handler(IRQ_EXPANSIONCARD,
+       irq_set_chained_handler(IRQ_EXPANSIONCARD,
                                irqhw ? ecard_irqexp_handler : ecard_irq_handler);
 
        ecard_proc_init();
index 3535d37..83bbad0 100644 (file)
 
 unsigned long irq_err_count;
 
-int show_interrupts(struct seq_file *p, void *v)
+int arch_show_interrupts(struct seq_file *p, int prec)
 {
-       int i = *(loff_t *) v, cpu;
-       struct irq_desc *desc;
-       struct irqaction * action;
-       unsigned long flags;
-       int prec, n;
-
-       for (prec = 3, n = 1000; prec < 10 && n <= nr_irqs; prec++)
-               n *= 10;
-
-#ifdef CONFIG_SMP
-       if (prec < 4)
-               prec = 4;
-#endif
-
-       if (i == 0) {
-               char cpuname[12];
-
-               seq_printf(p, "%*s ", prec, "");
-               for_each_present_cpu(cpu) {
-                       sprintf(cpuname, "CPU%d", cpu);
-                       seq_printf(p, " %10s", cpuname);
-               }
-               seq_putc(p, '\n');
-       }
-
-       if (i < nr_irqs) {
-               desc = irq_to_desc(i);
-               raw_spin_lock_irqsave(&desc->lock, flags);
-               action = desc->action;
-               if (!action)
-                       goto unlock;
-
-               seq_printf(p, "%*d: ", prec, i);
-               for_each_present_cpu(cpu)
-                       seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
-               seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-");
-               seq_printf(p, "  %s", action->name);
-               for (action = action->next; action; action = action->next)
-                       seq_printf(p, ", %s", action->name);
-
-               seq_putc(p, '\n');
-unlock:
-               raw_spin_unlock_irqrestore(&desc->lock, flags);
-       } else if (i == nr_irqs) {
 #ifdef CONFIG_FIQ
-               show_fiq_list(p, prec);
+       show_fiq_list(p, prec);
 #endif
 #ifdef CONFIG_SMP
-               show_ipi_list(p, prec);
+       show_ipi_list(p, prec);
 #endif
 #ifdef CONFIG_LOCAL_TIMERS
-               show_local_irqs(p, prec);
+       show_local_irqs(p, prec);
 #endif
-               seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
-       }
+       seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
        return 0;
 }
 
@@ -144,24 +99,21 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
 
 void set_irq_flags(unsigned int irq, unsigned int iflags)
 {
-       struct irq_desc *desc;
-       unsigned long flags;
+       unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
 
        if (irq >= nr_irqs) {
                printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq);
                return;
        }
 
-       desc = irq_to_desc(irq);
-       raw_spin_lock_irqsave(&desc->lock, flags);
-       desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
        if (iflags & IRQF_VALID)
-               desc->status &= ~IRQ_NOREQUEST;
+               clr |= IRQ_NOREQUEST;
        if (iflags & IRQF_PROBE)
-               desc->status &= ~IRQ_NOPROBE;
+               clr |= IRQ_NOPROBE;
        if (!(iflags & IRQF_NOAUTOEN))
-               desc->status &= ~IRQ_NOAUTOEN;
-       raw_spin_unlock_irqrestore(&desc->lock, flags);
+               clr |= IRQ_NOAUTOEN;
+       /* Order is clear bits in "clr" then set bits in "set" */
+       irq_modify_status(irq, clr, set & ~clr);
 }
 
 void __init init_IRQ(void)
index d1f775e..9ffbf3a 100644 (file)
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
                return;
 
        if (cpu_is_at91cap9_revB())
-               set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
+               irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
 
        /* Enable VBus control for UHP ports */
        for (i = 0; i < data->ports; i++) {
@@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = {
 void __init at91_add_device_usba(struct usba_platform_data *data)
 {
        if (cpu_is_at91cap9_revB()) {
-               set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
+               irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
        }
@@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
                return;
 
        if (cpu_is_at91cap9_revB())
-               set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
+               irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
 
        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
index af818a2..4615528 100644 (file)
@@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
        else
                wakeups[bank] &= ~mask;
 
-       set_irq_wake(gpio_chip[bank].bank->id, state);
+       irq_set_irq_wake(gpio_chip[bank].bank->id, state);
 
        return 0;
 }
@@ -375,6 +375,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
 
 static struct irq_chip gpio_irqchip = {
        .name           = "GPIO",
+       .irq_disable    = gpio_irq_mask,
        .irq_mask       = gpio_irq_mask,
        .irq_unmask     = gpio_irq_unmask,
        .irq_set_type   = gpio_irq_type,
@@ -384,16 +385,14 @@ static struct irq_chip gpio_irqchip = {
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 {
        unsigned        pin;
-       struct irq_desc *gpio;
-       struct at91_gpio_chip *at91_gpio;
-       void __iomem    *pio;
+       struct irq_data *idata = irq_desc_get_irq_data(desc);
+       struct irq_chip *chip = irq_data_get_irq_chip(idata);
+       struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
+       void __iomem    *pio = at91_gpio->regbase;
        u32             isr;
 
-       at91_gpio = get_irq_chip_data(irq);
-       pio = at91_gpio->regbase;
-
        /* temporarily mask (level sensitive) parent IRQ */
-       desc->irq_data.chip->irq_ack(&desc->irq_data);
+       chip->irq_ack(idata);
        for (;;) {
                /* Reading ISR acks pending (edge triggered) GPIO interrupts.
                 * When there none are pending, we're finished unless we need
@@ -409,27 +408,15 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                }
 
                pin = at91_gpio->chip.base;
-               gpio = &irq_desc[pin];
 
                while (isr) {
-                       if (isr & 1) {
-                               if (unlikely(gpio->depth)) {
-                                       /*
-                                        * The core ARM interrupt handler lazily disables IRQs so
-                                        * another IRQ must be generated before it actually gets
-                                        * here to be disabled on the GPIO controller.
-                                        */
-                                       gpio_irq_mask(irq_get_irq_data(pin));
-                               }
-                               else
-                                       generic_handle_irq(pin);
-                       }
+                       if (isr & 1)
+                               generic_handle_irq(pin);
                        pin++;
-                       gpio++;
                        isr >>= 1;
                }
        }
-       desc->irq_data.chip->irq_unmask(&desc->irq_data);
+       chip->irq_unmask(idata);
        /* now it may re-trigger */
 }
 
@@ -518,14 +505,14 @@ void __init at91_gpio_irq_setup(void)
                __raw_writel(~0, this->regbase + PIO_IDR);
 
                for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
-                       lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class);
+                       irq_set_lockdep_class(pin, &gpio_lock_class);
 
                        /*
                         * Can use the "simple" and not "edge" handler since it's
                         * shorter, and the AIC handles interrupts sanely.
                         */
-                       set_irq_chip(pin, &gpio_irqchip);
-                       set_irq_handler(pin, handle_simple_irq);
+                       irq_set_chip_and_handler(pin, &gpio_irqchip,
+                                                handle_simple_irq);
                        set_irq_flags(pin, IRQF_VALID);
                }
 
@@ -536,8 +523,8 @@ void __init at91_gpio_irq_setup(void)
                if (prev && prev->next == this)
                        continue;
 
-               set_irq_chip_data(id, this);
-               set_irq_chained_handler(id, gpio_irq_handler);
+               irq_set_chip_data(id, this);
+               irq_set_chained_handler(id, gpio_irq_handler);
        }
        pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
 }
index 2d9b0af..be510cf 100644 (file)
@@ -89,7 +89,7 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_SDRAMC    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_SMC       (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
index b56d6b3..9665265 100644 (file)
@@ -143,8 +143,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
                /* Active Low interrupt, with the specified priority */
                at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 
-               set_irq_chip(i, &at91_aic_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 
                /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
index 84dcda0..c48feaf 100644 (file)
@@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip,
        unsigned int i;
        for (i = 0; i < 32; i++) {
                unsigned int irq = irq_start + i;
-               set_irq_chip(irq, chip);
-               set_irq_chip_data(irq, base);
+               irq_set_chip(irq, chip);
+               irq_set_chip_data(irq, base);
 
                if (vic_sources & (1 << i)) {
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_handler(irq, handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
        }
@@ -119,9 +119,9 @@ void __init bcmring_init_irq(void)
 
        /* special cases */
        if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
-               set_irq_handler(IRQ_GPIO0, handle_simple_irq);
+               irq_set_handler(IRQ_GPIO0, handle_simple_irq);
        }
        if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
-               set_irq_handler(IRQ_GPIO1, handle_simple_irq);
+               irq_set_handler(IRQ_GPIO1, handle_simple_irq);
        }
 }
index 86da7a1..c2eceee 100644 (file)
@@ -112,13 +112,13 @@ void __init clps711x_init_irq(void)
 
        for (i = 0; i < NR_IRQS; i++) {
                if (INT1_IRQS & (1 << i)) {
-                       set_irq_handler(i, handle_level_irq);
-                       set_irq_chip(i, &int1_chip);
+                       irq_set_chip_and_handler(i, &int1_chip,
+                                                handle_level_irq);
                        set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                }
                if (INT2_IRQS & (1 << i)) {
-                       set_irq_handler(i, handle_level_irq);
-                       set_irq_chip(i, &int2_chip);
+                       irq_set_chip_and_handler(i, &int2_chip,
+                                                handle_level_irq);
                        set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                }                       
        }
index 9abc80a..f83152d 100644 (file)
@@ -167,9 +167,9 @@ void __init cp_intc_init(void)
 
        /* Set up genirq dispatching for cp_intc */
        for (i = 0; i < num_irq; i++) {
-               set_irq_chip(i, &cp_intc_irq_chip);
+               irq_set_chip(i, &cp_intc_irq_chip);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-               set_irq_handler(i, handle_edge_irq);
+               irq_set_handler(i, handle_edge_irq);
        }
 
        /* Enable global interrupt */
index 20d66e5..a0b8388 100644 (file)
@@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
 {
        struct davinci_gpio_regs __iomem *g;
 
-       g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq);
+       g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq);
 
        return g;
 }
@@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup);
 static void gpio_irq_disable(struct irq_data *d)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-       u32 mask = (u32) irq_data_get_irq_data(d);
+       u32 mask = (u32) irq_data_get_irq_handler_data(d);
 
        __raw_writel(mask, &g->clr_falling);
        __raw_writel(mask, &g->clr_rising);
@@ -217,8 +217,8 @@ static void gpio_irq_disable(struct irq_data *d)
 static void gpio_irq_enable(struct irq_data *d)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-       u32 mask = (u32) irq_data_get_irq_data(d);
-       unsigned status = irq_desc[d->irq].status;
+       u32 mask = (u32) irq_data_get_irq_handler_data(d);
+       unsigned status = irqd_get_trigger_type(d);
 
        status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
        if (!status)
@@ -233,21 +233,11 @@ static void gpio_irq_enable(struct irq_data *d)
 static int gpio_irq_type(struct irq_data *d, unsigned trigger)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-       u32 mask = (u32) irq_data_get_irq_data(d);
+       u32 mask = (u32) irq_data_get_irq_handler_data(d);
 
        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
                return -EINVAL;
 
-       irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
-       irq_desc[d->irq].status |= trigger;
-
-       /* don't enable the IRQ if it's currently disabled */
-       if (irq_desc[d->irq].depth == 0) {
-               __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
-                            ? &g->set_falling : &g->clr_falling);
-               __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
-                            ? &g->set_rising : &g->clr_rising);
-       }
        return 0;
 }
 
@@ -256,6 +246,7 @@ static struct irq_chip gpio_irqchip = {
        .irq_enable     = gpio_irq_enable,
        .irq_disable    = gpio_irq_disable,
        .irq_set_type   = gpio_irq_type,
+       .flags          = IRQCHIP_SET_TYPE_MASKED,
 };
 
 static void
@@ -285,7 +276,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                        status >>= 16;
 
                /* now demux them to the right lowlevel handler */
-               n = (int)get_irq_data(irq);
+               n = (int)irq_get_handler_data(irq);
                while (status) {
                        res = ffs(status);
                        n += res;
@@ -323,7 +314,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
 static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-       u32 mask = (u32) irq_data_get_irq_data(d);
+       u32 mask = (u32) irq_data_get_irq_handler_data(d);
 
        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
                return -EINVAL;
@@ -395,7 +386,7 @@ static int __init davinci_gpio_irq_setup(void)
 
                /* AINTC handles mask/unmask; GPIO handles triggering */
                irq = bank_irq;
-               gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq));
+               gpio_irqchip_unbanked = *irq_get_chip(irq);
                gpio_irqchip_unbanked.name = "GPIO-AINTC";
                gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
 
@@ -406,10 +397,10 @@ static int __init davinci_gpio_irq_setup(void)
 
                /* set the direct IRQs up to use that irqchip */
                for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
-                       set_irq_chip(irq, &gpio_irqchip_unbanked);
-                       set_irq_data(irq, (void *) __gpio_mask(gpio));
-                       set_irq_chip_data(irq, (__force void *) g);
-                       irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH;
+                       irq_set_chip(irq, &gpio_irqchip_unbanked);
+                       irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
+                       irq_set_chip_data(irq, (__force void *)g);
+                       irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
                }
 
                goto done;
@@ -430,15 +421,15 @@ static int __init davinci_gpio_irq_setup(void)
                __raw_writel(~0, &g->clr_rising);
 
                /* set up all irqs in this bank */
-               set_irq_chained_handler(bank_irq, gpio_irq_handler);
-               set_irq_chip_data(bank_irq, (__force void *) g);
-               set_irq_data(bank_irq, (void *) irq);
+               irq_set_chained_handler(bank_irq, gpio_irq_handler);
+               irq_set_chip_data(bank_irq, (__force void *)g);
+               irq_set_handler_data(bank_irq, (void *)irq);
 
                for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
-                       set_irq_chip(irq, &gpio_irqchip);
-                       set_irq_chip_data(irq, (__force void *) g);
-                       set_irq_data(irq, (void *) __gpio_mask(gpio));
-                       set_irq_handler(irq, handle_simple_irq);
+                       irq_set_chip(irq, &gpio_irqchip);
+                       irq_set_chip_data(irq, (__force void *)g);
+                       irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
+                       irq_set_handler(irq, handle_simple_irq);
                        set_irq_flags(irq, IRQF_VALID);
                }
 
index 5e05c9b..e6269a6 100644 (file)
@@ -154,11 +154,11 @@ void __init davinci_irq_init(void)
 
        /* set up genirq dispatch for ARM INTC */
        for (i = 0; i < davinci_soc_info.intc_irq_num; i++) {
-               set_irq_chip(i, &davinci_irq_chip_0);
+               irq_set_chip(i, &davinci_irq_chip_0);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                if (i != IRQ_TINT1_TINT34)
-                       set_irq_handler(i, handle_edge_irq);
+                       irq_set_handler(i, handle_edge_irq);
                else
-                       set_irq_handler(i, handle_level_irq);
+                       irq_set_handler(i, handle_level_irq);
        }
 }
index e5fcdd3..b20ec9a 100644 (file)
 #define DOVE_MPP_GENERAL_VIRT_BASE     (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
 #define  DOVE_AU1_SPDIFO_GPIO_EN       (1 << 1)
 #define  DOVE_NAND_GPIO_EN             (1 << 0)
-#define DOVE_MPP_CTRL4_VIRT_BASE       (DOVE_GPIO_VIRT_BASE + 0x40)
+#define DOVE_MPP_CTRL4_VIRT_BASE       (DOVE_GPIO_LO_VIRT_BASE + 0x40)
 #define  DOVE_SPI_GPIO_SEL             (1 << 5)
 #define  DOVE_UART1_GPIO_SEL           (1 << 4)
 #define  DOVE_AU1_GPIO_SEL             (1 << 3)
index 101707f..f07fd16 100644 (file)
@@ -86,8 +86,7 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
                if (!(cause & (1 << irq)))
                        continue;
                irq = pmu_to_irq(irq);
-               desc = irq_desc + irq;
-               desc_handle_irq(irq, desc);
+               generic_handle_irq(irq);
        }
 }
 
@@ -103,14 +102,14 @@ void __init dove_init_irq(void)
         */
        orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
                        IRQ_DOVE_GPIO_START);
-       set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
 
        orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
                        IRQ_DOVE_GPIO_START + 32);
-       set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
 
        orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
                        IRQ_DOVE_GPIO_START + 64);
@@ -122,10 +121,9 @@ void __init dove_init_irq(void)
        writel(0, PMU_INTERRUPT_CAUSE);
 
        for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
-               set_irq_chip(i, &pmu_irq_chip);
-               set_irq_handler(i, handle_level_irq);
-               irq_desc[i].status |= IRQ_LEVEL;
+               irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq);
+               irq_set_status_flags(i, IRQ_LEVEL);
                set_irq_flags(i, IRQF_VALID);
        }
-       set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
+       irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
 }
index 71db2bd..c66c763 100644 (file)
@@ -147,9 +147,6 @@ void __init dove_mpp_conf(unsigned int *mpp_list)
        u32 pmu_sig_ctrl[PMU_SIG_REGS];
        int i;
 
-       /* Initialize gpiolib. */
-       orion_gpio_init();
-
        for (i = 0; i < MPP_NR_REGS; i++)
                mpp_ctrl[i] = readl(MPP_CTRL(i));
 
index 7df083f..087bc77 100644 (file)
@@ -66,8 +66,8 @@ static void __init ebsa110_init_irq(void)
        local_irq_restore(flags);
 
        for (irq = 0; irq < NR_IRQS; irq++) {
-               set_irq_chip(irq, &ebsa110_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
index 34e071d..180b8a9 100644 (file)
@@ -117,7 +117,7 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d)
        int port = line >> 3;
        int port_mask = 1 << (line & 7);
 
-       if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+       if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
                ep93xx_gpio_update_int_params(port);
        }
@@ -131,7 +131,7 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
        int port = line >> 3;
        int port_mask = 1 << (line & 7);
 
-       if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
+       if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH)
                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
 
        gpio_int_unmasked[port] &= ~port_mask;
@@ -165,10 +165,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d)
  */
 static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
-       struct irq_desc *desc = irq_desc + d->irq;
        const int gpio = irq_to_gpio(d->irq);
        const int port = gpio >> 3;
        const int port_mask = 1 << (gpio & 7);
+       irq_flow_handler_t handler;
 
        gpio_direction_input(gpio);
 
@@ -176,22 +176,22 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
        case IRQ_TYPE_EDGE_RISING:
                gpio_int_type1[port] |= port_mask;
                gpio_int_type2[port] |= port_mask;
-               desc->handle_irq = handle_edge_irq;
+               handler = handle_edge_irq;
                break;
        case IRQ_TYPE_EDGE_FALLING:
                gpio_int_type1[port] |= port_mask;
                gpio_int_type2[port] &= ~port_mask;
-               desc->handle_irq = handle_edge_irq;
+               handler = handle_edge_irq;
                break;
        case IRQ_TYPE_LEVEL_HIGH:
                gpio_int_type1[port] &= ~port_mask;
                gpio_int_type2[port] |= port_mask;
-               desc->handle_irq = handle_level_irq;
+               handler = handle_level_irq;
                break;
        case IRQ_TYPE_LEVEL_LOW:
                gpio_int_type1[port] &= ~port_mask;
                gpio_int_type2[port] &= ~port_mask;
-               desc->handle_irq = handle_level_irq;
+               handler = handle_level_irq;
                break;
        case IRQ_TYPE_EDGE_BOTH:
                gpio_int_type1[port] |= port_mask;
@@ -200,17 +200,16 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
                        gpio_int_type2[port] &= ~port_mask; /* falling */
                else
                        gpio_int_type2[port] |= port_mask; /* rising */
-               desc->handle_irq = handle_edge_irq;
+               handler = handle_edge_irq;
                break;
        default:
                pr_err("failed to set irq type %d for gpio %d\n", type, gpio);
                return -EINVAL;
        }
 
-       gpio_int_enabled[port] |= port_mask;
+       __irq_set_handler_locked(d->irq, handler);
 
-       desc->status &= ~IRQ_TYPE_SENSE_MASK;
-       desc->status |= type & IRQ_TYPE_SENSE_MASK;
+       gpio_int_enabled[port] |= port_mask;
 
        ep93xx_gpio_update_int_params(port);
 
@@ -232,20 +231,29 @@ void __init ep93xx_gpio_init_irq(void)
 
        for (gpio_irq = gpio_to_irq(0);
             gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) {
-               set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip);
-               set_irq_handler(gpio_irq, handle_level_irq);
+               irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(gpio_irq, IRQF_VALID);
        }
 
-       set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler);
-       set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO_AB,
+                               ep93xx_gpio_ab_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX,
+                               ep93xx_gpio_f_irq_handler);
+       irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX,
+                               ep93xx_gpio_f_irq_handler);
 }
 
 
index 31618d9..f488b66 100644 (file)
@@ -54,8 +54,8 @@ static void combiner_unmask_irq(struct irq_data *data)
 
 static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
-       struct combiner_chip_data *chip_data = get_irq_data(irq);
-       struct irq_chip *chip = get_irq_chip(irq);
+       struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
+       struct irq_chip *chip = irq_get_chip(irq);
        unsigned int cascade_irq, combiner_irq;
        unsigned long status;
 
@@ -93,9 +93,9 @@ void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
 {
        if (combiner_nr >= MAX_COMBINER_NR)
                BUG();
-       if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0)
+       if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
                BUG();
-       set_irq_chained_handler(irq, combiner_handle_cascade_irq);
+       irq_set_chained_handler(irq, combiner_handle_cascade_irq);
 }
 
 void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
@@ -119,9 +119,8 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
 
        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
                                + MAX_IRQ_IN_COMBINER; i++) {
-               set_irq_chip(i, &combiner_chip);
-               set_irq_chip_data(i, &combiner_data[combiner_nr]);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
+               irq_set_chip_data(i, &combiner_data[combiner_nr]);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 }
index 4f7ad4a..9d87d2a 100644 (file)
@@ -190,8 +190,8 @@ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 
 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 {
-       u32 *irq_data = get_irq_data(irq);
-       struct irq_chip *chip = get_irq_chip(irq);
+       u32 *irq_data = irq_get_handler_data(irq);
+       struct irq_chip *chip = irq_get_chip(irq);
 
        chip->irq_mask(&desc->irq_data);
 
@@ -208,18 +208,19 @@ int __init exynos4_init_irq_eint(void)
        int irq;
 
        for (irq = 0 ; irq <= 31 ; irq++) {
-               set_irq_chip(IRQ_EINT(irq), &exynos4_irq_eint);
-               set_irq_handler(IRQ_EINT(irq), handle_level_irq);
+               irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
+                                        handle_level_irq);
                set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
        }
 
-       set_irq_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
+       irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
 
        for (irq = 0 ; irq <= 15 ; irq++) {
                eint0_15_data[irq] = IRQ_EINT(irq);
 
-               set_irq_data(exynos4_get_irq_nr(irq), &eint0_15_data[irq]);
-               set_irq_chained_handler(exynos4_get_irq_nr(irq),
+               irq_set_handler_data(exynos4_get_irq_nr(irq),
+                                    &eint0_15_data[irq]);
+               irq_set_chained_handler(exynos4_get_irq_nr(irq),
                                        exynos4_irq_eint0_15);
        }
 
index 84c5f25..38a44f9 100644 (file)
@@ -102,8 +102,7 @@ static void __init __fb_init_irq(void)
        *CSR_FIQ_DISABLE = -1;
 
        for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
-               set_irq_chip(irq, &fb_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
index a921fe9..5f1f986 100644 (file)
@@ -30,7 +30,7 @@ static int cksrc_dc21285_enable(struct clocksource *cs)
        return 0;
 }
 
-static int cksrc_dc21285_disable(struct clocksource *cs)
+static void cksrc_dc21285_disable(struct clocksource *cs)
 {
        *CSR_TIMER2_CNTL = 0;
 }
index de7a5cb..c3a0abb 100644 (file)
@@ -151,14 +151,14 @@ void __init isa_init_irq(unsigned int host_irq)
 
        if (host_irq != (unsigned int)-1) {
                for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) {
-                       set_irq_chip(irq, &isa_lo_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &isa_lo_chip,
+                                                handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
 
                for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) {
-                       set_irq_chip(irq, &isa_hi_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &isa_hi_chip,
+                                                handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
 
@@ -166,7 +166,7 @@ void __init isa_init_irq(unsigned int host_irq)
                request_resource(&ioport_resource, &pic2_resource);
                setup_irq(IRQ_ISA_CASCADE, &irq_cascade);
 
-               set_irq_chained_handler(host_irq, isa_irq_handler);
+               irq_set_chained_handler(host_irq, isa_irq_handler);
 
                /*
                 * On the NetWinder, don't automatically
index fa3d333..fdc7ef1 100644 (file)
@@ -127,8 +127,8 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
 
 static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
+       unsigned int port = (unsigned int)irq_desc_get_handler_data(desc);
        unsigned int gpio_irq_no, irq_stat;
-       unsigned int port = (unsigned int)get_irq_data(irq);
 
        irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT);
 
@@ -138,9 +138,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                if ((irq_stat & 1) == 0)
                        continue;
 
-               BUG_ON(!(irq_desc[gpio_irq_no].handle_irq));
-               irq_desc[gpio_irq_no].handle_irq(gpio_irq_no,
-                               &irq_desc[gpio_irq_no]);
+               generic_handle_irq(gpio_irq_no);
        }
 }
 
@@ -219,13 +217,13 @@ void __init gemini_gpio_init(void)
 
                for (j = GPIO_IRQ_BASE + i * 32;
                     j < GPIO_IRQ_BASE + (i + 1) * 32; j++) {
-                       set_irq_chip(j, &gpio_irq_chip);
-                       set_irq_handler(j, handle_edge_irq);
+                       irq_set_chip_and_handler(j, &gpio_irq_chip,
+                                                handle_edge_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
 
-               set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler);
-               set_irq_data(IRQ_GPIO(i), (void *)i);
+               irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler);
+               irq_set_handler_data(IRQ_GPIO(i), (void *)i);
        }
 
        BUG_ON(gpiochip_add(&gemini_gpio_chip));
index 96bc227..9485a8f 100644 (file)
@@ -81,13 +81,13 @@ void __init gemini_init_irq(void)
        request_resource(&iomem_resource, &irq_resource);
 
        for (i = 0; i < NR_IRQS; i++) {
-               set_irq_chip(i, &gemini_irq_chip);
+               irq_set_chip(i, &gemini_irq_chip);
                if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) {
-                       set_irq_handler(i, handle_edge_irq);
+                       irq_set_handler(i, handle_edge_irq);
                        mode |= 1 << i;
                        level |= 1 << i;
                } else {                        
-                       set_irq_handler(i, handle_level_irq);
+                       irq_set_handler(i, handle_level_irq);
                }
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
index 1f28c90..51d4e44 100644 (file)
@@ -199,29 +199,29 @@ void __init h720x_init_irq (void)
 
        /* Initialize global IRQ's, fast path */
        for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
-               set_irq_chip(irq, &h720x_global_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &h720x_global_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
        /* Initialize multiplexed IRQ's, slow path */
        for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
-               set_irq_chip(irq, &h720x_gpio_chip);
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &h720x_gpio_chip,
+                                        handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID );
        }
-       set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
-       set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler);
-       set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler);
-       set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler);
+       irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
+       irq_set_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler);
+       irq_set_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler);
+       irq_set_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler);
 
 #ifdef CONFIG_CPU_H7202
        for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
-               set_irq_chip(irq, &h720x_gpio_chip);
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &h720x_gpio_chip,
+                                        handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID );
        }
-       set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
+       irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
 #endif
 
        /* Enable multiplexed irq's */
index ac3f914..c37d570 100644 (file)
@@ -141,13 +141,18 @@ h7202_timer_interrupt(int irq, void *dev_id)
 /*
  * mask multiplexed timer IRQs
  */
-static void inline mask_timerx_irq(struct irq_data *d)
+static void inline __mask_timerx_irq(unsigned int irq)
 {
        unsigned int bit;
-       bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
+       bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
        CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
 }
 
+static void inline mask_timerx_irq(struct irq_data *d)
+{
+       __mask_timerx_irq(d->irq);
+}
+
 /*
  * unmask multiplexed timer IRQs
  */
@@ -196,12 +201,12 @@ void __init h7202_init_irq (void)
 
        for (irq = IRQ_TIMER1;
                          irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
-               mask_timerx_irq(irq);
-               set_irq_chip(irq, &h7202_timerx_chip);
-               set_irq_handler(irq, handle_edge_irq);
+               __mask_timerx_irq(irq);
+               irq_set_chip_and_handler(irq, &h7202_timerx_chip,
+                                        handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID );
        }
-       set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);
+       irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);
 
        h720x_init_irq();
 }
index a233470..bc73970 100644 (file)
@@ -224,15 +224,15 @@ void __init iop13xx_init_irq(void)
 
        for(i = 0; i <= IRQ_IOP13XX_HPI; i++) {
                if (i < 32)
-                       set_irq_chip(i, &iop13xx_irqchip1);
+                       irq_set_chip(i, &iop13xx_irqchip1);
                else if (i < 64)
-                       set_irq_chip(i, &iop13xx_irqchip2);
+                       irq_set_chip(i, &iop13xx_irqchip2);
                else if (i < 96)
-                       set_irq_chip(i, &iop13xx_irqchip3);
+                       irq_set_chip(i, &iop13xx_irqchip3);
                else
-                       set_irq_chip(i, &iop13xx_irqchip4);
+                       irq_set_chip(i, &iop13xx_irqchip4);
 
-               set_irq_handler(i, handle_level_irq);
+               irq_set_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 
index c9c02e3..560d5b2 100644 (file)
@@ -118,7 +118,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
 
 void __init iop13xx_msi_init(void)
 {
-       set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler);
+       irq_set_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler);
 }
 
 /*
@@ -178,7 +178,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
        if (irq < 0)
                return irq;
 
-       set_irq_msi(irq, desc);
+       irq_set_msi_desc(irq, desc);
 
        msg.address_hi = 0x0;
        msg.address_lo = IOP13XX_MU_MIMR_PCI;
@@ -187,7 +187,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
        msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f);
 
        write_msi_msg(irq, &msg);
-       set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
+       irq_set_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
 
        return 0;
 }
index d3426a1..d7ee278 100644 (file)
@@ -68,8 +68,7 @@ void __init iop32x_init_irq(void)
                *IOP3XX_PCIIRSR = 0x0f;
 
        for (i = 0; i < NR_IRQS; i++) {
-               set_irq_chip(i, &ext_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &ext_chip, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 }
index 0ff2f74..f7f5d3e 100644 (file)
@@ -110,8 +110,9 @@ void __init iop33x_init_irq(void)
                *IOP3XX_PCIIRSR = 0x0f;
 
        for (i = 0; i < NR_IRQS; i++) {
-               set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i,
+                                        (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2,
+                                        handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 }
index 5fc4e06..4068166 100644 (file)
@@ -476,8 +476,8 @@ void __init ixp2000_init_irq(void)
         */
        for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) {
                if ((1 << irq) & IXP2000_VALID_IRQ_MASK) {
-                       set_irq_chip(irq, &ixp2000_irq_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &ixp2000_irq_chip,
+                                                handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
                } else set_irq_flags(irq, 0);
        }
@@ -485,21 +485,21 @@ void __init ixp2000_init_irq(void)
        for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) {
                if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) &
                                IXP2000_VALID_ERR_IRQ_MASK) {
-                       set_irq_chip(irq, &ixp2000_err_irq_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip,
+                                                handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
                }
                else
                        set_irq_flags(irq, 0);
        }
-       set_irq_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);
+       irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);
 
        for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) {
-               set_irq_chip(irq, &ixp2000_GPIO_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-       set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
+       irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
 
        /*
         * Enable PCI irqs.  The actual PCI[AB] decoding is done in
@@ -508,8 +508,8 @@ void __init ixp2000_init_irq(void)
         */
        ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
        for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {
-               set_irq_chip(irq, &ixp2000_pci_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
index 7d90d3f..235638f 100644 (file)
@@ -158,13 +158,13 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne
        *board_irq_mask = 0xffffffff;
 
        for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
-               set_irq_chip(irq, &ixdp2x00_cpld_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 
        /* Hook into PCI interrupt */
-       set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
+       irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
 }
 
 /*************************************************************************
index 34b1b2a..84835b2 100644 (file)
@@ -115,8 +115,8 @@ void __init ixdp2x01_init_irq(void)
 
        for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
                if (irq & valid_irq_mask) {
-                       set_irq_chip(irq, &ixdp2x01_irq_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &ixdp2x01_irq_chip,
+                                                handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
                } else {
                        set_irq_flags(irq, 0);
@@ -124,7 +124,7 @@ void __init ixdp2x01_init_irq(void)
        }
 
        /* Hook into PCI interrupts */
-       set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
+       irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
 }
 
 
index 9c8a339..a1bee33 100644 (file)
@@ -289,12 +289,12 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
 {
        switch (type) {
        case IXP23XX_IRQ_LEVEL:
-               set_irq_chip(irq, &ixp23xx_irq_level_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &ixp23xx_irq_level_chip,
+                                        handle_level_irq);
                break;
        case IXP23XX_IRQ_EDGE:
-               set_irq_chip(irq, &ixp23xx_irq_edge_chip);
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &ixp23xx_irq_edge_chip,
+                                        handle_edge_irq);
                break;
        }
        set_irq_flags(irq, IRQF_VALID);
@@ -324,12 +324,12 @@ void __init ixp23xx_init_irq(void)
        }
 
        for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) {
-               set_irq_chip(irq, &ixp23xx_pci_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &ixp23xx_pci_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 
-       set_irq_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);
+       irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);
 }
 
 
index 181116a..8dcba17 100644 (file)
@@ -136,8 +136,8 @@ void __init ixdp2351_init_irq(void)
             irq++) {
                if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) {
                        set_irq_flags(irq, IRQF_VALID);
-                       set_irq_handler(irq, handle_level_irq);
-                       set_irq_chip(irq, &ixdp2351_inta_chip);
+                       irq_set_chip_and_handler(irq, &ixdp2351_inta_chip,
+                                                handle_level_irq);
                }
        }
 
@@ -147,13 +147,13 @@ void __init ixdp2351_init_irq(void)
             irq++) {
                if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) {
                        set_irq_flags(irq, IRQF_VALID);
-                       set_irq_handler(irq, handle_level_irq);
-                       set_irq_chip(irq, &ixdp2351_intb_chip);
+                       irq_set_chip_and_handler(irq, &ixdp2351_intb_chip,
+                                                handle_level_irq);
                }
        }
 
-       set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
-       set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
+       irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
+       irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
 }
 
 /*
index 76c61ba..8fe0c62 100644 (file)
@@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 
 static void __init roadrunner_pci_preinit(void)
 {
-       set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
 
        ixp23xx_pci_preinit();
 }
index 845e1b5..162043f 100644 (file)
 
 void __init avila_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 9fd8942..ed19bc3 100644 (file)
@@ -252,8 +252,8 @@ void __init ixp4xx_init_irq(void)
 
         /* Default to all level triggered */
        for(i = 0; i < NR_IRQS; i++) {
-               set_irq_chip(i, &ixp4xx_irq_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &ixp4xx_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 }
index b978ea8..37fda7d 100644 (file)
@@ -32,8 +32,8 @@
 
 void __init coyote_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index fa70fed..c761201 100644 (file)
 
 void __init dsmg600_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 5a810c9..44ccde9 100644 (file)
@@ -32,9 +32,9 @@
 
 void __init fsg_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 7e93a09..fc11241 100644 (file)
@@ -29,8 +29,8 @@
 
 void __init gateway7001_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index d0e4861..3e8c0e3 100644 (file)
@@ -420,8 +420,8 @@ static void __init gmlr_init(void)
        gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT);
        gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN);
        gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN);
-       set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH);
-       set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH);
 
        set_control(CONTROL_HSS0_DTR_N, 1);
        set_control(CONTROL_HSS1_DTR_N, 1);
@@ -441,10 +441,10 @@ static void __init gmlr_init(void)
 #ifdef CONFIG_PCI
 static void __init gmlr_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 25d2c33..38cc072 100644 (file)
@@ -43,8 +43,8 @@
  */
 void __init gtwx5715_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 1ba165a..58f4004 100644 (file)
 
 void __init ixdp425_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 4ed7ac6..e64f6d0 100644 (file)
@@ -25,8 +25,8 @@
 
 void __init ixdpg425_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index d0cea34..428d120 100644 (file)
 
 void __init nas100d_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 1eb5a90..2e85f76 100644 (file)
@@ -32,9 +32,9 @@
 
 void __init nslu2_pci_preinit(void)
 {
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index f3111c6..03bdec5 100644 (file)
@@ -38,8 +38,8 @@ void __init vulcan_pci_preinit(void)
        pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
                (int)(pci_cardbus_mem_size >> 20));
 #endif
-       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
index 9b59ed0..17f3cf5 100644 (file)
@@ -29,8 +29,8 @@
 
 void __init wg302v2_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index cbdb586..05d193a 100644 (file)
@@ -35,14 +35,15 @@ void __init kirkwood_init_irq(void)
         */
        orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0,
                        IRQ_KIRKWOOD_GPIO_START);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
 
        orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0,
                        IRQ_KIRKWOOD_GPIO_START + 32);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23,
+                               gpio_irq_handler);
 }
index 55fbf71..31e4565 100644 (file)
@@ -80,7 +80,7 @@ int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
        local_irq_restore(flags);
 
        /* Set IRQ triggering type */
-       set_irq_type(gpio_irq[pin], type);
+       irq_set_irq_type(gpio_irq[pin], type);
 
        /* enable interrupt mode */
        ks8695_gpio_mode(pin, 0);
index 7998cca..a78092d 100644 (file)
@@ -115,12 +115,12 @@ static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
        }
 
        if (level_triggered) {
-               set_irq_chip(d->irq, &ks8695_irq_level_chip);
-               set_irq_handler(d->irq, handle_level_irq);
+               irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip,
+                                        handle_level_irq);
        }
        else {
-               set_irq_chip(d->irq, &ks8695_irq_edge_chip);
-               set_irq_handler(d->irq, handle_edge_irq);
+               irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip,
+                                        handle_edge_irq);
        }
 
        __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
@@ -158,16 +158,18 @@ void __init ks8695_init_irq(void)
                        case KS8695_IRQ_UART_RX:
                        case KS8695_IRQ_COMM_TX:
                        case KS8695_IRQ_COMM_RX:
-                               set_irq_chip(irq, &ks8695_irq_level_chip);
-                               set_irq_handler(irq, handle_level_irq);
+                               irq_set_chip_and_handler(irq,
+                                                        &ks8695_irq_level_chip,
+                                                        handle_level_irq);
                                break;
 
                        /* Edge-triggered interrupts */
                        default:
                                /* clear pending bit */
                                ks8695_irq_ack(irq_get_irq_data(irq));
-                               set_irq_chip(irq, &ks8695_irq_edge_chip);
-                               set_irq_handler(irq, handle_edge_irq);
+                               irq_set_chip_and_handler(irq,
+                                                        &ks8695_irq_edge_chip,
+                                                        handle_edge_irq);
                }
 
                set_irq_flags(irq, IRQF_VALID);
index 316ecbf..4eae566 100644 (file)
@@ -290,7 +290,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
        }
 
        /* Ok to use the level handler for all types */
-       set_irq_handler(d->irq, handle_level_irq);
+       irq_set_handler(d->irq, handle_level_irq);
 
        return 0;
 }
@@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void)
 
        /* Configure supported IRQ's */
        for (i = 0; i < NR_IRQS; i++) {
-               set_irq_chip(i, &lpc32xx_irq_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &lpc32xx_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
@@ -406,8 +406,8 @@ void __init lpc32xx_init_irq(void)
        __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
 
        /* MIC SUBIRQx interrupts will route handling to the chain handlers */
-       set_irq_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
-       set_irq_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
+       irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
+       irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
 
        /* Initially disable all wake events */
        __raw_writel(0, LPC32XX_CLKPWR_P01_ER);
index fa03703..d21c544 100644 (file)
@@ -110,9 +110,9 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
                if (chip->irq_ack)
                        chip->irq_ack(d);
 
-               set_irq_chip(irq, chip);
+               irq_set_chip(irq, chip);
                set_irq_flags(irq, IRQF_VALID);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_handler(irq, handle_level_irq);
        }
 }
 
@@ -122,7 +122,7 @@ void __init mmp2_init_icu(void)
 
        for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
                icu_mask_irq(irq_get_irq_data(irq));
-               set_irq_chip(irq, &icu_irq_chip);
+               irq_set_chip(irq, &icu_irq_chip);
                set_irq_flags(irq, IRQF_VALID);
 
                switch (irq) {
@@ -133,7 +133,7 @@ void __init mmp2_init_icu(void)
                case IRQ_MMP2_SSP_MUX:
                        break;
                default:
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_handler(irq, handle_level_irq);
                        break;
                }
        }
@@ -149,9 +149,9 @@ void __init mmp2_init_icu(void)
        init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
        init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
 
-       set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
-       set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
-       set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
-       set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
-       set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
+       irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
+       irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
+       irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
+       irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
+       irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
 }
index f86b450..89706a0 100644 (file)
@@ -48,8 +48,7 @@ void __init icu_init_irq(void)
 
        for (irq = 0; irq < 64; irq++) {
                icu_mask_irq(irq_get_irq_data(irq));
-               set_irq_chip(irq, &icu_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
index 1993721..35c7cee 100644 (file)
@@ -53,7 +53,7 @@ static void __init msm8960_init_irq(void)
         */
        for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
                if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
-                       set_irq_handler(i, handle_percpu_irq);
+                       irq_set_handler(i, handle_percpu_irq);
        }
 }
 
index b3c55f1..1163b6f 100644 (file)
@@ -56,7 +56,7 @@ static void __init msm8x60_init_irq(void)
         */
        for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
                if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
-                       set_irq_handler(i, handle_percpu_irq);
+                       irq_set_handler(i, handle_percpu_irq);
        }
 }
 
index 31117a4..87e1d01 100644 (file)
@@ -214,17 +214,17 @@ int __init trout_init_gpio(void)
 {
        int i;
        for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
-               set_irq_chip(i, &trout_gpio_irq_chip);
-               set_irq_handler(i, handle_edge_irq);
+               irq_set_chip_and_handler(i, &trout_gpio_irq_chip,
+                                        handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
        for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
                gpiochip_add(&msm_gpio_banks[i].chip);
 
-       set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
-       set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
-       set_irq_wake(MSM_GPIO_TO_INT(17), 1);
+       irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
+       irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
+       irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1);
 
        return 0;
 }
index 44be846..f7a9724 100644 (file)
@@ -174,7 +174,7 @@ int __init trout_init_mmc(unsigned int sys_rev)
        if (IS_ERR(vreg_sdslot))
                return PTR_ERR(vreg_sdslot);
 
-       set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
+       irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
 
        if (!opt_disable_sdcard)
                msm_add_sdcc(2, &trout_sdslot_data,
index 0de19ec..56a964e 100644 (file)
@@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio)
               val, val2);
 }
 
-static void msm_gpio_irq_ack(unsigned int irq)
+static void msm_gpio_irq_ack(struct irq_data *d)
 {
-       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
 
        writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio));
        if (test_bit(gpio, msm_gpio.dual_edge_irqs))
                msm_gpio_update_dual_edge_pos(gpio);
 }
 
-static void msm_gpio_irq_mask(unsigned int irq)
+static void msm_gpio_irq_mask(struct irq_data *d)
 {
-       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        unsigned long irq_flags;
 
        spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(unsigned int irq)
        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
 }
 
-static void msm_gpio_irq_unmask(unsigned int irq)
+static void msm_gpio_irq_unmask(struct irq_data *d)
 {
-       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        unsigned long irq_flags;
 
        spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(unsigned int irq)
        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
 }
 
-static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        unsigned long irq_flags;
        uint32_t bits;
 
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
 
        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                bits |= BIT(INTR_DECT_CTL);
-               irq_desc[irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
                if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
                        __set_bit(gpio, msm_gpio.dual_edge_irqs);
                else
                        __clear_bit(gpio, msm_gpio.dual_edge_irqs);
        } else {
                bits &= ~BIT(INTR_DECT_CTL);
-               irq_desc[irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
                __clear_bit(gpio, msm_gpio.dual_edge_irqs);
        }
 
@@ -309,6 +309,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
  */
 static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
+       struct irq_data *data = irq_desc_get_irq_data(desc);
        unsigned long i;
 
        for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
@@ -318,21 +319,21 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
                        generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
                                                           i));
        }
-       desc->chip->ack(irq);
+       data->chip->irq_ack(data);
 }
 
-static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+       int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
 
        if (on) {
                if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
-                       set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
+                       irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
                set_bit(gpio, msm_gpio.wake_irqs);
        } else {
                clear_bit(gpio, msm_gpio.wake_irqs);
                if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
-                       set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
+                       irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
        }
 
        return 0;
@@ -340,11 +341,11 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
 
 static struct irq_chip msm_gpio_irq_chip = {
        .name           = "msmgpio",
-       .mask           = msm_gpio_irq_mask,
-       .unmask         = msm_gpio_irq_unmask,
-       .ack            = msm_gpio_irq_ack,
-       .set_type       = msm_gpio_irq_set_type,
-       .set_wake       = msm_gpio_irq_set_wake,
+       .irq_mask       = msm_gpio_irq_mask,
+       .irq_unmask     = msm_gpio_irq_unmask,
+       .irq_ack        = msm_gpio_irq_ack,
+       .irq_set_type   = msm_gpio_irq_set_type,
+       .irq_set_wake   = msm_gpio_irq_set_wake,
 };
 
 static int __devinit msm_gpio_probe(struct platform_device *dev)
@@ -361,12 +362,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)
 
        for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
                irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
-               set_irq_chip(irq, &msm_gpio_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 
-       set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
+       irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
                                msm_summary_irq_handler);
        return 0;
 }
@@ -378,7 +379,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev)
        if (ret < 0)
                return ret;
 
-       set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
+       irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
 
        return 0;
 }
index 176af9d..5ea273b 100644 (file)
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
        val = readl(msm_chip->regs.int_edge);
        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                writel(val | mask, msm_chip->regs.int_edge);
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else {
                writel(val & ~mask, msm_chip->regs.int_edge);
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
                msm_chip->both_edge_detect |= mask;
@@ -354,9 +354,9 @@ static int __init msm_init_gpio(void)
                        msm_gpio_chips[j].chip.base +
                        msm_gpio_chips[j].chip.ngpio)
                        j++;
-               set_irq_chip_data(i, &msm_gpio_chips[j]);
-               set_irq_chip(i, &msm_gpio_irq_chip);
-               set_irq_handler(i, handle_edge_irq);
+               irq_set_chip_data(i, &msm_gpio_chips[j]);
+               irq_set_chip_and_handler(i, &msm_gpio_irq_chip,
+                                        handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
@@ -366,10 +366,10 @@ static int __init msm_init_gpio(void)
                gpiochip_add(&msm_gpio_chips[i].chip);
        }
 
-       set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
-       set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
-       set_irq_wake(INT_GPIO_GROUP1, 1);
-       set_irq_wake(INT_GPIO_GROUP2, 2);
+       irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
+       irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
+       irq_set_irq_wake(INT_GPIO_GROUP1, 1);
+       irq_set_irq_wake(INT_GPIO_GROUP2, 2);
        return 0;
 }
 
index 68c28bb..1b54f80 100644 (file)
@@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
        type = msm_irq_shadow_reg[index].int_type;
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                type |= b;
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        }
        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                type &= ~b;
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        writel(type, treg);
        msm_irq_shadow_reg[index].int_type = type;
@@ -357,8 +357,7 @@ void __init msm_init_irq(void)
        writel(3, VIC_INT_MASTEREN);
 
        for (n = 0; n < NR_MSM_IRQS; n++) {
-               set_irq_chip(n, &msm_irq_chip);
-               set_irq_handler(n, handle_level_irq);
+               irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
                set_irq_flags(n, IRQF_VALID);
        }
 }
index 0b27d89..ea514be 100644 (file)
@@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
 
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                writel(readl(treg) | b, treg);
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        }
        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                writel(readl(treg) & (~b), treg);
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        return 0;
 }
@@ -145,8 +145,7 @@ void __init msm_init_irq(void)
        writel(1, VIC_INT_MASTEREN);
 
        for (n = 0; n < NR_MSM_IRQS; n++) {
-               set_irq_chip(n, &msm_irq_chip);
-               set_irq_handler(n, handle_level_irq);
+               irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
                set_irq_flags(n, IRQF_VALID);
        }
 }
index 11b54c7..689e78c 100644 (file)
@@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
        val = readl(sirc_regs.int_type);
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                val |= mask;
-               irq_desc[d->irq].handle_irq = handle_edge_irq;
+               __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else {
                val &= ~mask;
-               irq_desc[d->irq].handle_irq = handle_level_irq;
+               __irq_set_handler_locked(d->irq, handle_level_irq);
        }
 
        writel(val, sirc_regs.int_type);
@@ -158,15 +158,14 @@ void __init msm_init_sirc(void)
        wake_enable = 0;
 
        for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) {
-               set_irq_chip(i, &sirc_irq_chip);
-               set_irq_handler(i, handle_edge_irq);
+               irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
        for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) {
-               set_irq_chained_handler(sirc_reg_table[i].cascade_irq,
+               irq_set_chained_handler(sirc_reg_table[i].cascade_irq,
                                        sirc_irq_handler);
-               set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
+               irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
        }
        return;
 }
index 08da497..3e24431 100644 (file)
@@ -38,8 +38,8 @@ void __init mv78xx0_init_irq(void)
        orion_gpio_init(0, 32, GPIO_VIRT_BASE,
                        mv78xx0_core_index() ? 0x18 : 0,
                        IRQ_MV78XX0_GPIO_START);
-       set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
 }
index 4e4b780..3d095d6 100644 (file)
@@ -199,12 +199,11 @@ static void __init mx31ads_init_expio(void)
        __raw_writew(0xFFFF, PBC_INTSTATUS_REG);
        for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
             i++) {
-               set_irq_chip(i, &expio_irq_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
-       set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
-       set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
+       irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
+       irq_set_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
 }
 
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
index e83ffad..4a85505 100644 (file)
@@ -212,7 +212,7 @@ void __init eukrea_mbimx51_baseboard_init(void)
 
        gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
        gpio_direction_input(MBIMX51_TSC2007_GPIO);
-       set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
+       irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
        i2c_register_board_info(1, mbimx51_i2c_devices,
                                ARRAY_SIZE(mbimx51_i2c_devices));
 
index 56fa2ed..2c950fe 100644 (file)
@@ -136,7 +136,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
 static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 {
        u32 irq_stat;
-       struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
+       struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
        u32 gpio_irq_no_base = port->virtual_irq_start;
 
        desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -265,14 +265,14 @@ int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
 
                for (j = port[i].virtual_irq_start;
                        j < port[i].virtual_irq_start + 32; j++) {
-                       set_irq_chip(j, &gpio_irq_chip);
-                       set_irq_handler(j, handle_level_irq);
+                       irq_set_chip_and_handler(j, &gpio_irq_chip,
+                                                handle_level_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
 
                /* setup one handler for each entry */
-               set_irq_chained_handler(port[i].irq, mxs_gpio_irq_handler);
-               set_irq_data(port[i].irq, &port[i]);
+               irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
+               irq_set_handler_data(port[i].irq, &port[i]);
 
                /* register gpio chip */
                port[i].chip.direction_input = mxs_gpio_direction_input;
index 0f4c120..23ca9d0 100644 (file)
@@ -74,8 +74,7 @@ void __init icoll_init_irq(void)
        mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
 
        for (i = 0; i < MXS_INTERNAL_IRQS; i++) {
-               set_irq_chip(i, &mxs_icoll_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 }
index 29ffa75..00023b5 100644 (file)
@@ -171,13 +171,13 @@ void __init netx_init_irq(void)
        vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0);
 
        for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
-               set_irq_chip(irq, &netx_hif_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &netx_hif_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 
        writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
-       set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
+       irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
 }
 
 static int __init netx_init(void)
index 0c0d524..e27687d 100644 (file)
@@ -107,8 +107,8 @@ void __init board_a9m9750dev_init_irq(void)
                                __func__);
 
        for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
-               set_irq_chip(i, &a9m9750dev_fpga_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip,
+                                        handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
@@ -118,8 +118,8 @@ void __init board_a9m9750dev_init_irq(void)
        REGSET(eic, SYS_EIC, LVEDG, LEVEL);
        __raw_writel(eic, SYS_EIC(2));
 
-       set_irq_chained_handler(IRQ_NS9XXX_EXT2,
-                       a9m9750dev_fpga_demux_handler);
+       irq_set_chained_handler(IRQ_NS9XXX_EXT2,
+                               a9m9750dev_fpga_demux_handler);
 }
 
 void __init board_a9m9750dev_init_machine(void)
index f7e9196..19ca6de 100644 (file)
 #include <asm/mach-types.h>
 
 #define board_is_a9m9750dev()  (0                      \
-               || machine_is_cc9p9360dev()             \
                || machine_is_cc9p9750dev()             \
                )
 
 #define board_is_a9mvali()     (0                      \
-               || machine_is_cc9p9360val()             \
                || machine_is_cc9p9750val()             \
                )
 
index f851a6b..628e975 100644 (file)
@@ -18,7 +18,6 @@
                )
 
 #define module_is_cc9c()       (0                      \
-               || machine_is_cc9c()                    \
                )
 
 #define module_is_cc9p9210()   (0                      \
                )
 
 #define module_is_cc9p9360()   (0                      \
-               || machine_is_a9m9360()                 \
                || machine_is_cc9p9360dev()             \
                || machine_is_cc9p9360js()              \
-               || machine_is_cc9p9360val()             \
                )
 
 #define module_is_cc9p9750()   (0                      \
                || machine_is_a9m9750()                 \
-               || machine_is_cc9p9750dev()             \
                || machine_is_cc9p9750js()              \
                || machine_is_cc9p9750val()             \
                )
 
 #define module_is_ccw9c()      (0                      \
-               || machine_is_ccw9c()                   \
                )
 
 #define module_is_inc20otter() (0                      \
index bf0fd48..37ab0a2 100644 (file)
@@ -67,8 +67,7 @@ void __init ns9xxx_init_irq(void)
                __raw_writel(prio2irq(i), SYS_IVA(i));
 
        for (i = 0; i <= 31; ++i) {
-               set_irq_chip(i, &ns9xxx_chip);
-               set_irq_handler(i, handle_fasteoi_irq);
+               irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq);
                set_irq_flags(i, IRQF_VALID);
                irq_set_status_flags(i, IRQ_LEVEL);
        }
index 1f8a05a..aa279f2 100644 (file)
@@ -59,8 +59,8 @@ void __init nuc93x_init_irq(void)
        __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
 
        for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) {
-               set_irq_chip(irqno, &nuc93x_irq_chip);
-               set_irq_handler(irqno, handle_level_irq);
+               irq_set_chip_and_handler(irqno, &nuc93x_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
 }
index 7c5e211..e68dfde 100644 (file)
@@ -276,7 +276,7 @@ static void __init osk_init_cf(void)
                return;
        }
        /* the CF I/O IRQ is really active-low */
-       set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
+       irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
 }
 
 static void __init osk_init_irq(void)
@@ -482,7 +482,7 @@ static void __init osk_mistral_init(void)
        omap_cfg_reg(P20_1610_GPIO4);   /* PENIRQ */
        gpio_request(4, "ts_int");
        gpio_direction_input(4);
-       set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
+       irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
 
        spi_register_board_info(mistral_boardinfo,
                        ARRAY_SIZE(mistral_boardinfo));
@@ -500,7 +500,7 @@ static void __init osk_mistral_init(void)
                int irq = gpio_to_irq(OMAP_MPUIO(2));
 
                gpio_direction_input(OMAP_MPUIO(2));
-               set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
+               irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
 #ifdef CONFIG_PM
                /* share the IRQ in case someone wants to use the
                 * button for more than wakeup from system sleep.
index d7bbbe7..45f01d2 100644 (file)
@@ -256,12 +256,12 @@ palmz71_powercable(int irq, void *dev_id)
 {
        if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) {
                printk(KERN_INFO "PM: Power cable connected\n");
-               set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
-                               IRQ_TYPE_EDGE_FALLING);
+               irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
+                                IRQ_TYPE_EDGE_FALLING);
        } else {
                printk(KERN_INFO "PM: Power cable disconnected\n");
-               set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
-                               IRQ_TYPE_EDGE_RISING);
+               irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
+                                IRQ_TYPE_EDGE_RISING);
        }
        return IRQ_HANDLED;
 }
index bdc0ac8..65d2420 100644 (file)
@@ -279,10 +279,10 @@ static void __init voiceblue_init(void)
        gpio_request(13, "16C554 irq");
        gpio_request(14, "16C554 irq");
        gpio_request(15, "16C554 irq");
-       set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
-       set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
-       set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
-       set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
 
        platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
        omap_board_config = voiceblue_config;
index 0ace799..cddbf8b 100644 (file)
@@ -156,17 +156,17 @@ void omap1510_fpga_init_irq(void)
                         * The touchscreen interrupt is level-sensitive, so
                         * we'll use the regular mask_ack routine for it.
                         */
-                       set_irq_chip(i, &omap_fpga_irq_ack);
+                       irq_set_chip(i, &omap_fpga_irq_ack);
                }
                else {
                        /*
                         * All FPGA interrupts except the touchscreen are
                         * edge-sensitive, so we won't mask them.
                         */
-                       set_irq_chip(i, &omap_fpga_irq);
+                       irq_set_chip(i, &omap_fpga_irq);
                }
 
-               set_irq_handler(i, handle_edge_irq);
+               irq_set_handler(i, handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 
@@ -183,6 +183,6 @@ void omap1510_fpga_init_irq(void)
                return;
        }
        gpio_direction_input(13);
-       set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
-       set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
+       irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
+       irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
 }
index 731dd33..5d3da7a 100644 (file)
@@ -230,8 +230,8 @@ void __init omap_init_irq(void)
                        irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j);
                        omap_irq_set_cfg(j, 0, 0, irq_trigger);
 
-                       set_irq_chip(j, &omap_irq_chip);
-                       set_irq_handler(j, handle_level_irq);
+                       irq_set_chip_and_handler(j, &omap_irq_chip,
+                                                handle_level_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
        }
index 493505c..130034b 100644 (file)
@@ -743,7 +743,7 @@ static int __init gpmc_init(void)
        /* initalize the irq_chained */
        irq = OMAP_GPMC_IRQ_BASE;
        for (cs = 0; cs < GPMC_CS_NUM; cs++) {
-               set_irq_chip_and_handler(irq, &dummy_irq_chip,
+               irq_set_chip_and_handler(irq, &dummy_irq_chip,
                                                handle_simple_irq);
                set_irq_flags(irq, IRQF_VALID);
                irq++;
index bc524b9..237e453 100644 (file)
@@ -223,8 +223,7 @@ void __init omap_init_irq(void)
               nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
 
        for (i = 0; i < nr_of_irqs; i++) {
-               set_irq_chip(i, &omap_irq_chip);
-               set_irq_handler(i, handle_level_irq);
+               irq_set_chip_and_handler(i, &omap_irq_chip, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 }
index c10a117..b7d4591 100644 (file)
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
        pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "db88f5281_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
        pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
        if (gpio_request(pin, "PCI Int2") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "db88f5281_pci_preinit faield "
                                        "to set_irq_type pin %d\n", pin);
index ed85891..43cf8bc 100644 (file)
@@ -34,8 +34,8 @@ void __init orion5x_init_irq(void)
         * Initialize gpiolib for GPIOs 0-31.
         */
        orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START);
-       set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
-       set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
+       irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
 }
index 67ec695..4fc4677 100644 (file)
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
        pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
        if (gpio_request(pin, "PCI IntA") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "rd88f5182_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
        pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
        if (gpio_request(pin, "PCI IntB") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "rd88f5182_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
index 5653ee6..6160041 100644 (file)
@@ -88,7 +88,7 @@ void __init tsp2_pci_preinit(void)
        pin = TSP2_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "tsp2_pci_preinit failed "
                                        "to set_irq_type pin %d\n", pin);
index 8bbd27e..f0f43e1 100644 (file)
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
        pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
                                        "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
        pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
        if (gpio_request(pin, "PCI Int2") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                       irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "qnap_ts209_pci_preinit failed "
                                        "to set_irq_type pin %d\n", pin);
index c69c180..7608c7a 100644 (file)
@@ -58,22 +58,22 @@ static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type)
        case IRQ_TYPE_EDGE_RISING:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq));       /*edge sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq));       /*rising edge */
-               set_irq_handler(d->irq, handle_edge_irq);
+               irq_set_handler(d->irq, handle_edge_irq);
                break;
        case IRQ_TYPE_EDGE_FALLING:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq));       /*edge sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq));      /*falling edge */
-               set_irq_handler(d->irq, handle_edge_irq);
+               irq_set_handler(d->irq, handle_edge_irq);
                break;
        case IRQ_TYPE_LEVEL_LOW:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq));      /*level sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq));      /*low level */
-               set_irq_handler(d->irq, handle_level_irq);
+               irq_set_handler(d->irq, handle_level_irq);
                break;
        case IRQ_TYPE_LEVEL_HIGH:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq));      /*level sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq));       /* high level */
-               set_irq_handler(d->irq, handle_level_irq);
+               irq_set_handler(d->irq, handle_level_irq);
                break;
 
        /* IRQ_TYPE_EDGE_BOTH is not supported */
@@ -98,7 +98,7 @@ void __init pnx4008_init_irq(void)
        /* configure IRQ's */
        for (i = 0; i < NR_IRQS; i++) {
                set_irq_flags(i, IRQF_VALID);
-               set_irq_chip(i, &pnx4008_irq_chip);
+               irq_set_chip(i, &pnx4008_irq_chip);
                pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]);
        }
 
index d2af733..38dea05 100644 (file)
@@ -527,13 +527,13 @@ static void __init balloon3_init_irq(void)
        pxa27x_init_irq();
        /* setup extra Balloon3 irqs */
        for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
-               set_irq_chip(irq, &balloon3_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &balloon3_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
-       set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
+       irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
+       irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
 
        pr_debug("%s: chained handler installed - irq %d automatically "
                "enabled\n", __func__, BALLOON3_AUX_NIRQ);
index a2380cd..8b1a309 100644 (file)
@@ -70,9 +70,10 @@ void __cmx2xx_pci_init_irq(int irq_gpio)
 
        cmx2xx_it8152_irq_gpio = irq_gpio;
 
-       set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
 
-       set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux);
+       irq_set_chained_handler(gpio_to_irq(irq_gpio),
+                               cmx2xx_it8152_irq_demux);
 }
 
 #ifdef CONFIG_PM
index bfca7ed..06d0a03 100644 (file)
@@ -765,7 +765,7 @@ static void __init cm_x300_init_da9030(void)
 {
        pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
        i2c_register_board_info(1, &cm_x300_pmic_info, 1);
-       set_irq_wake(IRQ_WAKEUP0, 1);
+       irq_set_irq_wake(IRQ_WAKEUP0, 1);
 }
 
 static void __init cm_x300_init_wi2wi(void)
index 2693e3c..6251e3f 100644 (file)
@@ -137,9 +137,9 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
        GEDR0 = 0x3;
 
        for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
-               set_irq_chip(irq, &pxa_low_gpio_chip);
-               set_irq_chip_data(irq, irq_base(0));
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
+                                        handle_edge_irq);
+               irq_set_chip_data(irq, irq_base(0));
                set_irq_flags(irq, IRQF_VALID);
        }
 
@@ -165,9 +165,9 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
                                __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i));
 
                        irq = PXA_IRQ(i);
-                       set_irq_chip(irq, &pxa_internal_irq_chip);
-                       set_irq_chip_data(irq, base);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &pxa_internal_irq_chip,
+                                                handle_level_irq);
+                       irq_set_chip_data(irq, base);
                        set_irq_flags(irq, IRQF_VALID);
                }
        }
index c9a3e77..6307f70 100644 (file)
@@ -149,12 +149,12 @@ static void __init lpd270_init_irq(void)
 
        /* setup extra LogicPD PXA270 irqs */
        for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
-               set_irq_chip(irq, &lpd270_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &lpd270_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
-       set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
-       set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+       irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
+       irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 
index dca20de..0fea945 100644 (file)
@@ -165,13 +165,13 @@ static void __init lubbock_init_irq(void)
 
        /* setup extra lubbock irqs */
        for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
-               set_irq_chip(irq, &lubbock_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &lubbock_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
-       set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+       irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
+       irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
index f954222..29b6e7a 100644 (file)
@@ -166,8 +166,8 @@ static void __init mainstone_init_irq(void)
 
        /* setup extra Mainstone irqs */
        for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
-               set_irq_chip(irq, &mainstone_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &mainstone_irq_chip,
+                                        handle_level_irq);
                if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
                else
@@ -179,8 +179,8 @@ static void __init mainstone_init_irq(void)
        MST_INTMSKENA = 0;
        MST_INTSETCLR = 0;
 
-       set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
-       set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+       irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
+       irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
index 9dbf3cc..4d01205 100644 (file)
@@ -281,16 +281,16 @@ static void __init pcm990_init_irq(void)
 
        /* setup extra PCM990 irqs */
        for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
-               set_irq_chip(irq, &pcm990_irq_chip);
-               set_irq_handler(irq, handle_level_irq);
+               irq_set_chip_and_handler(irq, &pcm990_irq_chip,
+                                        handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
        PCM990_INTMSKENA = 0x00;        /* disable all Interrupts */
        PCM990_INTSETCLR = 0xFF;
 
-       set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
-       set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
+       irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
+       irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
 }
 
 static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
index f374247..8dd1073 100644 (file)
@@ -362,8 +362,8 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
        int irq;
 
        for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
-               set_irq_chip(irq, &pxa_ext_wakeup_chip);
-               set_irq_handler(irq, handle_edge_irq);
+               irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip,
+                                        handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 
index 1227921..aa70331 100644 (file)
@@ -310,14 +310,14 @@ static void __init viper_init_irq(void)
        /* setup ISA IRQs */
        for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
                isa_irq = viper_bit_to_irq(level);
-               set_irq_chip(isa_irq, &viper_irq_chip);
-               set_irq_handler(isa_irq, handle_edge_irq);
+               irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
+                                        handle_edge_irq);
                set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
+       irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
                                viper_irq_handler);
-       set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
+       irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
 }
 
 /* Flat Panel */
index 730f51e..139aa7f 100644 (file)
@@ -136,22 +136,23 @@ static void __init zeus_init_irq(void)
 
        /* Peripheral IRQs. It would be nice to move those inside driver
           configuration, but it is not supported at the moment. */
-       set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO),       IRQ_TYPE_EDGE_RISING);
-       set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO),     IRQ_TYPE_EDGE_RISING);
-       set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO),        IRQ_TYPE_EDGE_RISING);
-       set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),    IRQ_TYPE_EDGE_FALLING);
-       set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO),        IRQ_TYPE_EDGE_FALLING);
+       irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
+       irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
+                        IRQ_TYPE_EDGE_FALLING);
+       irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
 
        /* Setup ISA IRQs */
        for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
                isa_irq = zeus_bit_to_irq(level);
-               set_irq_chip(isa_irq, &zeus_irq_chip);
-               set_irq_handler(isa_irq, handle_edge_irq);
+               irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
+                                        handle_edge_irq);
                set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
-       set_irq_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
+       irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
+       irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
 }
 
 
index d29cd9b..2e1b530 100644 (file)
@@ -133,25 +133,25 @@ void __init rpc_init_irq(void)
 
                switch (irq) {
                case 0 ... 7:
-                       set_irq_chip(irq, &iomd_a_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &iomd_a_chip,
+                                                handle_level_irq);
                        set_irq_flags(irq, flags);
                        break;
 
                case 8 ... 15:
-                       set_irq_chip(irq, &iomd_b_chip);
-                       set_irq_handler(irq, handle_level_irq);
+                       irq_set_chip_and_handler(irq, &iomd_b_chip,
+                    &