[ARM] Remove RETINSTR macro

RETINSTR is a left-over from the days when we had 26-bit and
32-bit CPU support integrated into the same tree.  Since this
is no longer the case, we can now remove RETINSTR.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index b5bcebc..75af6d6 100644 (file)
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -340,7 +340,7 @@ sys_mmap2:
                streq   r5, [sp, #4]
                beq     do_mmap2
                mov     r0, #-EINVAL
-               RETINSTR(mov,pc, lr)
+               mov     pc, lr
 #else
                str     r5, [sp, #4]
                b       do_mmap2

diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 9183b06..930a702 100644 (file)
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -31,7 +31,7 @@ ENTRY(__const_udelay)                         @ 0 <= r0 <= 0x7fffff06
                mov     r2, r2, lsr #10         @ max = 0x00007fff
                mul     r0, r2, r0              @ max = 2^32-1
                movs    r0, r0, lsr #6
-               RETINSTR(moveq,pc,lr)
+               moveq   pc, lr
 
 /*
  * loops = r0 * HZ * loops_per_jiffy / 1000000
@@ -43,20 +43,20 @@ ENTRY(__const_udelay)                               @ 0 <= r0 <= 0x7fffff06
 ENTRY(__delay)
                subs    r0, r0, #1
 #if 0
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
-               RETINSTR(movls,pc,lr)
+               movls   pc, lr
                subs    r0, r0, #1
 #endif
                bhi     __delay
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr

diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index 6f8e27a..a5ca024 100644 (file)
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le)
 2:             cmp     r2, r1                  @ any more?
                blo     1b
 3:             mov     r0, r1                  @ no free bits
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr
 
 /*
  * Purpose  : Find next 'zero' bit
@@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le)
 2:             cmp     r2, r1                  @ any more?
                blo     1b
 3:             mov     r0, r1                  @ no free bits
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr
 
 /*
  * Purpose  : Find next 'one' bit
@@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be)
 2:             cmp     r2, r1                  @ any more?
                blo     1b
 3:             mov     r0, r1                  @ no free bits
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr
 
 ENTRY(_find_next_zero_bit_be)
                teq     r1, #0
@@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be)
 2:             cmp     r2, r1                  @ any more?
                blo     1b
 3:             mov     r0, r1                  @ no free bits
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr
 
 ENTRY(_find_next_bit_be)
                teq     r1, #0
@@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be)
                addeq   r2, r2, #1
                mov     r0, r2
 #endif
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr
 

diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 146d47c..2639983 100644 (file)
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -28,7 +28,7 @@
                strb    r3, [r1], #1
 
                subs    r2, r2, #1
-               RETINSTR(moveq, pc, lr)
+               moveq   pc, lr
 
 ENTRY(__raw_readsw)
                teq     r2, #0          @ do we have to check for the zero len?

diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 52d62b4..c421f92 100644 (file)
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -29,7 +29,7 @@
                orr     r3, r3, r3, lsl #16
                str     r3, [r0]
                subs    r2, r2, #1
-               RETINSTR(moveq, pc, lr)
+               moveq   pc, lr
 
 ENTRY(__raw_writesw)
                teq     r2, #0          @ do we have to check for the zero len?

diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S
index ac34fe5..e7ab1ea 100644 (file)
--- a/arch/arm/lib/memchr.S
+++ b/arch/arm/lib/memchr.S
@@ -22,4 +22,4 @@ ENTRY(memchr)
        bne     1b
        sub     r0, r0, #1
 2:     movne   r0, #0
-       RETINSTR(mov,pc,lr)
+       mov     pc, lr

diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index a1795f5..69e7c31 100644 (file)
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -77,4 +77,4 @@ ENTRY(memset)
        strneb  r1, [r0], #1
        tst     r2, #1
        strneb  r1, [r0], #1
-       RETINSTR(mov,pc,lr)
+       mov     pc, lr

diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S
index 51ccc60..764e7de 100644 (file)
--- a/arch/arm/lib/memzero.S
+++ b/arch/arm/lib/memzero.S
@@ -77,4 +77,4 @@ ENTRY(__memzero)
        strneb  r2, [r0], #1            @ 1
        tst     r1, #1                  @ 1 a byte left over
        strneb  r2, [r0], #1            @ 1
-       RETINSTR(mov,pc,lr)             @ 1
+       mov     pc, lr                  @ 1

diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S
index 5b9b493..9f18d6f 100644 (file)
--- a/arch/arm/lib/strchr.S
+++ b/arch/arm/lib/strchr.S
@@ -23,4 +23,4 @@ ENTRY(strchr)
                teq     r2, r1
                movne   r0, #0
                subeq   r0, r0, #1
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr

diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S
index fa923f0..538df22 100644 (file)
--- a/arch/arm/lib/strrchr.S
+++ b/arch/arm/lib/strrchr.S
@@ -22,4 +22,4 @@ ENTRY(strrchr)
                teq     r2, #0
                bne     1b
                mov     r0, r3
-               RETINSTR(mov,pc,lr)
+               mov     pc, lr

diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index d53bafa..930dd90 100644 (file)
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -73,12 +73,6 @@
        ldm/**/cond     base,reglist
 #endif
 
-/*
- * Build a return instruction for this processor type.
- */
-#define RETINSTR(instr, regs...)\
-       instr   regs
-
 /*
  * Enable and disable interrupts
  */