Merge branch 'topic/cs46xx' into for-linus
authorTakashi Iwai <tiwai@suse.de>
Thu, 10 Sep 2009 13:32:46 +0000 (15:32 +0200)
committerTakashi Iwai <tiwai@suse.de>
Thu, 10 Sep 2009 13:32:46 +0000 (15:32 +0200)
* topic/cs46xx:
  ALSA: cs46xx - Fix minimum period size

163 files changed:
Makefile
arch/arm/mach-omap2/mcbsp.c
arch/arm/mach-pxa/include/mach/audio.h
arch/arm/plat-omap/dma.c
arch/arm/plat-omap/include/mach/mcbsp.h
arch/arm/plat-omap/mcbsp.c
arch/arm/plat-s3c/include/plat/audio-simtec.h [new file with mode: 0644]
arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
drivers/block/aoe/aoe.h
drivers/block/aoe/aoeblk.c
drivers/block/aoe/aoedev.c
drivers/char/agp/intel-agp.c
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_tv.c
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/rs600.c
drivers/gpu/drm/radeon/rs690.c
drivers/gpu/drm/radeon/rv515.c
drivers/ide/ide-cs.c
drivers/net/gianfar.c
fs/namei.c
include/linux/tty.h
include/sound/ac97_codec.h
include/sound/sh_fsi.h [new file with mode: 0644]
include/sound/soc-dai.h
include/sound/soc-dapm.h
include/sound/soc.h
include/sound/uda1380.h [new file with mode: 0644]
include/sound/wm8993.h [new file with mode: 0644]
security/integrity/ima/ima_main.c
sound/arm/pxa2xx-ac97.c
sound/arm/pxa2xx-pcm-lib.c
sound/core/info.c
sound/isa/cmi8330.c
sound/pci/Kconfig
sound/pci/ali5451/ali5451.c
sound/pci/azt3328.c
sound/pci/azt3328.h
sound/soc/Kconfig
sound/soc/Makefile
sound/soc/atmel/sam9g20_wm8731.c
sound/soc/au1x/psc-ac97.c
sound/soc/au1x/psc.h
sound/soc/blackfin/Kconfig
sound/soc/blackfin/Makefile
sound/soc/blackfin/bf5xx-ac97.c
sound/soc/blackfin/bf5xx-ad1836.c [new file with mode: 0644]
sound/soc/blackfin/bf5xx-ad1938.c [new file with mode: 0644]
sound/soc/blackfin/bf5xx-ad73311.c
sound/soc/blackfin/bf5xx-i2s.c
sound/soc/blackfin/bf5xx-ssm2602.c
sound/soc/blackfin/bf5xx-tdm-pcm.c [new file with mode: 0644]
sound/soc/blackfin/bf5xx-tdm-pcm.h [new file with mode: 0644]
sound/soc/blackfin/bf5xx-tdm.c [new file with mode: 0644]
sound/soc/blackfin/bf5xx-tdm.h [new file with mode: 0644]
sound/soc/codecs/Kconfig
sound/soc/codecs/Makefile
sound/soc/codecs/ad1836.c [new file with mode: 0644]
sound/soc/codecs/ad1836.h [new file with mode: 0644]
sound/soc/codecs/ad1938.c [new file with mode: 0644]
sound/soc/codecs/ad1938.h [new file with mode: 0644]
sound/soc/codecs/ak4535.c
sound/soc/codecs/ak4642.c [new file with mode: 0644]
sound/soc/codecs/ak4642.h [new file with mode: 0644]
sound/soc/codecs/cs4270.c
sound/soc/codecs/cx20442.c [new file with mode: 0644]
sound/soc/codecs/cx20442.h [new file with mode: 0644]
sound/soc/codecs/max9877.c [new file with mode: 0644]
sound/soc/codecs/max9877.h [new file with mode: 0644]
sound/soc/codecs/spdif_transciever.c
sound/soc/codecs/stac9766.c
sound/soc/codecs/tlv320aic3x.c
sound/soc/codecs/tlv320aic3x.h
sound/soc/codecs/twl4030.c
sound/soc/codecs/twl4030.h
sound/soc/codecs/uda134x.c
sound/soc/codecs/uda1380.c
sound/soc/codecs/uda1380.h
sound/soc/codecs/wm8350.c
sound/soc/codecs/wm8400.c
sound/soc/codecs/wm8510.c
sound/soc/codecs/wm8523.c [new file with mode: 0644]
sound/soc/codecs/wm8523.h [new file with mode: 0644]
sound/soc/codecs/wm8580.c
sound/soc/codecs/wm8728.c
sound/soc/codecs/wm8731.c
sound/soc/codecs/wm8750.c
sound/soc/codecs/wm8753.c
sound/soc/codecs/wm8776.c [new file with mode: 0644]
sound/soc/codecs/wm8776.h [new file with mode: 0644]
sound/soc/codecs/wm8900.c
sound/soc/codecs/wm8903.c
sound/soc/codecs/wm8940.c
sound/soc/codecs/wm8960.c
sound/soc/codecs/wm8961.c [new file with mode: 0644]
sound/soc/codecs/wm8961.h [new file with mode: 0644]
sound/soc/codecs/wm8971.c
sound/soc/codecs/wm8974.c [new file with mode: 0644]
sound/soc/codecs/wm8974.h [new file with mode: 0644]
sound/soc/codecs/wm8988.c
sound/soc/codecs/wm8990.c
sound/soc/codecs/wm8993.c [new file with mode: 0644]
sound/soc/codecs/wm8993.h [new file with mode: 0644]
sound/soc/codecs/wm9081.c
sound/soc/codecs/wm9705.c
sound/soc/codecs/wm_hubs.c [new file with mode: 0644]
sound/soc/codecs/wm_hubs.h [new file with mode: 0644]
sound/soc/davinci/Kconfig
sound/soc/davinci/Makefile
sound/soc/davinci/davinci-evm.c
sound/soc/davinci/davinci-i2s.c
sound/soc/davinci/davinci-mcasp.c [new file with mode: 0644]
sound/soc/davinci/davinci-mcasp.h [new file with mode: 0644]
sound/soc/davinci/davinci-pcm.c
sound/soc/davinci/davinci-pcm.h
sound/soc/fsl/mpc5200_dma.c
sound/soc/fsl/mpc5200_psc_ac97.c
sound/soc/imx/Kconfig [new file with mode: 0644]
sound/soc/imx/Makefile [new file with mode: 0644]
sound/soc/imx/mx1_mx2-pcm.c [new file with mode: 0644]
sound/soc/imx/mx1_mx2-pcm.h [new file with mode: 0644]
sound/soc/imx/mx27vis_wm8974.c [new file with mode: 0644]
sound/soc/imx/mxc-ssi.c [new file with mode: 0644]
sound/soc/imx/mxc-ssi.h [new file with mode: 0644]
sound/soc/omap/Kconfig
sound/soc/omap/Makefile
sound/soc/omap/ams-delta.c [new file with mode: 0644]
sound/soc/omap/n810.c
sound/soc/omap/omap-mcbsp.c
sound/soc/omap/omap-mcbsp.h
sound/soc/omap/omap-pcm.c
sound/soc/omap/omap-pcm.h
sound/soc/omap/sdp3430.c
sound/soc/omap/zoom2.c [new file with mode: 0644]
sound/soc/pxa/magician.c
sound/soc/pxa/palm27x.c
sound/soc/pxa/pxa-ssp.c
sound/soc/pxa/pxa2xx-ac97.c
sound/soc/s3c24xx/Kconfig
sound/soc/s3c24xx/Makefile
sound/soc/s3c24xx/neo1973_gta02_wm8753.c [new file with mode: 0644]
sound/soc/s3c24xx/s3c-i2s-v2.c
sound/soc/s3c24xx/s3c2443-ac97.c
sound/soc/s3c24xx/s3c24xx-i2s.c
sound/soc/s3c24xx/s3c24xx-pcm.c
sound/soc/s3c24xx/s3c24xx_simtec.c [new file with mode: 0644]
sound/soc/s3c24xx/s3c24xx_simtec.h [new file with mode: 0644]
sound/soc/s3c24xx/s3c24xx_simtec_hermes.c [new file with mode: 0644]
sound/soc/s3c24xx/s3c24xx_simtec_tlv320aic23.c [new file with mode: 0644]
sound/soc/s6000/s6105-ipcam.c
sound/soc/sh/Kconfig
sound/soc/sh/Makefile
sound/soc/sh/fsi-ak4642.c [new file with mode: 0644]
sound/soc/sh/fsi.c [new file with mode: 0644]
sound/soc/soc-cache.c [new file with mode: 0644]
sound/soc/soc-core.c
sound/soc/soc-dapm.c
sound/soc/soc-jack.c
sound/soc/txx9/txx9aclc.c

index 7d3415c..60de4ef 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 31
-EXTRAVERSION = -rc9
+EXTRAVERSION =
 NAME = Man-Eating Seals of Antiquity
 
 # *DOCUMENTATION*
index 99b6e15..0447d26 100644 (file)
@@ -128,6 +128,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
                .ops            = &omap2_mcbsp_ops,
+               .buffer_size    = 0x6F,
        },
        {
                .phys_base      = OMAP34XX_MCBSP2_BASE,
@@ -136,6 +137,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
                .ops            = &omap2_mcbsp_ops,
+               .buffer_size    = 0x3FF,
        },
        {
                .phys_base      = OMAP34XX_MCBSP3_BASE,
@@ -144,6 +146,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
                .ops            = &omap2_mcbsp_ops,
+               .buffer_size    = 0x6F,
        },
        {
                .phys_base      = OMAP34XX_MCBSP4_BASE,
@@ -152,6 +155,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
                .ops            = &omap2_mcbsp_ops,
+               .buffer_size    = 0x6F,
        },
        {
                .phys_base      = OMAP34XX_MCBSP5_BASE,
@@ -160,6 +164,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
                .ops            = &omap2_mcbsp_ops,
+               .buffer_size    = 0x6F,
        },
 };
 #define OMAP34XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap34xx_mcbsp_pdata)
index 16eb025..a3449e3 100644 (file)
@@ -3,10 +3,12 @@
 
 #include <sound/core.h>
 #include <sound/pcm.h>
+#include <sound/ac97_codec.h>
 
 /*
  * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
  *              a -1 value means no gpio will be used for reset
+ * @codec_pdata: AC97 codec platform_data
 
  * reset_gpio should only be specified for pxa27x CPUs where a silicon
  * bug prevents correct operation of the reset line. If not specified,
@@ -20,6 +22,7 @@ typedef struct {
        void (*resume)(void *);
        void *priv;
        int reset_gpio;
+       void *codec_pdata[AC97_BUS_MAX_DEVICES];
 } pxa2xx_audio_ops_t;
 
 extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops);
index e3ac94f..9b00f4c 100644 (file)
@@ -1127,6 +1127,11 @@ int omap_dma_running(void)
 void omap_dma_link_lch(int lch_head, int lch_queue)
 {
        if (omap_dma_in_1510_mode()) {
+               if (lch_head == lch_queue) {
+                       dma_write(dma_read(CCR(lch_head)) | (3 << 8),
+                                                               CCR(lch_head));
+                       return;
+               }
                printk(KERN_ERR "DMA linking is not supported in 1510 mode\n");
                BUG();
                return;
@@ -1149,6 +1154,11 @@ EXPORT_SYMBOL(omap_dma_link_lch);
 void omap_dma_unlink_lch(int lch_head, int lch_queue)
 {
        if (omap_dma_in_1510_mode()) {
+               if (lch_head == lch_queue) {
+                       dma_write(dma_read(CCR(lch_head)) & ~(3 << 8),
+                                                               CCR(lch_head));
+                       return;
+               }
                printk(KERN_ERR "DMA linking is not supported in 1510 mode\n");
                BUG();
                return;
index bb154ea..63a3f25 100644 (file)
 #define OMAP_MCBSP_REG_XCERG   0x74
 #define OMAP_MCBSP_REG_XCERH   0x78
 #define OMAP_MCBSP_REG_SYSCON  0x8C
+#define OMAP_MCBSP_REG_THRSH2  0x90
+#define OMAP_MCBSP_REG_THRSH1  0x94
+#define OMAP_MCBSP_REG_IRQST   0xA0
+#define OMAP_MCBSP_REG_IRQEN   0xA4
+#define OMAP_MCBSP_REG_WAKEUPEN        0xA8
 #define OMAP_MCBSP_REG_XCCR    0xAC
 #define OMAP_MCBSP_REG_RCCR    0xB0
 
 #define RDISABLE               0x0001
 
 /********************** McBSP SYSCONFIG bit definitions ********************/
+#define CLOCKACTIVITY(value)   ((value)<<8)
+#define SIDLEMODE(value)       ((value)<<3)
+#define ENAWAKEUP              0x0004
 #define SOFTRST                        0x0002
 
+/********************** McBSP DMA operating modes **************************/
+#define MCBSP_DMA_MODE_ELEMENT         0
+#define MCBSP_DMA_MODE_THRESHOLD       1
+#define MCBSP_DMA_MODE_FRAME           2
+
+/********************** McBSP WAKEUPEN bit definitions *********************/
+#define XEMPTYEOFEN            0x4000
+#define XRDYEN                 0x0400
+#define XEOFEN                 0x0200
+#define XFSXEN                 0x0100
+#define XSYNCERREN             0x0080
+#define RRDYEN                 0x0008
+#define REOFEN                 0x0004
+#define RFSREN                 0x0002
+#define RSYNCERREN             0x0001
+
 /* we don't do multichannel for now */
 struct omap_mcbsp_reg_cfg {
        u16 spcr2;
@@ -344,6 +368,9 @@ struct omap_mcbsp_platform_data {
        u8 dma_rx_sync, dma_tx_sync;
        u16 rx_irq, tx_irq;
        struct omap_mcbsp_ops *ops;
+#ifdef CONFIG_ARCH_OMAP34XX
+       u16 buffer_size;
+#endif
 };
 
 struct omap_mcbsp {
@@ -377,6 +404,11 @@ struct omap_mcbsp {
        struct omap_mcbsp_platform_data *pdata;
        struct clk *iclk;
        struct clk *fclk;
+#ifdef CONFIG_ARCH_OMAP34XX
+       int dma_op_mode;
+       u16 max_tx_thres;
+       u16 max_rx_thres;
+#endif
 };
 extern struct omap_mcbsp **mcbsp_ptr;
 extern int omap_mcbsp_count;
@@ -385,10 +417,25 @@ int omap_mcbsp_init(void);
 void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
                                        int size);
 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
+#ifdef CONFIG_ARCH_OMAP34XX
+void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
+void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
+u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
+u16 omap_mcbsp_get_max_rx_threshold(unsigned int id);
+int omap_mcbsp_get_dma_op_mode(unsigned int id);
+#else
+static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
+{ }
+static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
+{ }
+static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; }
+static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; }
+static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
+#endif
 int omap_mcbsp_request(unsigned int id);
 void omap_mcbsp_free(unsigned int id);
-void omap_mcbsp_start(unsigned int id);
-void omap_mcbsp_stop(unsigned int id);
+void omap_mcbsp_start(unsigned int id, int tx, int rx);
+void omap_mcbsp_stop(unsigned int id, int tx, int rx);
 void omap_mcbsp_xmit_word(unsigned int id, u32 word);
 u32 omap_mcbsp_recv_word(unsigned int id);
 
index efa0e01..8dc7927 100644 (file)
@@ -198,6 +198,170 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 }
 EXPORT_SYMBOL(omap_mcbsp_config);
 
+#ifdef CONFIG_ARCH_OMAP34XX
+/*
+ * omap_mcbsp_set_tx_threshold configures how to deal
+ * with transmit threshold. the threshold value and handler can be
+ * configure in here.
+ */
+void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
+{
+       struct omap_mcbsp *mcbsp;
+       void __iomem *io_base;
+
+       if (!cpu_is_omap34xx())
+               return;
+
+       if (!omap_mcbsp_check_valid_id(id)) {
+               printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
+               return;
+       }
+       mcbsp = id_to_mcbsp_ptr(id);
+       io_base = mcbsp->io_base;
+
+       OMAP_MCBSP_WRITE(io_base, THRSH2, threshold);
+}
+EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
+
+/*
+ * omap_mcbsp_set_rx_threshold configures how to deal
+ * with receive threshold. the threshold value and handler can be
+ * configure in here.
+ */
+void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
+{
+       struct omap_mcbsp *mcbsp;
+       void __iomem *io_base;
+
+       if (!cpu_is_omap34xx())
+               return;
+
+       if (!omap_mcbsp_check_valid_id(id)) {
+               printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
+               return;
+       }
+       mcbsp = id_to_mcbsp_ptr(id);
+       io_base = mcbsp->io_base;
+
+       OMAP_MCBSP_WRITE(io_base, THRSH1, threshold);
+}
+EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
+
+/*
+ * omap_mcbsp_get_max_tx_thres just return the current configured
+ * maximum threshold for transmission
+ */
+u16 omap_mcbsp_get_max_tx_threshold(unsigned int id)
+{
+       struct omap_mcbsp *mcbsp;
+
+       if (!omap_mcbsp_check_valid_id(id)) {
+               printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
+               return -ENODEV;
+       }
+       mcbsp = id_to_mcbsp_ptr(id);
+
+       return mcbsp->max_tx_thres;
+}
+EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold);
+
+/*
+ * omap_mcbsp_get_max_rx_thres just return the current configured
+ * maximum threshold for reception
+ */
+u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
+{
+       struct omap_mcbsp *mcbsp;
+
+       if (!omap_mcbsp_check_valid_id(id)) {
+               printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
+               return -ENODEV;
+       }
+       mcbsp = id_to_mcbsp_ptr(id);
+
+       return mcbsp->max_rx_thres;
+}
+EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);
+
+/*
+ * omap_mcbsp_get_dma_op_mode just return the current configured
+ * operating mode for the mcbsp channel
+ */
+int omap_mcbsp_get_dma_op_mode(unsigned int id)
+{
+       struct omap_mcbsp *mcbsp;
+       int dma_op_mode;
+
+       if (!omap_mcbsp_check_valid_id(id)) {
+               printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1);
+               return -ENODEV;
+       }
+       mcbsp = id_to_mcbsp_ptr(id);
+
+       spin_lock_irq(&mcbsp->lock);
+       dma_op_mode = mcbsp->dma_op_mode;
+       spin_unlock_irq(&mcbsp->lock);
+
+       return dma_op_mode;
+}
+EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
+
+static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
+{
+       /*
+        * Enable wakup behavior, smart idle and all wakeups
+        * REVISIT: some wakeups may be unnecessary
+        */
+       if (cpu_is_omap34xx()) {
+               u16 syscon;
+
+               syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
+               syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
+
+               spin_lock_irq(&mcbsp->lock);
+               if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
+                       syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
+                                       CLOCKACTIVITY(0x02));
+                       OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN,
+                                       XRDYEN | RRDYEN);
+               } else {
+                       syscon |= SIDLEMODE(0x01);
+               }
+               spin_unlock_irq(&mcbsp->lock);
+
+               OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
+       }
+}
+
+static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
+{
+       /*
+        * Disable wakup behavior, smart idle and all wakeups
+        */
+       if (cpu_is_omap34xx()) {
+               u16 syscon;
+
+               syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
+               syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
+               /*
+                * HW bug workaround - If no_idle mode is taken, we need to
+                * go to smart_idle before going to always_idle, or the
+                * device will not hit retention anymore.
+                */
+               syscon |= SIDLEMODE(0x02);
+               OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
+
+               syscon &= ~(SIDLEMODE(0x03));
+               OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
+
+               OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, 0);
+       }
+}
+#else
+static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
+static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
+#endif
+
 /*
  * We can choose between IRQ based or polled IO.
  * This needs to be called before omap_mcbsp_request().
@@ -257,6 +421,9 @@ int omap_mcbsp_request(unsigned int id)
        clk_enable(mcbsp->iclk);
        clk_enable(mcbsp->fclk);
 
+       /* Do procedure specific to omap34xx arch, if applicable */
+       omap34xx_mcbsp_request(mcbsp);
+
        /*
         * Make sure that transmitter, receiver and sample-rate generator are
         * not running before activating IRQs.
@@ -305,6 +472,9 @@ void omap_mcbsp_free(unsigned int id)
        if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
                mcbsp->pdata->ops->free(id);
 
+       /* Do procedure specific to omap34xx arch, if applicable */
+       omap34xx_mcbsp_free(mcbsp);
+
        clk_disable(mcbsp->fclk);
        clk_disable(mcbsp->iclk);
 
@@ -328,14 +498,15 @@ void omap_mcbsp_free(unsigned int id)
 EXPORT_SYMBOL(omap_mcbsp_free);
 
 /*
- * Here we start the McBSP, by enabling the sample
- * generator, both transmitter and receivers,
- * and the frame sync.
+ * Here we start the McBSP, by enabling transmitter, receiver or both.
+ * If no transmitter or receiver is active prior calling, then sample-rate
+ * generator and frame sync are started.
  */
-void omap_mcbsp_start(unsigned int id)
+void omap_mcbsp_start(unsigned int id, int tx, int rx)
 {
        struct omap_mcbsp *mcbsp;
        void __iomem *io_base;
+       int idle;
        u16 w;
 
        if (!omap_mcbsp_check_valid_id(id)) {
@@ -348,32 +519,58 @@ void omap_mcbsp_start(unsigned int id)
        mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
        mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 
-       /* Start the sample generator */
-       w = OMAP_MCBSP_READ(io_base, SPCR2);
-       OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
+       idle = !((OMAP_MCBSP_READ(io_base, SPCR2) |
+                 OMAP_MCBSP_READ(io_base, SPCR1)) & 1);
+
+       if (idle) {
+               /* Start the sample generator */
+               w = OMAP_MCBSP_READ(io_base, SPCR2);
+               OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
+       }
 
        /* Enable transmitter and receiver */
+       tx &= 1;
        w = OMAP_MCBSP_READ(io_base, SPCR2);
-       OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
+       OMAP_MCBSP_WRITE(io_base, SPCR2, w | tx);
 
+       rx &= 1;
        w = OMAP_MCBSP_READ(io_base, SPCR1);
-       OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
+       OMAP_MCBSP_WRITE(io_base, SPCR1, w | rx);
 
-       udelay(100);
+       /*
+        * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec
+        * REVISIT: 100us may give enough time for two CLKSRG, however
+        * due to some unknown PM related, clock gating etc. reason it
+        * is now at 500us.
+        */
+       udelay(500);
 
-       /* Start frame sync */
-       w = OMAP_MCBSP_READ(io_base, SPCR2);
-       OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
+       if (idle) {
+               /* Start frame sync */
+               w = OMAP_MCBSP_READ(io_base, SPCR2);
+               OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
+       }
+
+       if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+               /* Release the transmitter and receiver */
+               w = OMAP_MCBSP_READ(io_base, XCCR);
+               w &= ~(tx ? XDISABLE : 0);
+               OMAP_MCBSP_WRITE(io_base, XCCR, w);
+               w = OMAP_MCBSP_READ(io_base, RCCR);
+               w &= ~(rx ? RDISABLE : 0);
+               OMAP_MCBSP_WRITE(io_base, RCCR, w);
+       }
 
        /* Dump McBSP Regs */
        omap_mcbsp_dump_reg(id);
 }
 EXPORT_SYMBOL(omap_mcbsp_start);
 
-void omap_mcbsp_stop(unsigned int id)
+void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 {
        struct omap_mcbsp *mcbsp;
        void __iomem *io_base;
+       int idle;
        u16 w;
 
        if (!omap_mcbsp_check_valid_id(id)) {
@@ -385,16 +582,33 @@ void omap_mcbsp_stop(unsigned int id)
        io_base = mcbsp->io_base;
 
        /* Reset transmitter */
+       tx &= 1;
+       if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+               w = OMAP_MCBSP_READ(io_base, XCCR);
+               w |= (tx ? XDISABLE : 0);
+               OMAP_MCBSP_WRITE(io_base, XCCR, w);
+       }
        w = OMAP_MCBSP_READ(io_base, SPCR2);
-       OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
+       OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~tx);
 
        /* Reset receiver */
+       rx &= 1;
+       if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+               w = OMAP_MCBSP_READ(io_base, RCCR);
+               w |= (tx ? RDISABLE : 0);
+               OMAP_MCBSP_WRITE(io_base, RCCR, w);
+       }
        w = OMAP_MCBSP_READ(io_base, SPCR1);
-       OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
+       OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~rx);
 
-       /* Reset the sample rate generator */
-       w = OMAP_MCBSP_READ(io_base, SPCR2);
-       OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
+       idle = !((OMAP_MCBSP_READ(io_base, SPCR2) |
+                 OMAP_MCBSP_READ(io_base, SPCR1)) & 1);
+
+       if (idle) {
+               /* Reset the sample rate generator */
+               w = OMAP_MCBSP_READ(io_base, SPCR2);
+               OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
+       }
 }
 EXPORT_SYMBOL(omap_mcbsp_stop);
 
@@ -883,6 +1097,149 @@ void omap_mcbsp_set_spi_mode(unsigned int id,
 }
 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 
+#ifdef CONFIG_ARCH_OMAP34XX
+#define max_thres(m)                   (mcbsp->pdata->buffer_size)
+#define valid_threshold(m, val)                ((val) <= max_thres(m))
+#define THRESHOLD_PROP_BUILDER(prop)                                   \
+static ssize_t prop##_show(struct device *dev,                         \
+                       struct device_attribute *attr, char *buf)       \
+{                                                                      \
+       struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
+                                                                       \
+       return sprintf(buf, "%u\n", mcbsp->prop);                       \
+}                                                                      \
+                                                                       \
+static ssize_t prop##_store(struct device *dev,                                \
+                               struct device_attribute *attr,          \
+                               const char *buf, size_t size)           \
+{                                                                      \
+       struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
+       unsigned long val;                                              \
+       int status;                                                     \
+                                                                       \
+       status = strict_strtoul(buf, 0, &val);                          \
+       if (status)                                                     \
+               return status;                                          \
+                                                                       \
+       if (!valid_threshold(mcbsp, val))                               \
+               return -EDOM;                                           \
+                                                                       \
+       mcbsp->prop = val;                                              \
+       return size;                                                    \
+}                                                                      \
+                                                                       \
+static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store);
+
+THRESHOLD_PROP_BUILDER(max_tx_thres);
+THRESHOLD_PROP_BUILDER(max_rx_thres);
+
+static const char *dma_op_modes[] = {
+       "element", "threshold", "frame",
+};
+
+static ssize_t dma_op_mode_show(struct device *dev,
+                       struct device_attribute *attr, char *buf)
+{
+       struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
+       int dma_op_mode, i = 0;
+       ssize_t len = 0;
+       const char * const *s;
+
+       spin_lock_irq(&mcbsp->lock);
+       dma_op_mode = mcbsp->dma_op_mode;
+       spin_unlock_irq(&mcbsp->lock);
+
+       for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) {
+               if (dma_op_mode == i)
+                       len += sprintf(buf + len, "[%s] ", *s);
+               else
+                       len += sprintf(buf + len, "%s ", *s);
+       }
+       len += sprintf(buf + len, "\n");
+
+       return len;
+}
+
+static ssize_t dma_op_mode_store(struct device *dev,
+                               struct device_attribute *attr,
+                               const char *buf, size_t size)
+{
+       struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
+       const char * const *s;
+       int i = 0;
+
+       for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++)
+               if (sysfs_streq(buf, *s))
+                       break;
+
+       if (i == ARRAY_SIZE(dma_op_modes))
+               return -EINVAL;
+
+       spin_lock_irq(&mcbsp->lock);
+       if (!mcbsp->free) {
+               size = -EBUSY;
+               goto unlock;
+       }
+       mcbsp->dma_op_mode = i;
+
+unlock:
+       spin_unlock_irq(&mcbsp->lock);
+
+       return size;
+}
+
+static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store);
+
+static const struct attribute *additional_attrs[] = {
+       &dev_attr_max_tx_thres.attr,
+       &dev_attr_max_rx_thres.attr,
+       &dev_attr_dma_op_mode.attr,
+       NULL,
+};
+
+static const struct attribute_group additional_attr_group = {
+       .attrs = (struct attribute **)additional_attrs,
+};
+
+static inline int __devinit omap_additional_add(struct device *dev)
+{
+       return sysfs_create_group(&dev->kobj, &additional_attr_group);
+}
+
+static inline void __devexit omap_additional_remove(struct device *dev)
+{
+       sysfs_remove_group(&dev->kobj, &additional_attr_group);
+}
+
+static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
+{
+       mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
+       if (cpu_is_omap34xx()) {
+               mcbsp->max_tx_thres = max_thres(mcbsp);
+               mcbsp->max_rx_thres = max_thres(mcbsp);
+               /*
+                * REVISIT: Set dmap_op_mode to THRESHOLD as default
+                * for mcbsp2 instances.
+                */
+               if (omap_additional_add(mcbsp->dev))
+                       dev_warn(mcbsp->dev,
+                               "Unable to create additional controls\n");
+       } else {
+               mcbsp->max_tx_thres = -EINVAL;
+               mcbsp->max_rx_thres = -EINVAL;
+       }
+}
+
+static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
+{
+       if (cpu_is_omap34xx())
+               omap_additional_remove(mcbsp->dev);
+}
+#else
+static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
+static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
+#endif /* CONFIG_ARCH_OMAP34XX */
+
 /*
  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
  * 730 has only 2 McBSP, and both of them are MPU peripherals.
@@ -953,6 +1310,10 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
        mcbsp->dev = &pdev->dev;
        mcbsp_ptr[id] = mcbsp;
        platform_set_drvdata(pdev, mcbsp);
+
+       /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
+       omap34xx_device_init(mcbsp);
+
        return 0;
 
 err_fclk:
@@ -976,6 +1337,8 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
                                mcbsp->pdata->ops->free)
                        mcbsp->pdata->ops->free(mcbsp->id);
 
+               omap34xx_device_exit(mcbsp);
+
                clk_disable(mcbsp->fclk);
                clk_disable(mcbsp->iclk);
                clk_put(mcbsp->fclk);
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c/include/plat/audio-simtec.h
new file mode 100644 (file)
index 0000000..0f440b9
--- /dev/null
@@ -0,0 +1,37 @@
+/* arch/arm/plat-s3c/include/plat/audio-simtec.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *     http://armlinux.simtec.co.uk/
+ *     Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Simtec Audio support.
+*/
+
+/**
+ * struct s3c24xx_audio_simtec_pdata - platform data for simtec audio
+ * @use_mpllin: Select codec clock from MPLLin
+ * @output_cdclk: Need to output CDCLK to the codec
+ * @have_mic: Set if we have a MIC socket
+ * @have_lout: Set if we have a LineOut socket
+ * @amp_gpio: GPIO pin to enable the AMP
+ * @amp_gain: Option GPIO to control AMP gain
+ */
+struct s3c24xx_audio_simtec_pdata {
+       unsigned int    use_mpllin:1;
+       unsigned int    output_cdclk:1;
+
+       unsigned int    have_mic:1;
+       unsigned int    have_lout:1;
+
+       int             amp_gpio;
+       int             amp_gain[2];
+
+       void    (*startup)(void);
+};
+
+extern int simtec_audio_add(const char *codec_name,
+                           struct s3c24xx_audio_simtec_pdata *pdata);
index 0fad757..07659da 100644 (file)
 #define S3C2412_IISCON_RXDMA_ACTIVE    (1 << 1)
 #define S3C2412_IISCON_IIS_ACTIVE      (1 << 0)
 
+#define S3C64XX_IISMOD_BLC_16BIT       (0 << 13)
+#define S3C64XX_IISMOD_BLC_8BIT                (1 << 13)
+#define S3C64XX_IISMOD_BLC_24BIT       (2 << 13)
+#define S3C64XX_IISMOD_BLC_MASK                (3 << 13)
+
 #define S3C64XX_IISMOD_IMS_PCLK                (0 << 10)
 #define S3C64XX_IISMOD_IMS_SYSMUX      (1 << 10)
 
index 5e41e6d..db195ab 100644 (file)
@@ -155,7 +155,7 @@ struct aoedev {
        u16 fw_ver;             /* version of blade's firmware */
        struct work_struct work;/* disk create work struct */
        struct gendisk *gd;
-       struct request_queue blkq;
+       struct request_queue *blkq;
        struct hd_geometry geo; 
        sector_t ssize;
        struct timer_list timer;
index 2307a27..1e15889 100644 (file)
@@ -264,9 +264,12 @@ aoeblk_gdalloc(void *vp)
                goto err_disk;
        }
 
-       blk_queue_make_request(&d->blkq, aoeblk_make_request);
-       if (bdi_init(&d->blkq.backing_dev_info))
+       d->blkq = blk_alloc_queue(GFP_KERNEL);
+       if (!d->blkq)
                goto err_mempool;
+       blk_queue_make_request(d->blkq, aoeblk_make_request);
+       if (bdi_init(&d->blkq->backing_dev_info))
+               goto err_blkq;
        spin_lock_irqsave(&d->lock, flags);
        gd->major = AOE_MAJOR;
        gd->first_minor = d->sysminor * AOE_PARTITIONS;
@@ -276,7 +279,7 @@ aoeblk_gdalloc(void *vp)
        snprintf(gd->disk_name, sizeof gd->disk_name, "etherd/e%ld.%d",
                d->aoemajor, d->aoeminor);
 
-       gd->queue = &d->blkq;
+       gd->queue = d->blkq;
        d->gd = gd;
        d->flags &= ~DEVFL_GDALLOC;
        d->flags |= DEVFL_UP;
@@ -287,6 +290,9 @@ aoeblk_gdalloc(void *vp)
        aoedisk_add_sysfs(d);
        return;
 
+err_blkq:
+       blk_cleanup_queue(d->blkq);
+       d->blkq = NULL;
 err_mempool:
        mempool_destroy(d->bufpool);
 err_disk:
index eeea477..fa67027 100644 (file)
@@ -113,6 +113,7 @@ aoedev_freedev(struct aoedev *d)
        if (d->bufpool)
                mempool_destroy(d->bufpool);
        skbpoolfree(d);
+       blk_cleanup_queue(d->blkq);
        kfree(d);
 }
 
index 8c9d50d..c585577 100644 (file)
@@ -49,6 +49,7 @@
 #define PCI_DEVICE_ID_INTEL_IGDNG_D_HB     0x0040
 #define PCI_DEVICE_ID_INTEL_IGDNG_D_IG     0x0042
 #define PCI_DEVICE_ID_INTEL_IGDNG_M_HB     0x0044
+#define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB            0x0062
 #define PCI_DEVICE_ID_INTEL_IGDNG_M_IG     0x0046
 
 /* cover 915 and 945 variants */
@@ -81,7 +82,8 @@
                agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
                agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \
                agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \
-               agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB)
+               agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \
+               agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB)
 
 extern int agp_memory_reserved;
 
@@ -1216,6 +1218,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
        case PCI_DEVICE_ID_INTEL_G41_HB:
        case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:
        case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:
+       case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:
                *gtt_offset = *gtt_size = MB(2);
                break;
        default:
@@ -2195,6 +2198,8 @@ static const struct intel_driver_description {
            "IGDNG/D", NULL, &intel_i965_driver },
        { PCI_DEVICE_ID_INTEL_IGDNG_M_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
            "IGDNG/M", NULL, &intel_i965_driver },
+       { PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
+           "IGDNG/MA", NULL, &intel_i965_driver },
        { 0, 0, 0, NULL, NULL, NULL }
 };
 
@@ -2398,6 +2403,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
        ID(PCI_DEVICE_ID_INTEL_G41_HB),
        ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),
        ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),
+       ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),
        { }
 };
 
index 0c07a75..80e5ba4 100644 (file)
@@ -2267,8 +2267,6 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
                                    fence_list) {
                        old_obj = old_obj_priv->obj;
 
-                       reg = &dev_priv->fence_regs[old_obj_priv->fence_reg];
-
                        if (old_obj_priv->pin_count)
                                continue;
 
@@ -2290,8 +2288,11 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
                         */
                        i915_gem_object_flush_gpu_write_domain(old_obj);
                        ret = i915_gem_object_wait_rendering(old_obj);
-                       if (ret != 0)
+                       if (ret != 0) {
+                               drm_gem_object_unreference(old_obj);
                                return ret;
+                       }
+
                        break;
                }
 
@@ -2299,10 +2300,14 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
                 * Zap this virtual mapping so we can set up a fence again
                 * for this object next time we need it.
                 */
-               i915_gem_release_mmap(reg->obj);
+               i915_gem_release_mmap(old_obj);
+
                i = old_obj_priv->fence_reg;
+               reg = &dev_priv->fence_regs[i];
+
                old_obj_priv->fence_reg = I915_FENCE_REG_NONE;
                list_del_init(&old_obj_priv->fence_list);
+
                drm_gem_object_unreference(old_obj);
        }
 
@@ -4227,15 +4232,11 @@ int
 i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
                       struct drm_file *file_priv)
 {
-       int ret;
-
        if (drm_core_check_feature(dev, DRIVER_MODESET))
                return 0;
 
-       ret = i915_gem_idle(dev);
        drm_irq_uninstall(dev);
-
-       return ret;
+       return i915_gem_idle(dev);
 }
 
 void
index 3fadb53..748ed50 100644 (file)
@@ -2005,7 +2005,21 @@ static void igd_enable_cxsr(struct drm_device *dev, unsigned long clock,
        return;
 }
 
-const static int latency_ns = 3000; /* default for non-igd platforms */
+/*
+ * Latency for FIFO fetches is dependent on several factors:
+ *   - memory configuration (speed, channels)
+ *   - chipset
+ *   - current MCH state
+ * It can be fairly high in some situations, so here we assume a fairly
+ * pessimal value.  It's a tradeoff between extra memory fetches (if we
+ * set this value too high, the FIFO will fetch frequently to stay full)
+ * and power consumption (set it too low to save power and we might see
+ * FIFO underruns and display "flicker").
+ *
+ * A value of 5us seems to be a good balance; safe for very low end
+ * platforms but not overly aggressive on lower latency configs.
+ */
+const static int latency_ns = 5000;
 
 static int intel_get_fifo_size(struct drm_device *dev, int plane)
 {
index f2afc4a..2b914d7 100644 (file)
@@ -1263,7 +1263,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
 
        if (IS_eDP(intel_output)) {
                intel_output->crtc_mask = (1 << 1);
-               intel_output->clone_mask = (1 << INTEL_OUTPUT_EDP);
+               intel_output->clone_mask = (1 << INTEL_EDP_CLONE_BIT);
        } else
                intel_output->crtc_mask = (1 << 0) | (1 << 1);
        connector->interlace_allowed = true;
index 25aa6fa..26a6227 100644 (file)
@@ -74,6 +74,7 @@
 #define INTEL_LVDS_CLONE_BIT 14
 #define INTEL_DVO_TMDS_CLONE_BIT 15
 #define INTEL_DVO_LVDS_CLONE_BIT 16
+#define INTEL_EDP_CLONE_BIT 17
 
 #define INTEL_DVO_CHIP_NONE 0
 #define INTEL_DVO_CHIP_LVDS 1
index 2fbe13a..5b1c9e9 100644 (file)
@@ -1730,6 +1730,7 @@ intel_tv_init(struct drm_device *dev)
        drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
        tv_priv = (struct intel_tv_priv *)(intel_output + 1);
        intel_output->type = INTEL_OUTPUT_TVOUT;
+       intel_output->crtc_mask = (1 << 0) | (1 << 1);
        intel_output->clone_mask = (1 << INTEL_TV_CLONE_BIT);
        intel_output->enc.possible_crtcs = ((1 << 0) | (1 << 1));
        intel_output->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT);
index 053f4ec..051bca6 100644 (file)
@@ -995,7 +995,7 @@ static const unsigned r300_reg_safe_bm[159] = {
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
        0x00000000, 0xFFFF0000, 0xFFFFFFFF, 0xFF80FFFF,
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-       0x0003FC01, 0xFFFFFFF8, 0xFE800B19,
+       0x0003FC01, 0xFFFFFCF8, 0xFF800B19,
 };
 
 static int r300_packet0_check(struct radeon_cs_parser *p,
index 7ca6c13..93d8f88 100644 (file)
@@ -266,6 +266,7 @@ static struct radeon_asic rs400_asic = {
 /*
  * rs600.
  */
+int rs600_init(struct radeon_device *dev);
 void rs600_errata(struct radeon_device *rdev);
 void rs600_vram_info(struct radeon_device *rdev);
 int rs600_mc_init(struct radeon_device *rdev);
@@ -281,7 +282,7 @@ uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
 void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
 void rs600_bandwidth_update(struct radeon_device *rdev);
 static struct radeon_asic rs600_asic = {
-       .init = &r300_init,
+       .init = &rs600_init,
        .errata = &rs600_errata,
        .vram_info = &rs600_vram_info,
        .gpu_reset = &r300_gpu_reset,
@@ -316,7 +317,6 @@ static struct radeon_asic rs600_asic = {
 /*
  * rs690,rs740
  */
-int rs690_init(struct radeon_device *rdev);
 void rs690_errata(struct radeon_device *rdev);
 void rs690_vram_info(struct radeon_device *rdev);
 int rs690_mc_init(struct radeon_device *rdev);
@@ -325,7 +325,7 @@ uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
 void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
 void rs690_bandwidth_update(struct radeon_device *rdev);
 static struct radeon_asic rs690_asic = {
-       .init = &rs690_init,
+       .init = &rs600_init,
        .errata = &rs690_errata,
        .vram_info = &rs690_vram_info,
        .gpu_reset = &r300_gpu_reset,
index 7e8ce98..02fd11a 100644 (file)
@@ -409,3 +409,68 @@ void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
                ((reg) & RS600_MC_ADDR_MASK));
        WREG32(RS600_MC_DATA, v);
 }
+
+static const unsigned rs600_reg_safe_bm[219] = {
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0x17FF1FFF, 0xFFFFFFFC, 0xFFFFFFFF, 0xFF30FFBF,
+       0xFFFFFFF8, 0xC3E6FFFF, 0xFFFFF6DF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFF03F,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFEFCE, 0xF00EBFFF, 0x007C0000,
+       0xF0000078, 0xFF000009, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFF7FF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFC78, 0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFFFF,
+       0x38FF8F50, 0xFFF88082, 0xF000000C, 0xFAE009FF,
+       0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000,
+       0x00000000, 0x0000C100, 0x00000000, 0x00000000,
+       0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       0x00000000, 0xFFFF0000, 0xFFFFFFFF, 0xFF80FFFF,
+       0x00000000, 0x00000000, 0x00000000, 0x00000000,
+       0x0003FC01, 0xFFFFFCF8, 0xFF800B19, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+       0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+};
+
+int rs600_init(struct radeon_device *rdev)
+{
+       rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm;
+       rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs600_reg_safe_bm);
+       return 0;
+}
index bc6b7c5..8798825 100644 (file)
@@ -653,67 +653,3 @@ void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
        WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);
 }
 
-static const unsigned rs690_reg_safe_bm[219] = {
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0x17FF1FFF,0xFFFFFFFC,0xFFFFFFFF,0xFF30FFBF,
-       0xFFFFFFF8,0xC3E6FFFF,0xFFFFF6DF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFF03F,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFEFCE,0xF00EBFFF,0x007C0000,
-       0xF0000078,0xFF000009,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFF7FF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFC78,0xFFFFFFFF,0xFFFFFFFE,0xFFFFFFFF,
-       0x38FF8F50,0xFFF88082,0xF000000C,0xFAE009FF,
-       0x0000FFFF,0xFFFFFFFF,0xFFFFFFFF,0x00000000,
-       0x00000000,0x0000C100,0x00000000,0x00000000,
-       0x00000000,0x00000000,0x00000000,0x00000000,
-       0x00000000,0xFFFF0000,0xFFFFFFFF,0xFF80FFFF,
-       0x00000000,0x00000000,0x00000000,0x00000000,
-       0x0003FC01,0xFFFFFFF8,0xFE800B19,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-       0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,
-};
-
-int rs690_init(struct radeon_device *rdev)
-{
-       rdev->config.r300.reg_safe_bm = rs690_reg_safe_bm;
-       rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs690_reg_safe_bm);
-       return 0;
-}
index 31a7f66..0566fb6 100644 (file)
@@ -508,7 +508,7 @@ static const unsigned r500_reg_safe_bm[219] = {
        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFF80FFFF,
        0x00000000, 0x00000000, 0x00000000, 0x00000000,
-       0x0003FC01, 0x3FFFFCF8, 0xFE800B19, 0xFFFFFFFF,
+       0x0003FC01, 0x3FFFFCF8, 0xFF800B19, 0xFFDFFFFF,
        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
index 527908f..063b933 100644 (file)
@@ -408,6 +408,7 @@ static struct pcmcia_device_id ide_ids[] = {
        PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9),
        PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591),
        PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728),
+       PCMCIA_DEVICE_PROD_ID12("CNF   ", "CD-ROM", 0x46d7db81, 0x66536591),
        PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591),
        PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4),
        PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde),
index 24f7ca5..a00ec63 100644 (file)
@@ -491,7 +491,7 @@ static int gfar_remove(struct of_device *ofdev)
 
        dev_set_drvdata(&ofdev->dev, NULL);
 
-       unregister_netdev(dev);
+       unregister_netdev(priv->ndev);
        iounmap(priv->regs);
        free_netdev(priv->ndev);
 
index f3c5b27..1f13751 100644 (file)
@@ -1542,28 +1542,31 @@ int may_open(struct path *path, int acc_mode, int flag)
         * An append-only file must be opened in append mode for writing.
         */
        if (IS_APPEND(inode)) {
+               error = -EPERM;
                if  ((flag & FMODE_WRITE) && !(flag & O_APPEND))
-                       return -EPERM;
+                       goto err_out;
                if (flag & O_TRUNC)
-                       return -EPERM;
+                       goto err_out;
        }
 
        /* O_NOATIME can only be set by the owner or superuser */
        if (flag & O_NOATIME)
-               if (!is_owner_or_cap(inode))
-                       return -EPERM;
+               if (!is_owner_or_cap(inode)) {
+                       error = -EPERM;
+                       goto err_out;
+               }
 
        /*
         * Ensure there are no outstanding leases on the file.
         */
        error = break_lease(inode, flag);
        if (error)
-               return error;
+               goto err_out;
 
        if (flag & O_TRUNC) {
                error = get_write_access(inode);
                if (error)
-                       return error;
+                       goto err_out;
 
                /*
                 * Refuse to truncate files with mandatory locks held on them.
@@ -1581,12 +1584,17 @@ int may_open(struct path *path, int acc_mode, int flag)
                }
                put_write_access(inode);
                if (error)
-                       return error;
+                       goto err_out;
        } else
                if (flag & FMODE_WRITE)
                        vfs_dq_init(inode);
 
        return 0;
+err_out:
+       ima_counts_put(path, acc_mode ?
+                      acc_mode & (MAY_READ | MAY_WRITE | MAY_EXEC) :
+                      ACC_MODE(flag) & (MAY_READ | MAY_WRITE));
+       return error;
 }
 
 /*
index e8c6c91..0d3974f 100644 (file)
@@ -23,7 +23,7 @@
  */
 #define NR_UNIX98_PTY_DEFAULT  4096      /* Default maximum for Unix98 ptys */
 #define NR_UNIX98_PTY_MAX      (1 << MINORBITS) /* Absolute limit */
-#define NR_LDISCS              19
+#define NR_LDISCS              20
 
 /* line disciplines */
 #define N_TTY          0
@@ -47,6 +47,8 @@
 #define N_SLCAN                17      /* Serial / USB serial CAN Adaptors */
 #define N_PPS          18      /* Pulse per Second */
 
+#define N_V253         19      /* Codec control over voice modem */
+
 /*
  * This character is the same as _POSIX_VDISABLE: it cannot be used as
  * a c_cc[] character, but indicates that a particular special character
index 251fc1c..3dae3f7 100644 (file)
@@ -32,6 +32,9 @@
 #include "control.h"
 #include "info.h"
 
+/* maximum number of devices on the AC97 bus */
+#define        AC97_BUS_MAX_DEVICES    4
+
 /*
  *  AC'97 codec registers
  */
@@ -642,4 +645,10 @@ int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime);
 /* ad hoc AC97 device driver access */
 extern struct bus_type ac97_bus_type;
 
+/* AC97 platform_data adding function */
+static inline void snd_ac97_dev_add_pdata(struct snd_ac97 *ac97, void *data)
+{
+       ac97->dev.platform_data = data;
+}
+
 #endif /* __SOUND_AC97_CODEC_H */
diff --git a/include/sound/sh_fsi.h b/include/sound/sh_fsi.h
new file mode 100644 (file)
index 0000000..c022736
--- /dev/null
@@ -0,0 +1,83 @@
+#ifndef __SOUND_FSI_H
+#define __SOUND_FSI_H
+
+/*
+ * Fifo-attached Serial Interface (FSI) support for SH7724
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* flags format
+
+ * 0xABCDEEFF
+ *
+ * A:  channel size for TDM (input)
+ * B:  channel size for TDM (ooutput)
+ * C:  inversion
+ * D:  mode
+ * E:  input format
+ * F:  output format
+ */
+
+#include <linux/clk.h>
+#include <sound/soc.h>
+
+/* TDM channel */
+#define SH_FSI_SET_CH_I(x)     ((x & 0xF) << 28)
+#define SH_FSI_SET_CH_O(x)     ((x & 0xF) << 24)
+
+#define SH_FSI_CH_IMASK                0xF0000000
+#define SH_FSI_CH_OMASK                0x0F000000
+#define SH_FSI_GET_CH_I(x)     ((x & SH_FSI_CH_IMASK) >> 28)
+#define SH_FSI_GET_CH_O(x)     ((x & SH_FSI_CH_OMASK) >> 24)
+
+/* clock inversion */
+#define SH_FSI_INVERSION_MASK  0x00F00000
+#define SH_FSI_LRM_INV         (1 << 20)
+#define SH_FSI_BRM_INV         (1 << 21)
+#define SH_FSI_LRS_INV         (1 << 22)
+#define SH_FSI_BRS_INV         (1 << 23)
+
+/* mode */
+#define SH_FSI_MODE_MASK       0x000F0000
+#define SH_FSI_IN_SLAVE_MODE   (1 << 16)  /* default master mode */
+#define SH_FSI_OUT_SLAVE_MODE  (1 << 17)  /* default master mode */
+
+/* DI format */
+#define SH_FSI_FMT_MASK                0x000000FF
+#define SH_FSI_IFMT(x)         (((SH_FSI_FMT_ ## x) & SH_FSI_FMT_MASK) << 8)
+#define SH_FSI_OFMT(x)         (((SH_FSI_FMT_ ## x) & SH_FSI_FMT_MASK) << 0)
+#define SH_FSI_GET_IFMT(x)     ((x >> 8) & SH_FSI_FMT_MASK)
+#define SH_FSI_GET_OFMT(x)     ((x >> 0) & SH_FSI_FMT_MASK)
+
+#define SH_FSI_FMT_MONO                (1 << 0)
+#define SH_FSI_FMT_MONO_DELAY  (1 << 1)
+#define SH_FSI_FMT_PCM         (1 << 2)
+#define SH_FSI_FMT_I2S         (1 << 3)
+#define SH_FSI_FMT_TDM         (1 << 4)
+#define SH_FSI_FMT_TDM_DELAY   (1 << 5)
+
+#define SH_FSI_IFMT_TDM_CH(x) \
+       (SH_FSI_IFMT(TDM)       | SH_FSI_SET_CH_I(x))
+#define SH_FSI_IFMT_TDM_DELAY_CH(x) \
+       (SH_FSI_IFMT(TDM_DELAY) | SH_FSI_SET_CH_I(x))
+
+#define SH_FSI_OFMT_TDM_CH(x) \
+       (SH_FSI_OFMT(TDM)       | SH_FSI_SET_CH_O(x))
+#define SH_FSI_OFMT_TDM_DELAY_CH(x) \
+       (SH_FSI_OFMT(TDM_DELAY) | SH_FSI_SET_CH_O(x))
+
+struct sh_fsi_platform_info {
+       unsigned long porta_flags;
+       unsigned long portb_flags;
+};
+
+extern struct snd_soc_dai fsi_soc_dai[2];
+extern struct snd_soc_platform fsi_soc_platform;
+
+#endif /* __SOUND_FSI_H */
index 352d7ee..97ca9af 100644 (file)
@@ -27,8 +27,8 @@ struct snd_pcm_substream;
 #define SND_SOC_DAIFMT_I2S             0 /* I2S mode */
 #define SND_SOC_DAIFMT_RIGHT_J         1 /* Right Justified mode */
 #define SND_SOC_DAIFMT_LEFT_J          2 /* Left Justified mode */
-#define SND_SOC_DAIFMT_DSP_A           3 /* L data msb after FRM LRC */
-#define SND_SOC_DAIFMT_DSP_B           4 /* L data msb during FRM LRC */
+#define SND_SOC_DAIFMT_DSP_A           3 /* L data MSB after FRM LRC */
+#define SND_SOC_DAIFMT_DSP_B           4 /* L data MSB during FRM LRC */
 #define SND_SOC_DAIFMT_AC97            5 /* AC97 */
 
 /* left and right justified also known as MSB and LSB respectively */
@@ -38,7 +38,7 @@ struct snd_pcm_substream;
 /*
  * DAI Clock gating.
  *
- * DAI bit clocks can be be gated (disabled) when not the DAI is not
+ * DAI bit clocks can be be gated (disabled) when the DAI is not
  * sending or receiving PCM data in a frame. This can be used to save power.
  */
 #define SND_SOC_DAIFMT_CONT            (0 << 4) /* continuous clock */
@@ -51,21 +51,21 @@ struct snd_pcm_substream;
  * format.
  */
 #define SND_SOC_DAIFMT_NB_NF           (0 << 8) /* normal bit clock + frame */
-#define SND_SOC_DAIFMT_NB_IF           (1 << 8) /* normal bclk + inv frm */
-#define SND_SOC_DAIFMT_IB_NF           (2 << 8) /* invert bclk + nor frm */
-#define SND_SOC_DAIFMT_IB_IF           (3 << 8) /* invert bclk + frm */
+#define SND_SOC_DAIFMT_NB_IF           (1 << 8) /* normal BCLK + inv FRM */
+#define SND_SOC_DAIFMT_IB_NF           (2 << 8) /* invert BCLK + nor FRM */
+#define SND_SOC_DAIFMT_IB_IF           (3 << 8) /* invert BCLK + FRM */
 
 /*
  * DAI hardware clock masters.
  *
  * This is wrt the codec, the inverse is true for the interface
- * i.e. if the codec is clk and frm master then the interface is
+ * i.e. if the codec is clk and FRM master then the interface is
  * clk and frame slave.
  */
-#define SND_SOC_DAIFMT_CBM_CFM         (0 << 12) /* codec clk & frm master */
-#define SND_SOC_DAIFMT_CBS_CFM         (1 << 12) /* codec clk slave & frm master */
+#define SND_SOC_DAIFMT_CBM_CFM         (0 << 12) /* codec clk & FRM master */
+#define SND_SOC_DAIFMT_CBS_CFM         (1 << 12) /* codec clk slave & FRM master */
 #define SND_SOC_DAIFMT_CBM_CFS         (2 << 12) /* codec clk master & frame slave */
-#define SND_SOC_DAIFMT_CBS_CFS         (3 << 12) /* codec clk & frm slave */
+#define SND_SOC_DAIFMT_CBS_CFS         (3 << 12) /* codec clk & FRM slave */
 
 #define SND_SOC_DAIFMT_FORMAT_MASK     0x000f
 #define SND_SOC_DAIFMT_CLOCK_MASK      0x00f0
@@ -78,7 +78,13 @@ struct snd_pcm_substream;
 #define SND_SOC_CLOCK_IN               0
 #define SND_SOC_CLOCK_OUT              1
 
-#define SND_SOC_STD_AC97_FMTS (SNDRV_PCM_FMTBIT_S16_LE |\
+#define SND_SOC_STD_AC97_FMTS (SNDRV_PCM_FMTBIT_S8 |\
+                              SNDRV_PCM_FMTBIT_S16_LE |\
+                              SNDRV_PCM_FMTBIT_S16_BE |\
+                              SNDRV_PCM_FMTBIT_S20_3LE |\
+                              SNDRV_PCM_FMTBIT_S20_3BE |\
+                              SNDRV_PCM_FMTBIT_S24_3LE |\
+                              SNDRV_PCM_FMTBIT_S24_3BE |\
                                SNDRV_PCM_FMTBIT_S32_LE |\
                                SNDRV_PCM_FMTBIT_S32_BE)
 
@@ -106,7 +112,7 @@ int snd_soc_dai_set_pll(struct snd_soc_dai *dai,
 int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt);
 
 int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai,
-       unsigned int mask, int slots);
+       unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width);
 
 int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate);
 
@@ -116,12 +122,12 @@ int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute);
 /*
  * Digital Audio Interface.
  *
- * Describes the Digital Audio Interface in terms of it's ALSA, DAI and AC97
- * operations an capabilities. Codec and platfom drivers will register a this
+ * Describes the Digital Audio Interface in terms of its ALSA, DAI and AC97
+ * operations and capabilities. Codec and platform drivers will register this
  * structure for every DAI they have.
  *
  * This structure covers the clocking, formating and ALSA operations for each
- * interface a
+ * interface.
  */
 struct snd_soc_dai_ops {
        /*
@@ -140,7 +146,8 @@ struct snd_soc_dai_ops {
         */
        int (*set_fmt)(struct snd_soc_dai *dai, unsigned int fmt);
        int (*set_tdm_slot)(struct snd_soc_dai *dai,
-               unsigned int mask, int slots);
+               unsigned int tx_mask, unsigned int rx_mask,
+               int slots, int slot_width);
        int (*set_tristate)(struct snd_soc_dai *dai, int tristate);
 
        /*
@@ -179,6 +186,7 @@ struct snd_soc_dai {
        int ac97_control;
 
        struct device *dev;
+       void *ac97_pdata;       /* platform_data for the ac97 codec */
 
        /* DAI callbacks */
        int (*probe)(struct platform_device *pdev,
index ec8a45f..c1410e3 100644 (file)
        .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD}
 
 /* stream domain */
+#define SND_SOC_DAPM_AIF_IN(wname, stname, wslot, wreg, wshift, winvert) \
+{      .id = snd_soc_dapm_aif_in, .name = wname, .sname = stname, \
+       .reg = wreg, .shift = wshift, .invert = winvert }
+#define SND_SOC_DAPM_AIF_OUT(wname, stname, wslot, wreg, wshift, winvert) \
+{      .id = snd_soc_dapm_aif_out, .name = wname, .sname = stname, \
+       .reg = wreg, .shift = wshift, .invert = winvert }
 #define SND_SOC_DAPM_DAC(wname, stname, wreg, wshift, winvert) \
 {      .id = snd_soc_dapm_dac, .name = wname, .sname = stname, .reg = wreg, \
        .shift = wshift, .invert = winvert}
@@ -279,9 +285,11 @@ int snd_soc_dapm_add_routes(struct snd_soc_codec *codec,
 /* dapm events */
 int snd_soc_dapm_stream_event(struct snd_soc_codec *codec, char *stream,
        int event);
+void snd_soc_dapm_shutdown(struct snd_soc_device *socdev);
 
 /* dapm sys fs - used by the core */
 int snd_soc_dapm_sys_add(struct device *dev);
+void snd_soc_dapm_debugfs_init(struct snd_soc_codec *codec);
 
 /* dapm audio pin control and status */
 int snd_soc_dapm_enable_pin(struct snd_soc_codec *codec, const char *pin);
@@ -311,6 +319,8 @@ enum snd_soc_dapm_type {
        snd_soc_dapm_pre,                       /* machine specific pre widget - exec first */
        snd_soc_dapm_post,                      /* machine specific post widget - exec last */
        snd_soc_dapm_supply,            /* power/clock supply */
+       snd_soc_dapm_aif_in,            /* audio interface input */
+       snd_soc_dapm_aif_out,           /* audio interface output */
 };
 
 /*
index cf6111d..475cb7e 100644 (file)
        .info = snd_soc_info_volsw, \
        .get = xhandler_get, .put = xhandler_put, \
        .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
+#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
+        xhandler_get, xhandler_put, tlv_array) \
+{      .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
+       .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
+                SNDRV_CTL_ELEM_ACCESS_READWRITE, \
+       .tlv.p = (tlv_array), \
+       .info = snd_soc_info_volsw, \
+       .get = xhandler_get, .put = xhandler_put, \
+       .private_value = (unsigned long)&(struct soc_mixer_control) \
+               {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
+               .max = xmax, .invert = xinvert} }
+#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
+        xhandler_get, xhandler_put, tlv_array) \
+{      .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
+       .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
+                SNDRV_CTL_ELEM_ACCESS_READWRITE, \
+       .tlv.p = (tlv_array), \
+       .info = snd_soc_info_volsw_2r, \
+       .get = xhandler_get, .put = xhandler_put, \
+       .private_value = (unsigned long)&(struct soc_mixer_control) \
+               {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
+               .max = xmax, .invert = xinvert} }
 #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
 {      .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
        .info = snd_soc_info_bool_ext, \
@@ -183,14 +205,28 @@ struct snd_soc_jack_gpio;
 #endif
 
 typedef int (*hw_write_t)(void *,const char* ,int);
-typedef int (*hw_read_t)(void *,char* ,int);
 
 extern struct snd_ac97_bus_ops soc_ac97_ops;
 
+enum snd_soc_control_type {
+       SND_SOC_CUSTOM,
+       SND_SOC_I2C,
+       SND_SOC_SPI,
+};
+
 int snd_soc_register_platform(struct snd_soc_platform *platform);
 void snd_soc_unregister_platform(struct snd_soc_platform *platform);
 int snd_soc_register_codec(struct snd_soc_codec *codec);
 void snd_soc_unregister_codec(struct snd_soc_codec *codec);
+int snd_soc_codec_volatile_register(struct snd_soc_codec *codec, int reg);
+int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
+                              int addr_bits, int data_bits,
+                              enum snd_soc_control_type control);
+
+#ifdef CONFIG_PM
+int snd_soc_suspend_device(struct device *dev);
+int snd_soc_resume_device(struct device *dev);
+#endif
 
 /* pcm <-> DAI connect */
 void snd_soc_free_pcms(struct snd_soc_device *socdev);
@@ -216,9 +252,9 @@ void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
 
 /* codec register bit access */
 int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
-                               unsigned short mask, unsigned short value);
+                               unsigned int mask, unsigned int value);
 int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
-                               unsigned short mask, unsigned short value);
+                               unsigned int mask, unsigned int value);
 
 int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
        struct snd_ac97_bus_ops *ops, int num);
@@ -356,8 +392,10 @@ struct snd_soc_codec {
        int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
        int (*display_register)(struct snd_soc_codec *, char *,
                                size_t, unsigned int);
+       int (*volatile_register)(unsigned int);
+       int (*readable_register)(unsigned int);
        hw_write_t hw_write;
-       hw_read_t hw_read;
+       unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int);
        void *reg_cache;
        short reg_cache_size;
        short reg_cache_step;
@@ -369,8 +407,6 @@ struct snd_soc_codec {
        enum snd_soc_bias_level bias_level;
        enum snd_soc_bias_level suspend_bias_level;
        struct delayed_work delayed_work;
-       struct list_head up_list;
-       struct list_head down_list;
 
        /* codec DAI's */
        struct snd_soc_dai *dai;
@@ -379,6 +415,7 @@ struct snd_soc_codec {
 #ifdef CONFIG_DEBUG_FS
        struct dentry *debugfs_reg;
        struct dentry *debugfs_pop_time;
+       struct dentry *debugfs_dapm;
 #endif
 };
 
diff --git a/include/sound/uda1380.h b/include/sound/uda1380.h
new file mode 100644 (file)
index 0000000..381319c
--- /dev/null
@@ -0,0 +1,22 @@
+/*
+ * UDA1380 ALSA SoC Codec driver
+ *
+ * Copyright 2009 Philipp Zabel
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __UDA1380_H
+#define __UDA1380_H
+
+struct uda1380_platform_data {
+       int gpio_power;
+       int gpio_reset;
+       int dac_clk;
+#define UDA1380_DAC_CLK_SYSCLK 0
+#define UDA1380_DAC_CLK_WSPLL  1
+};
+
+#endif /* __UDA1380_H */
diff --git a/include/sound/wm8993.h b/include/sound/wm8993.h
new file mode 100644 (file)
index 0000000..9c661f2
--- /dev/null
@@ -0,0 +1,44 @@
+/*
+ * linux/sound/wm8993.h -- Platform data for WM8993
+ *
+ * Copyright 2009 Wolfson Microelectronics. PLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_WM8993_H
+#define __LINUX_SND_WM8993_H
+
+/* Note that EQ1 only contains the enable/disable bit so will be
+   ignored but is included for simplicity.
+ */
+struct wm8993_retune_mobile_setting {
+       const char *name;
+       unsigned int rate;
+       u16 config[24];
+};
+
+struct wm8993_platform_data {
+       struct wm8993_retune_mobile_setting *retune_configs;
+       int num_retune_configs;
+
+       /* LINEOUT can be differential or single ended */
+       unsigned int lineout1_diff:1;
+       unsigned int lineout2_diff:1;
+
+       /* Common mode feedback */
+       unsigned int lineout1fb:1;
+       unsigned int lineout2fb:1;
+
+       /* Microphone biases: 0=0.9*AVDD1 1=0.65*AVVD1 */
+       unsigned int micbias1_lvl:1;
+       unsigned int micbias2_lvl:1;
+
+       /* Jack detect threashold levels, see datasheet for values */
+       unsigned int jd_scthr:2;
+       unsigned int jd_thr:2;
+};
+
+#endif
index 4732f5e..b85e61b 100644 (file)
@@ -249,7 +249,11 @@ void ima_counts_put(struct path *path, int mask)
        struct inode *inode = path->dentry->d_inode;
        struct ima_iint_cache *iint;
 
-       if (!ima_initialized || !S_ISREG(inode->i_mode))
+       /* The inode may already have been freed, freeing the iint
+        * with it. Verify the inode is not NULL before dereferencing
+        * it.
+        */
+       if (!ima_initialized || !inode || !S_ISREG(inode->i_mode))
                return;
        iint = ima_iint_find_insert_get(inode);
        if (!iint)
index c570ebd..4e34d19 100644 (file)
@@ -170,6 +170,13 @@ static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
        struct snd_ac97_bus *ac97_bus;
        struct snd_ac97_template ac97_template;
        int ret;
+       pxa2xx_audio_ops_t *pdata = dev->dev.platform_data;
+
+       if (dev->id >= 0) {
+               dev_err(&dev->dev, "PXA2xx has only one AC97 port.\n");
+               ret = -ENXIO;
+               goto err_dev;
+       }
 
        ret = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
                              THIS_MODULE, 0, &card);
@@ -200,6 +207,8 @@ static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
        snprintf(card->longname, sizeof(card->longname),
                 "%s (%s)", dev->dev.driver->name, card->mixername);
 
+       if (pdata && pdata->codec_pdata[0])
+               snd_ac97_dev_add_pdata(ac97_bus->codec[0], pdata->codec_pdata[0]);
        snd_card_set_dev(card, &dev->dev);
        ret = snd_card_register(card);
        if (ret == 0) {
@@ -212,6 +221,7 @@ err_remove:
 err:
        if (card)
                snd_card_free(card);
+err_dev:
        return ret;
 }
 
index 6205f37..743ac6a 100644 (file)
@@ -136,6 +136,9 @@ int __pxa2xx_pcm_prepare(struct snd_pcm_substream *substream)
 {
        struct pxa2xx_runtime_data *prtd = substream->runtime->private_data;
 
+       if (!prtd || !prtd->params)
+               return 0;
+
        DCSR(prtd->dma_ch) &= ~DCSR_RUN;
        DCSR(prtd->dma_ch) = 0;
        DCMD(prtd->dma_ch) = 0;
index 35df614..3d1f513 100644 (file)
@@ -88,12 +88,10 @@ static int resize_info_buffer(struct snd_info_buffer *buffer,
        char *nbuf;
 
        nsize = PAGE_ALIGN(nsize);
-       nbuf = kmalloc(nsize, GFP_KERNEL);
+       nbuf = krealloc(buffer->buffer, nsize, GFP_KERNEL);
        if (! nbuf)
                return -ENOMEM;
 
-       memcpy(nbuf, buffer->buffer, buffer->len);
-       kfree(buffer->buffer);
        buffer->buffer = nbuf;
        buffer->len = nsize;
        return 0;
index 3ee0269..02f79d2 100644 (file)
@@ -1,5 +1,5 @@
 /*
- *  Driver for C-Media's CMI8330 soundcards.
+ *  Driver for C-Media's CMI8330 and CMI8329 soundcards.
  *  Copyright (c) by George Talusan <gstalusan@uwaterloo.ca>
  *    http://www.undergrad.math.uwaterloo.ca/~gstalusa
  *
@@ -35,7 +35,7 @@
  *
  *  This card has two mixers and two PCM devices.  I've cheesed it such
  *  that recording and playback can be done through the same device.
- *  The driver "magically" routes the capturing to the CMI8330 codec,
+ *  The driver "magically" routes the capturing to the AD1848 codec,
  *  and playback to the SB16 codec.  This allows for full-duplex mode
  *  to some extent.
  *  The utilities in alsa-utils are aware of both devices, so passing
@@ -64,7 +64,7 @@
 /*
  */
 MODULE_AUTHOR("George Talusan <gstalusan@uwaterloo.ca>");
-MODULE_DESCRIPTION("C-Media CMI8330");
+MODULE_DESCRIPTION("C-Media CMI8330/CMI8329");
 MODULE_LICENSE("GPL");
 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8330,isapnp:{CMI0001,@@@0001,@X@0001}}}");
 
@@ -86,38 +86,38 @@ static long mpuport[SNDRV_CARDS] = SNDRV_DEFAULT_PORT;
 static int mpuirq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ;
 
 module_param_array(index, int, NULL, 0444);
-MODULE_PARM_DESC(index, "Index value for CMI8330 soundcard.");
+MODULE_PARM_DESC(index, "Index value for CMI8330/CMI8329 soundcard.");
 module_param_array(id, charp, NULL, 0444);
-MODULE_PARM_DESC(id, "ID string  for CMI8330 soundcard.");
+MODULE_PARM_DESC(id, "ID string  for CMI8330/CMI8329 soundcard.");
 module_param_array(enable, bool, NULL, 0444);
-MODULE_PARM_DESC(enable, "Enable CMI8330 soundcard.");
+MODULE_PARM_DESC(enable, "Enable CMI8330/CMI8329 soundcard.");
 #ifdef CONFIG_PNP
 module_param_array(isapnp, bool, NULL, 0444);
 MODULE_PARM_DESC(isapnp, "PnP detection for specified soundcard.");
 #endif
 
 module_param_array(sbport, long, NULL, 0444);
-MODULE_PARM_DESC(sbport, "Port # for CMI8330 SB driver.");
+MODULE_PARM_DESC(sbport, "Port # for CMI8330/CMI8329 SB driver.");
 module_param_array(sbirq, int, NULL, 0444);
-MODULE_PARM_DESC(sbirq, "IRQ # for CMI8330 SB driver.");
+MODULE_PARM_DESC(sbirq, "IRQ # for CMI8330/CMI8329 SB driver.");
 module_param_array(sbdma8, int, NULL, 0444);
-MODULE_PARM_DESC(sbdma8, "DMA8 for CMI8330 SB driver.");
+MODULE_PARM_DESC(sbdma8, "DMA8 for CMI8330/CMI8329 SB driver.");
 module_param_array(sbdma16, int, NULL, 0444);
-MODULE_PARM_DESC(sbdma16, "DMA16 for CMI8330 SB driver.");
+MODULE_PARM_DESC(sbdma16, "DMA16 for CMI8330/CMI8329 SB driver.");
 
 module_param_array(wssport, long, NULL, 0444);
-MODULE_PARM_DESC(wssport, "Port # for CMI8330 WSS driver.");
+MODULE_PARM_DESC(wssport, "Port # for CMI8330/CMI8329 WSS driver.");
 module_param_array(wssirq, int, NULL, 0444);
-MODULE_PARM_DESC(wssirq, "IRQ # for CMI8330 WSS driver.");
+MODULE_PARM_DESC(wssirq, "IRQ # for CMI8330/CMI8329 WSS driver.");
 module_param_array(wssdma, int, NULL, 0444);
-MODULE_PARM_DESC(wssdma, "DMA for CMI8330 WSS driver.");
+MODULE_PARM_DESC(wssdma, "DMA for CMI8330/CMI8329 WSS driver.");
 
 module_param_array(fmport, long, NULL, 0444);
-MODULE_PARM_DESC(fmport, "FM port # for CMI8330 driver.");
+MODULE_PARM_DESC(fmport, "FM port # for CMI8330/CMI8329 driver.");
 module_param_array(mpuport, long, NULL, 0444);
-MODULE_PARM_DESC(mpuport, "MPU-401 port # for CMI8330 driver.");
+MODULE_PARM_DESC(mpuport, "MPU-401 port # for CMI8330/CMI8329 driver.");
 module_param_array(mpuirq, int, NULL, 0444);
-MODULE_PARM_DESC(mpuirq, "IRQ # for CMI8330 MPU-401 port.");
+MODULE_PARM_DESC(mpuirq, "IRQ # for CMI8330/CMI8329 MPU-401 port.");
 #ifdef CONFIG_PNP
 static int isa_registered;
 static int pnp_registered;
@@ -156,6 +156,11 @@ static unsigned char snd_cmi8330_image[((CMI8330_CDINGAIN)-16) + 1] =
 
 typedef int (*snd_pcm_open_callback_t)(struct snd_pcm_substream *);
 
+enum card_type {
+       CMI8330,
+       CMI8329
+};
+
 struct snd_cmi8330 {
 #ifdef CONFIG_PNP
        struct pnp_dev *cap;
@@ -172,11 +177,14 @@ struct snd_cmi8330 {
                snd_pcm_open_callback_t open;
                void *private_data; /* sb or wss */
        } streams[2];
+
+       enum card_type type;
 };
 
 #ifdef CONFIG_PNP
 
 static struct pnp_card_device_id snd_cmi8330_pnpids[] = {
+       { .id = "CMI0001", .devs = { { "@X@0001" }, { "@@@0001" }, { "@H@0001" }, { "A@@0001" } } },
        { .id = "CMI0001", .devs = { { "@@@0001" }, { "@X@0001" }, { "@H@0001" } } },
        { .id = "" }
 };
@@ -304,7 +312,7 @@ static int __devinit snd_cmi8330_mixer(struct snd_card *card, struct snd_cmi8330
        unsigned int idx;
        int err;
 
-       strcpy(card->mixername, "CMI8330/C3D");
+       strcpy(card->mixername, (acard->type == CMI8329) ? "CMI8329" : "CMI8330/C3D");
 
        for (idx = 0; idx < ARRAY_SIZE(snd_cmi8330_controls); idx++) {
                err = snd_ctl_add(card,
@@ -329,6 +337,9 @@ static int __devinit snd_cmi8330_pnp(int dev, struct snd_cmi8330 *acard,
        struct pnp_dev *pdev;
        int err;
 
+       /* CMI8329 has a device with ID A@@0001, CMI8330 does not */
+       acard->type = (id->devs[3].id[0]) ? CMI8329 : CMI8330;
+
        acard->cap = pnp_request_card_device(card, id->devs[0].id, NULL);
        if (acard->cap == NULL)
                return -EBUSY;
@@ -345,38 +356,45 @@ static int __devinit snd_cmi8330_pnp(int dev, struct snd_cmi8330 *acard,
 
        err = pnp_activate_dev(pdev);
        if (err < 0) {
-               snd_printk(KERN_ERR "CMI8330/C3D PnP configure failure\n");
+               snd_printk(KERN_ERR "AD1848 PnP configure failure\n");
                return -EBUSY;
        }
        wssport[dev] = pnp_port_start(pdev, 0);
        wssdma[dev] = pnp_dma(pdev, 0);
        wssirq[dev] = pnp_irq(pdev, 0);
-       fmport[dev] = pnp_port_start(pdev, 1);
+       if (pnp_port_start(pdev, 1))
+               fmport[dev] = pnp_port_start(pdev, 1);
 
        /* allocate SB16 resources */
        pdev = acard->play;
 
        err = pnp_activate_dev(pdev);
        if (err < 0) {
-               snd_printk(KERN_ERR "CMI8330/C3D (SB16) PnP configure failure\n");
+               snd_printk(KERN_ERR "SB16 PnP configure failure\n");
                return -EBUSY;
        }
        sbport[dev] = pnp_port_start(pdev, 0);
        sbdma8[dev] = pnp_dma(pdev, 0);
        sbdma16[dev] = pnp_dma(pdev, 1);
        sbirq[dev] = pnp_irq(pdev, 0);
+       /* On CMI8239, the OPL3 port might be present in SB16 PnP resources */
+       if (fmport[dev] == SNDRV_AUTO_PORT) {
+               if (pnp_port_start(pdev, 1))
+                       fmport[dev] = pnp_port_start(pdev, 1);
+               else
+                       fmport[dev] = 0x388;    /* Or hardwired */
+       }
 
        /* allocate MPU-401 resources */
        pdev = acard->mpu;
 
        err = pnp_activate_dev(pdev);
-       if (err < 0) {
-               snd_printk(KERN_ERR
-                          "CMI8330/C3D (MPU-401) PnP configure failure\n");
-               return -EBUSY;
+       if (err < 0)
+               snd_printk(KERN_ERR "MPU-401 PnP configure failure: will be disabled\n");
+       else {
+               mpuport[dev] = pnp_port_start(pdev, 0);
+               mpuirq[dev] = pnp_irq(pdev, 0);
        }
-       mpuport[dev] = pnp_port_start(pdev, 0);
-       mpuirq[dev] = pnp_irq(pdev, 0);
        return 0;
 }
 #endif
@@ -430,9 +448,9 @@ static int __devinit snd_cmi8330_pcm(struct snd_card *card, struct snd_cmi8330 *
                snd_cmi8330_capture_open
        };
 
-       if ((err = snd_pcm_new(card, "CMI8330", 0, 1, 1, &pcm)) < 0)
+       if ((err = snd_pcm_new(card, (chip->type == CMI8329) ? "CMI8329" : "CMI8330", 0, 1, 1, &pcm)) < 0)
                return err;
-       strcpy(pcm->name, "CMI8330");
+       strcpy(pcm->name, (chip->type == CMI8329) ? "CMI8329" : "CMI8330");
        pcm->private_data = chip;
        
        /* SB16 */
@@ -527,11 +545,11 @@ static int __devinit snd_cmi8330_probe(struct snd_card *card, int dev)
                             wssdma[dev], -1,
                             WSS_HW_DETECT, 0, &acard->wss);
        if (err < 0) {
-               snd_printk(KERN_ERR PFX "(CMI8330) device busy??\n");
+               snd_printk(KERN_ERR PFX "AD1848 device busy??\n");
                return err;
        }
        if (acard->wss->hardware != WSS_HW_CMI8330) {
-               snd_printk(KERN_ERR PFX "(CMI8330) not found during probe\n");
+               snd_printk(KERN_ERR PFX "AD1848 not found during probe\n");
                return -ENODEV;
        }
 
@@ -541,11 +559,11 @@ static int __devinit snd_cmi8330_probe(struct snd_card *card, int dev)
                                    sbdma8[dev],
                                    sbdma16[dev],
                                    SB_HW_AUTO, &acard->sb)) < 0) {
-               snd_printk(KERN_ERR PFX "(SB16) device busy??\n");
+               snd_printk(KERN_ERR PFX "SB16 device busy??\n");
                return err;
        }
        if (acard->sb->hardware != SB_HW_16) {
-               snd_printk(KERN_ERR PFX "(SB16) not found during probe\n");
+               snd_printk(KERN_ERR PFX "SB16 not found during probe\n");
                return err;
        }
 
@@ -585,8 +603,8 @@ static int __devinit snd_cmi8330_probe(struct snd_card *card, int dev)
                                mpuport[dev]);
        }
 
-       strcpy(card->driver, "CMI8330/C3D");
-       strcpy(card->shortname, "C-Media CMI8330/C3D");
+       strcpy(card->driver, (acard->type == CMI8329) ? "CMI8329" : "CMI8330/C3D");
+       strcpy(card->shortname, (acard->type == CMI8329) ? "C-Media CMI8329" : "C-Media CMI8330/C3D");
        sprintf(card->longname, "%s at 0x%lx, irq %d, dma %d",
                card->shortname,
                acard->wss->port,
index 748f6b7..fb5ee3c 100644 (file)
@@ -135,11 +135,11 @@ config SND_AW2
 
 
 config SND_AZT3328
-       tristate "Aztech AZF3328 / PCI168 (EXPERIMENTAL)"
-       depends on EXPERIMENTAL
+       tristate "Aztech AZF3328 / PCI168"
        select SND_OPL3_LIB
        select SND_MPU401_UART
        select SND_PCM
+       select SND_RAWMIDI
        help
          Say Y here to include support for Aztech AZF3328 (PCI168)
          soundcards.
index 76d76c0..b458d20 100644 (file)
@@ -478,45 +478,6 @@ static int snd_ali_reset_5451(struct snd_ali *codec)
        return 0;
 }
 
-#ifdef CODEC_RESET
-
-static int snd_ali_reset_codec(struct snd_ali *codec)
-{
-       struct pci_dev *pci_dev;
-       unsigned char bVal;
-       unsigned int   dwVal;
-       unsigned short wCount, wReg;
-
-       pci_dev = codec->pci_m1533;
-       
-       pci_read_config_dword(pci_dev, 0x7c, &dwVal);
-       pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
-       udelay(5000);
-       pci_read_config_dword(pci_dev, 0x7c, &dwVal);
-       pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
-       udelay(5000);
-
-       bVal = inb(ALI_REG(codec,ALI_SCTRL));
-       bVal |= 0x02;
-       outb(ALI_REG(codec,ALI_SCTRL),bVal);
-       udelay(5000);
-       bVal = inb(ALI_REG(codec,ALI_SCTRL));
-       bVal &= 0xfd;
-       outb(ALI_REG(codec,ALI_SCTRL),bVal);
-       udelay(15000);
-
-       wCount = 200;
-       while (wCount--) {
-               wReg = snd_ali_codec_read(codec->ac97, AC97_POWERDOWN);
-               if ((wReg & 0x000f) == 0x000f)
-                       return 0;
-               udelay(5000);
-       }
-       return -1;
-}
-
-#endif
-
 /*
  *  ALI 5451 Controller
  */
@@ -561,22 +522,6 @@ static void snd_ali_disable_address_interrupt(struct snd_ali *codec)
        outl(gc, ALI_REG(codec, ALI_GC_CIR));
 }
 
-#if 0 /* not used */
-static void snd_ali_enable_voice_irq(struct snd_ali *codec,
-                                    unsigned int channel)
-{
-       unsigned int mask;
-       struct snd_ali_channel_control *pchregs = &(codec->chregs);
-
-       snd_ali_printk("enable_voice_irq channel=%d\n",channel);
-       
-       mask = 1 << (channel & 0x1f);
-       pchregs->data.ainten  = inl(ALI_REG(codec, pchregs->regs.ainten));
-       pchregs->data.ainten |= mask;
-       outl(pchregs->data.ainten, ALI_REG(codec, pchregs->regs.ainten));
-}
-#endif
-
 static void snd_ali_disable_voice_irq(struct snd_ali *codec,
                                      unsigned int channel)
 {
@@ -677,16 +622,6 @@ static void snd_ali_free_channel_pcm(struct snd_ali *codec, int channel)
        }
 }
 
-#if 0 /* not used */
-static void snd_ali_start_voice(struct snd_ali *codec, unsigned int channel)
-{
-       unsigned int mask = 1 << (channel & 0x1f);
-       
-       snd_ali_printk("start_voice: channel=%d\n",channel);
-       outl(mask, ALI_REG(codec,codec->chregs.regs.start));
-}
-#endif
-
 static void snd_ali_stop_voice(struct snd_ali *codec, unsigned int channel)
 {
        unsigned int mask = 1 << (channel & 0x1f);
index f290bc5..8451a01 100644 (file)
@@ -1,6 +1,6 @@
 /*
  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
- *  Copyright (C) 2002, 2005 - 2008 by Andreas Mohr <andi AT lisas.de>
+ *  Copyright (C) 2002, 2005 - 2009 by Andreas Mohr <andi AT lisas.de>
  *
  *  Framework borrowed from Bart Hartgers's als4000.c.
  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
  *  PCI168 A/AP, sub ID 8000
  *  Please give me feedback in case you try my driver with one of these!!
  *
+ *  Keywords: Windows XP Vista 168nt4-125.zip 168win95-125.zip PCI 168 download
+ *  (XP/Vista do not support this card at all but every Linux distribution
+ *   has very good support out of the box;
+ *   just to make sure that the right people hit this and get to know that,
+ *   despite the high level of Internet ignorance - as usual :-P -
+ *   about very good support for this card - on Linux!)
+ *
  * GPL LICENSE
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
  *  - built-in General DirectX timer having a 20 bits counter
  *    with 1us resolution (see below!)
  *  - I2S serial output port for external DAC
+ *    [FIXME: 3.3V or 5V level? maximum rate is 66.2kHz right?]
  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  *  - supports hardware volume control
  *  - single chip low cost solution (128 pin QFP)
- *  - supports programmable Sub-vendor and Sub-system ID
+ *  - supports programmable Sub-vendor and Sub-system ID [24C02 SEEPROM chip]
  *    required for Microsoft's logo compliance (FIXME: where?)
  *    At least the Trident 4D Wave DX has one bit somewhere
  *    to enable writes to PCI subsystem VID registers, that should be it.
@@ -82,6 +90,7 @@
  *    some custom data starting at 0x80. What kind of config settings
  *    are located in our extended PCI space anyway??
  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
+ *    [TDA1517P chip]
  *
  *  Note that this driver now is actually *better* than the Windows driver,
  *  since it additionally supports the card's 1MHz DirectX timer - just try
  *    to read the Digital Enhanced Game Port. Not sure whether it is fixable.
  *
  * TODO
+ *  - use PCI_VDEVICE
+ *  - verify driver status on x86_64
+ *  - test multi-card driver operation
+ *  - (ab)use 1MHz DirectX timer as kernel clocksource
  *  - test MPU401 MIDI playback etc.
  *  - add more power micro-management (disable various units of the card
- *    as long as they're unused). However this requires more I/O ports which I
- *    haven't figured out yet and which thus might not even exist...
+ *    as long as they're unused, to improve audio quality and save power).
+ *    However this requires more I/O ports which I haven't figured out yet
+ *    and which thus might not even exist...
  *    The standard suspend/resume functionality could probably make use of
  *    some improvement, too...
  *  - figure out what all unknown port bits are responsible for
@@ -185,25 +199,46 @@ MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 #define SUPPORT_GAMEPORT 1
 #endif
 
+/* === Debug settings ===
+  Further diagnostic functionality than the settings below
+  does not need to be provided, since one can easily write a bash script
+  to dump the card's I/O ports (those listed in lspci -v -v):
+  function dump()
+  {
+    local descr=$1; local addr=$2; local count=$3
+
+    echo "${descr}: ${count} @ ${addr}:"
+    dd if=/dev/port skip=$[${addr}] count=${count} bs=1 2>/dev/null| hexdump -C
+  }
+  and then use something like
+  "dump joy200 0x200 8", "dump mpu388 0x388 4", "dump joy 0xb400 8",
+  "dump codec00 0xa800 32", "dump mixer 0xb800 64", "dump synth 0xbc00 8",
+  possibly within a "while true; do ... sleep 1; done" loop.
+  Tweaking ports could be done using
+  VALSTRING="`printf "%02x" $value`"
+  printf "\x""$VALSTRING"|dd of=/dev/port seek=$[${addr}] bs=1 2>/dev/null
+*/
+
 #define DEBUG_MISC     0
 #define DEBUG_CALLS    0
 #define DEBUG_MIXER    0
-#define DEBUG_PLAY_REC 0
+#define DEBUG_CODEC    0
 #define DEBUG_IO       0
 #define DEBUG_TIMER    0
 #define DEBUG_GAME     0
+#define DEBUG_PM       0
 #define MIXER_TESTING  0
 
 #if DEBUG_MISC
-#define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
+#define snd_azf3328_dbgmisc(format, args...) printk(KERN_DEBUG format, ##args)
 #else
 #define snd_azf3328_dbgmisc(format, args...)
 #endif
 
 #if DEBUG_CALLS
 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
-#define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __func__)
-#define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __func__)
+#define snd_azf3328_dbgcallenter() printk(KERN_DEBUG "--> %s\n", __func__)
+#define snd_azf3328_dbgcallleave() printk(KERN_DEBUG "<-- %s\n", __func__)
 #else
 #define snd_azf3328_dbgcalls(format, args...)
 #define snd_azf3328_dbgcallenter()
@@ -216,10 +251,10 @@ MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 #define snd_azf3328_dbgmixer(format, args...)
 #endif
 
-#if DEBUG_PLAY_REC
-#define snd_azf3328_dbgplay(format, args...) printk(KERN_DEBUG format, ##args)
+#if DEBUG_CODEC
+#define snd_azf3328_dbgcodec(format, args...) printk(KERN_DEBUG format, ##args)
 #else
-#define snd_azf3328_dbgplay(format, args...)
+#define snd_azf3328_dbgcodec(format, args...)
 #endif
 
 #if DEBUG_MISC
@@ -234,6 +269,12 @@ MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 #define snd_azf3328_dbggame(format, args...)
 #endif
 
+#if DEBUG_PM
+#define snd_azf3328_dbgpm(format, args...) printk(KERN_DEBUG format, ##args)
+#else
+#define snd_azf3328_dbgpm(format, args...)
+#endif
+
 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;     /* Index 0-MAX */
 module_param_array(index, int, NULL, 0444);
 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
@@ -250,22 +291,23 @@ static int seqtimer_scaling = 128;
 module_param(seqtimer_scaling, int, 0444);
 MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128.");
 
-struct snd_azf3328_audio_stream {
+struct snd_azf3328_codec_data {
+       unsigned long io_base;
        struct snd_pcm_substream *substream;
-       int enabled;
-       int running;
-       unsigned long portbase;
+       bool running;
+       const char *name;
 };
 
-enum snd_azf3328_stream_index {
-  AZF_PLAYBACK = 0,
-  AZF_CAPTURE = 1,
+enum snd_azf3328_codec_type {
+  AZF_CODEC_PLAYBACK = 0,
+  AZF_CODEC_CAPTURE = 1,
+  AZF_CODEC_I2S_OUT = 2,
 };
 
 struct snd_azf3328 {
        /* often-used fields towards beginning, then grouped */
 
-       unsigned long codec_io; /* usually 0xb000, size 128 */
+       unsigned long ctrl_io; /* usually 0xb000, size 128 */
        unsigned long game_io;  /* usually 0xb400, size 8 */
        unsigned long mpu_io;   /* usually 0xb800, size 4 */
        unsigned long opl3_io; /* usually 0xbc00, size 8 */
@@ -275,15 +317,17 @@ struct snd_azf3328 {
 
        struct snd_timer *timer;
 
-       struct snd_pcm *pcm;
-       struct snd_azf3328_audio_stream audio_stream[2];
+       struct snd_pcm *pcm[3];
+
+       /* playback, recording and I2S out codecs */
+       struct snd_azf3328_codec_data codecs[3];
 
        struct snd_card *card;
        struct snd_rawmidi *rmidi;
 
 #ifdef SUPPORT_GAMEPORT
        struct gameport *gameport;
-       int axes[4];
+       u16 axes[4];
 #endif
 
        struct pci_dev *pci;
@@ -293,16 +337,16 @@ struct snd_azf3328 {
         * If we need to add more registers here, then we might try to fold this
         * into some transparent combined shadow register handling with
         * CONFIG_PM register storage below, but that's slightly difficult. */
-       u16 shadow_reg_codec_6AH;
+       u16 shadow_reg_ctrl_6AH;
 
 #ifdef CONFIG_PM
        /* register value containers for power management
-        * Note: not always full I/O range preserved (just like Win driver!) */
-       u16 saved_regs_codec[AZF_IO_SIZE_CODEC_PM / 2];
-       u16 saved_regs_game [AZF_IO_SIZE_GAME_PM / 2];
-       u16 saved_regs_mpu  [AZF_IO_SIZE_MPU_PM / 2];
-       u16 saved_regs_opl3 [AZF_IO_SIZE_OPL3_PM / 2];
-       u16 saved_regs_mixer[AZF_IO_SIZE_MIXER_PM / 2];
+        * Note: not always full I/O range preserved (similar to Win driver!) */
+       u32 saved_regs_ctrl[AZF_ALIGN(AZF_IO_SIZE_CTRL_PM) / 4];
+       u32 saved_regs_game[AZF_ALIGN(AZF_IO_SIZE_GAME_PM) / 4];
+       u32 saved_regs_mpu[AZF_ALIGN(AZF_IO_SIZE_MPU_PM) / 4];
+       u32 saved_regs_opl3[AZF_ALIGN(AZF_IO_SIZE_OPL3_PM) / 4];
+       u32 saved_regs_mixer[AZF_ALIGN(AZF_IO_SIZE_MIXER_PM) / 4];
 #endif
 };
 
@@ -316,7 +360,7 @@ MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 
 
 static int
-snd_azf3328_io_reg_setb(unsigned reg, u8 mask, int do_set)
+snd_azf3328_io_reg_setb(unsigned reg, u8 mask, bool do_set)
 {
        u8 prev = inb(reg), new;
 
@@ -331,39 +375,72 @@ snd_azf3328_io_reg_setb(unsigned reg, u8 mask, int do_set)
 }
 
 static inline void
-snd_azf3328_codec_outb(const struct snd_azf3328 *chip, unsigned reg, u8 value)
+snd_azf3328_codec_outb(const struct snd_azf3328_codec_data *codec,
+                      unsigned reg,
+                      u8 value
+)
 {
-       outb(value, chip->codec_io + reg);
+       outb(value, codec->io_base + reg);
 }
 
 static inline u8
-snd_azf3328_codec_inb(const struct snd_azf3328 *chip, unsigned reg)
+snd_azf3328_codec_inb(const struct snd_azf3328_codec_data *codec, unsigned reg)
 {
-       return inb(chip->codec_io + reg);
+       return inb(codec->io_base + reg);
 }
 
 static inline void
-snd_azf3328_codec_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value)
+snd_azf3328_codec_outw(const struct snd_azf3328_codec_data *codec,
+                      unsigned reg,
+                      u16 value
+)
 {
-       outw(value, chip->codec_io + reg);
+       outw(value, codec->io_base + reg);
 }
 
 static inline u16
-snd_azf3328_codec_inw(const struct snd_azf3328 *chip, unsigned reg)
+snd_azf3328_codec_inw(const struct snd_azf3328_codec_data *codec, unsigned reg)
 {
-       return inw(chip->codec_io + reg);
+       return inw(codec->io_base + reg);
 }
 
 static inline void
-snd_azf3328_codec_outl(const struct snd_azf3328 *chip, unsigned reg, u32 value)
+snd_azf3328_codec_outl(const struct snd_azf3328_codec_data *codec,
+                      unsigned reg,
+                      u32 value
+)
 {
-       outl(value, chip->codec_io + reg);
+       outl(value, codec->io_base + reg);
 }
 
 static inline u32
-snd_azf3328_codec_inl(const struct snd_azf3328 *chip, unsigned reg)
+snd_azf3328_codec_inl(const struct snd_azf3328_codec_data *codec, unsigned reg)
+{
+       return inl(codec->io_base + reg);
+}
+
+static inline void
+snd_azf3328_ctrl_outb(const struct snd_azf3328 *chip, unsigned reg, u8 value)
+{
+       outb(value, chip->ctrl_io + reg);
+}
+
+static inline u8
+snd_azf3328_ctrl_inb(const struct snd_azf3328 *chip, unsigned reg)
+{
+       return inb(chip->ctrl_io + reg);
+}
+
+static inline void
+snd_azf3328_ctrl_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value)
+{
+       outw(value, chip->ctrl_io + reg);
+}
+
+static inline void
+snd_azf3328_ctrl_outl(const struct snd_azf3328 *chip, unsigned reg, u32 value)
 {
-       return inl(chip->codec_io + reg);
+       outl(value, chip->ctrl_io + reg);
 }
 
 static inline void
@@ -404,13 +481,13 @@ snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, unsigned reg)
 
 #define AZF_MUTE_BIT 0x80
 
-static int
+static bool
 snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip,
-                          unsigned reg, int do_mute
+                          unsigned reg, bool do_mute
 )
 {
        unsigned long portbase = chip->mixer_io + reg + 1;
-       int updated;
+       bool updated;
 
        /* the mute bit is on the *second* (i.e. right) register of a
         * left/right channel setting */
@@ -569,7 +646,7 @@ snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol,
 {
        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
        struct azf3328_mixer_reg reg;
-       unsigned int oreg, val;
+       u16 oreg, val;
 
        snd_azf3328_dbgcallenter();
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
@@ -600,7 +677,7 @@ snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol,
 {
        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
        struct azf3328_mixer_reg reg;
-       unsigned int oreg, nreg, val;
+       u16 oreg, nreg, val;
 
        snd_azf3328_dbgcallenter();
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
@@ -709,7 +786,7 @@ snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol,
 {
         struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
        struct azf3328_mixer_reg reg;
-       unsigned int oreg, nreg, val;
+       u16 oreg, nreg, val;
 
        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
@@ -867,14 +944,15 @@ snd_azf3328_hw_free(struct snd_pcm_substream *substream)
 
 static void
 snd_azf3328_codec_setfmt(struct snd_azf3328 *chip,
-                              unsigned reg,
+                              enum snd_azf3328_codec_type codec_type,
                               enum azf_freq_t bitrate,
                               unsigned int format_width,
                               unsigned int channels
 )
 {
-       u16 val = 0xff00;
        unsigned long flags;
+       const struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
+       u16 val = 0xff00;
 
        snd_azf3328_dbgcallenter();
        switch (bitrate) {
@@ -917,7 +995,7 @@ snd_azf3328_codec_setfmt(struct snd_azf3328 *chip,
        spin_lock_irqsave(&chip->reg_lock, flags);
 
        /* set bitrate/format */
-       snd_azf3328_codec_outw(chip, reg, val);
+       snd_azf3328_codec_outw(codec, IDX_IO_CODEC_SOUNDFORMAT, val);
 
        /* changing the bitrate/format settings switches off the
         * audio output with an annoying click in case of 8/16bit format change
@@ -926,11 +1004,11 @@ snd_azf3328_codec_setfmt(struct snd_azf3328 *chip,
         * (FIXME: yes, it works, but what exactly am I doing here?? :)
         * FIXME: does this have some side effects for full-duplex
         * or other dramatic side effects? */
-       if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
-                       snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) |
-                       DMA_PLAY_SOMETHING1 |
-                       DMA_PLAY_SOMETHING2 |
+       if (codec_type == AZF_CODEC_PLAYBACK) /* only do it for playback */
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
+                       snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS) |
+                       DMA_RUN_SOMETHING1 |
+                       DMA_RUN_SOMETHING2 |
                        SOMETHING_ALMOST_ALWAYS_SET |
                        DMA_EPILOGUE_SOMETHING |
                        DMA_SOMETHING_ELSE
@@ -942,112 +1020,134 @@ snd_azf3328_codec_setfmt(struct snd_azf3328 *chip,
 
 static inline void
 snd_azf3328_codec_setfmt_lowpower(struct snd_azf3328 *chip,
-                           unsigned reg
+                           enum snd_azf3328_codec_type codec_type
 )
 {
        /* choose lowest frequency for low power consumption.
         * While this will cause louder noise due to rather coarse frequency,
         * it should never matter since output should always
         * get disabled properly when idle anyway. */
-       snd_azf3328_codec_setfmt(chip, reg, AZF_FREQ_4000, 8, 1);
+       snd_azf3328_codec_setfmt(chip, codec_type, AZF_FREQ_4000, 8, 1);
 }
 
 static void
-snd_azf3328_codec_reg_6AH_update(struct snd_azf3328 *chip,
+snd_azf3328_ctrl_reg_6AH_update(struct snd_azf3328 *chip,
                                        unsigned bitmask,
-                                       int enable
+                                       bool enable
 )
 {
-       if (enable)
-               chip->shadow_reg_codec_6AH &= ~bitmask;
+       bool do_mask = !enable;
+       if (do_mask)
+               chip->shadow_reg_ctrl_6AH |= bitmask;
        else
-               chip->shadow_reg_codec_6AH |= bitmask;
-       snd_azf3328_dbgplay("6AH_update mask 0x%04x enable %d: val 0x%04x\n",
-                       bitmask, enable, chip->shadow_reg_codec_6AH);
-       snd_azf3328_codec_outw(chip, IDX_IO_6AH, chip->shadow_reg_codec_6AH);
+               chip->shadow_reg_ctrl_6AH &= ~bitmask;
+       snd_azf3328_dbgcodec("6AH_update mask 0x%04x do_mask %d: val 0x%04x\n",
+                       bitmask, do_mask, chip->shadow_reg_ctrl_6AH);
+       snd_azf3328_ctrl_outw(chip, IDX_IO_6AH, chip->shadow_reg_ctrl_6AH);
 }
 
 static inline void
-snd_azf3328_codec_enable(struct snd_azf3328 *chip, int enable)
+snd_azf3328_ctrl_enable_codecs(struct snd_azf3328 *chip, bool enable)
 {
-       snd_azf3328_dbgplay("codec_enable %d\n", enable);
+       snd_azf3328_dbgcodec("codec_enable %d\n", enable);
        /* no idea what exactly is being done here, but I strongly assume it's
         * PM related */
-       snd_azf3328_codec_reg_6AH_update(
+       snd_azf3328_ctrl_reg_6AH_update(
                chip, IO_6A_PAUSE_PLAYBACK_BIT8, enable
        );
 }
 
 static void
-snd_azf3328_codec_activity(struct snd_azf3328 *chip,
-                               enum snd_azf3328_stream_index stream_type,
-                               int enable
+snd_azf3328_ctrl_codec_activity(struct snd_azf3328 *chip,
+                               enum snd_azf3328_codec_type codec_type,
+                               bool enable
 )
 {
-       int need_change = (chip->audio_stream[stream_type].running != enable);
+       struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
+       bool need_change = (codec->running != enable);
 
-       snd_azf3328_dbgplay(
-               "codec_activity: type %d, enable %d, need_change %d\n",
-                               stream_type, enable, need_change
+       snd_azf3328_dbgcodec(
+               "codec_activity: %s codec, enable %d, need_change %d\n",
+                               codec->name, enable, need_change
        );
        if (need_change) {
-               enum snd_azf3328_stream_index other =
-                       (stream_type == AZF_PLAYBACK) ?
-                               AZF_CAPTURE : AZF_PLAYBACK;
-               /* small check to prevent shutting down the other party
-                * in case it's active */
-               if ((enable) || !(chip->audio_stream[other].running))
-                       snd_azf3328_codec_enable(chip, enable);
+               static const struct {
+                       enum snd_azf3328_codec_type other1;
+                       enum snd_azf3328_codec_type other2;
+               } peer_codecs[3] =
+                       { { AZF_CODEC_CAPTURE, AZF_CODEC_I2S_OUT },
+                         { AZF_CODEC_PLAYBACK, AZF_CODEC_I2S_OUT },
+                         { AZF_CODEC_PLAYBACK, AZF_CODEC_CAPTURE } };
+               bool call_function;
+
+               if (enable)
+                       /* if enable codec, call enable_codecs func
+                          to enable codec supply... */
+                       call_function = 1;
+               else {
+                       /* ...otherwise call enable_codecs func
+                          (which globally shuts down operation of codecs)
+                          only in case the other codecs are currently
+                          not active either! */
+                       call_function =
+                               ((!chip->codecs[peer_codecs[codec_type].other1]
+                                       .running)
+                            &&  (!chip->codecs[peer_codecs[codec_type].other2]
+                                       .running));
+                }
+                if (call_function)
+                       snd_azf3328_ctrl_enable_codecs(chip, enable);
 
                /* ...and adjust clock, too
                 * (reduce noise and power consumption) */
                if (!enable)
                        snd_azf3328_codec_setfmt_lowpower(
                                chip,
-                               chip->audio_stream[stream_type].portbase
-                                       + IDX_IO_PLAY_SOUNDFORMAT
+                               codec_type
                        );
+               codec->running = enable;
        }
-       chip->audio_stream[stream_type].running = enable;
 }
 
 static void
-snd_azf3328_setdmaa(struct snd_azf3328 *chip,
-                               long unsigned int addr,
-                                unsigned int count,
-                                unsigned int size,
-                               enum snd_azf3328_stream_index stream_type
+snd_azf3328_codec_setdmaa(struct snd_azf3328 *chip,
+                               enum snd_azf3328_codec_type codec_type,
+                               unsigned long addr,
+                               unsigned int count,
+                               unsigned int size
 )
 {
+       const struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
        snd_azf3328_dbgcallenter();
-       if (!chip->audio_stream[stream_type].running) {
-               /* AZF3328 uses a two buffer pointer DMA playback approach */
+       if (!codec->running) {
+               /* AZF3328 uses a two buffer pointer DMA transfer approach */
 
-               unsigned long flags, portbase, addr_area2;
+               unsigned long flags, addr_area2;
 
                /* width 32bit (prevent overflow): */
-               unsigned long count_areas, count_tmp;
+               u32 count_areas, lengths;
 
-               portbase = chip->audio_stream[stream_type].portbase;
                count_areas = size/2;
                addr_area2 = addr+count_areas;
                count_areas--; /* max. index */
-               snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas);
+               snd_azf3328_dbgcodec("setdma: buffers %08lx[%u] / %08lx[%u]\n",
+                               addr, count_areas, addr_area2, count_areas);
 
                /* build combined I/O buffer length word */
-               count_tmp = count_areas;
-               count_areas |= (count_tmp << 16);
+               lengths = (count_areas << 16) | (count_areas);
                spin_lock_irqsave(&chip->reg_lock, flags);
-               outl(addr, portbase + IDX_IO_PLAY_DMA_START_1);
-               outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2);
-               outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1);
+               snd_azf3328_codec_outl(codec, IDX_IO_CODEC_DMA_START_1, addr);
+               snd_azf3328_codec_outl(codec, IDX_IO_CODEC_DMA_START_2,
+                                                               addr_area2);
+               snd_azf3328_codec_outl(codec, IDX_IO_CODEC_DMA_LENGTHS,
+                                                               lengths);
                spin_unlock_irqrestore(&chip->reg_lock, flags);
        }
        snd_azf3328_dbgcallleave();
 }
 
 static int
-snd_azf3328_playback_prepare(struct snd_pcm_substream *substream)
+snd_azf3328_codec_prepare(struct snd_pcm_substream *substream)
 {
 #if 0
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
@@ -1058,157 +1158,161 @@ snd_azf3328_playback_prepare(struct snd_pcm_substream *substream)
 
        snd_azf3328_dbgcallenter();
 #if 0
-       snd_azf3328_codec_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
+       snd_azf3328_codec_setfmt(chip, AZF_CODEC_...,
                runtime->rate,
                snd_pcm_format_width(runtime->format),
                runtime->channels);
-       snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, AZF_PLAYBACK);
+       snd_azf3328_codec_setdmaa(chip, AZF_CODEC_...,
+                                       runtime->dma_addr, count, size);
 #endif
        snd_azf3328_dbgcallleave();
        return 0;
 }
 
 static int
-snd_azf3328_capture_prepare(struct snd_pcm_substream *substream)
-{
-#if 0
-       struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
-       struct snd_pcm_runtime *runtime = substream->runtime;
-        unsigned int size = snd_pcm_lib_buffer_bytes(substream);
-       unsigned int count = snd_pcm_lib_period_bytes(substream);
-#endif
-
-       snd_azf3328_dbgcallenter();
-#if 0
-       snd_azf3328_codec_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
-               runtime->rate,
-               snd_pcm_format_width(runtime->format),
-               runtime->channels);
-       snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, AZF_CAPTURE);
-#endif
-       snd_azf3328_dbgcallleave();
-       return 0;
-}
-
-static int
-snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd)
+snd_azf3328_codec_trigger(enum snd_azf3328_codec_type codec_type,
+                       struct snd_pcm_substream *substream, int cmd)
 {
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
+       const struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
        struct snd_pcm_runtime *runtime = substream->runtime;
        int result = 0;
-       unsigned int status1;
-       int previously_muted;
+       u16 flags1;
+       bool previously_muted = 0;
+       bool is_playback_codec = (AZF_CODEC_PLAYBACK == codec_type);
 
-       snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
+       snd_azf3328_dbgcalls("snd_azf3328_codec_trigger cmd %d\n", cmd);
 
        switch (cmd) {
        case SNDRV_PCM_TRIGGER_START:
-               snd_azf3328_dbgplay("START PLAYBACK\n");
-
-               /* mute WaveOut (avoid clicking during setup) */
-               previously_muted =
-                       snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
+               snd_azf3328_dbgcodec("START %s\n", codec->name);
+
+               if (is_playback_codec) {
+                       /* mute WaveOut (avoid clicking during setup) */
+                       previously_muted =
+                               snd_azf3328_mixer_set_mute(
+                                               chip, IDX_MIXER_WAVEOUT, 1
+                               );
+               }
 
-               snd_azf3328_codec_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT,
+               snd_azf3328_codec_setfmt(chip, codec_type,
                        runtime->rate,
                        snd_pcm_format_width(runtime->format),
                        runtime->channels);
 
                spin_lock(&chip->reg_lock);
                /* first, remember current value: */
-               status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
+               flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
 
-               /* stop playback */
-               status1 &= ~DMA_RESUME;
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
+               /* stop transfer */
+               flags1 &= ~DMA_RESUME;
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
 
                /* FIXME: clear interrupts or what??? */
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff);
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_IRQTYPE, 0xffff);
                spin_unlock(&chip->reg_lock);
 
-               snd_azf3328_setdmaa(chip, runtime->dma_addr,
+               snd_azf3328_codec_setdmaa(chip, codec_type, runtime->dma_addr,
                        snd_pcm_lib_period_bytes(substream),
-                       snd_pcm_lib_buffer_bytes(substream),
-                       AZF_PLAYBACK);
+                       snd_pcm_lib_buffer_bytes(substream)
+               );
 
                spin_lock(&chip->reg_lock);
 #ifdef WIN9X
                /* FIXME: enable playback/recording??? */
-               status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
+               flags1 |= DMA_RUN_SOMETHING1 | DMA_RUN_SOMETHING2;
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
 
-               /* start playback again */
+               /* start transfer again */
                /* FIXME: what is this value (0x0010)??? */
-               status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
+               flags1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
 #else /* NT4 */
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
                        0x0000);
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
-                       DMA_PLAY_SOMETHING1);
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
-                       DMA_PLAY_SOMETHING1 |
-                       DMA_PLAY_SOMETHING2);
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
+                       DMA_RUN_SOMETHING1);
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
+                       DMA_RUN_SOMETHING1 |
+                       DMA_RUN_SOMETHING2);
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
                        DMA_RESUME |
                        SOMETHING_ALMOST_ALWAYS_SET |
                        DMA_EPILOGUE_SOMETHING |
                        DMA_SOMETHING_ELSE);
 #endif
                spin_unlock(&chip->reg_lock);
-               snd_azf3328_codec_activity(chip, AZF_PLAYBACK, 1);
-
-               /* now unmute WaveOut */
-               if (!previously_muted)
-                       snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
+               snd_azf3328_ctrl_codec_activity(chip, codec_type, 1);
+
+               if (is_playback_codec) {
+                       /* now unmute WaveOut */
+                       if (!previously_muted)
+                               snd_azf3328_mixer_set_mute(
+                                               chip, IDX_MIXER_WAVEOUT, 0
+                               );
+               }
 
-               snd_azf3328_dbgplay("STARTED PLAYBACK\n");
+               snd_azf3328_dbgcodec("STARTED %s\n", codec->name);
                break;
        case SNDRV_PCM_TRIGGER_RESUME:
-               snd_azf3328_dbgplay("RESUME PLAYBACK\n");
-               /* resume playback if we were active */
+               snd_azf3328_dbgcodec("RESUME %s\n", codec->name);
+               /* resume codec if we were active */
                spin_lock(&chip->reg_lock);
-               if (chip->audio_stream[AZF_PLAYBACK].running)
-                       snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
-                               snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | DMA_RESUME);
+               if (codec->running)
+                       snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
+                               snd_azf3328_codec_inw(
+                                       codec, IDX_IO_CODEC_DMA_FLAGS
+                               ) | DMA_RESUME
+                       );
                spin_unlock(&chip->reg_lock);
                break;
        case SNDRV_PCM_TRIGGER_STOP:
-               snd_azf3328_dbgplay("STOP PLAYBACK\n");
-
-               /* mute WaveOut (avoid clicking during setup) */
-               previously_muted =
-                       snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
+               snd_azf3328_dbgcodec("STOP %s\n", codec->name);
+
+               if (is_playback_codec) {
+                       /* mute WaveOut (avoid clicking during setup) */
+                       previously_muted =
+                               snd_azf3328_mixer_set_mute(
+                                               chip, IDX_MIXER_WAVEOUT, 1
+                               );
+               }
 
                spin_lock(&chip->reg_lock);
                /* first, remember current value: */
-               status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS);
+               flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
 
-               /* stop playback */
-               status1 &= ~DMA_RESUME;
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
+               /* stop transfer */
+               flags1 &= ~DMA_RESUME;
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
 
                /* hmm, is this really required? we're resetting the same bit
                 * immediately thereafter... */
-               status1 |= DMA_PLAY_SOMETHING1;
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
+               flags1 |= DMA_RUN_SOMETHING1;
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
 
-               status1 &= ~DMA_PLAY_SOMETHING1;
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1);
+               flags1 &= ~DMA_RUN_SOMETHING1;
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
                spin_unlock(&chip->reg_lock);
-               snd_azf3328_codec_activity(chip, AZF_PLAYBACK, 0);
-
-               /* now unmute WaveOut */
-               if (!previously_muted)
-                       snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
+               snd_azf3328_ctrl_codec_activity(chip, codec_type, 0);
+
+               if (is_playback_codec) {
+                       /* now unmute WaveOut */
+                       if (!previously_muted)
+                               snd_azf3328_mixer_set_mute(
+                                               chip, IDX_MIXER_WAVEOUT, 0
+                               );
+               }
 
-               snd_azf3328_dbgplay("STOPPED PLAYBACK\n");
+               snd_azf3328_dbgcodec("STOPPED %s\n", codec->name);
                break;
        case SNDRV_PCM_TRIGGER_SUSPEND:
-               snd_azf3328_dbgplay("SUSPEND PLAYBACK\n");
-               /* make sure playback is stopped */
-               snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS,
-                       snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) & ~DMA_RESUME);
+               snd_azf3328_dbgcodec("SUSPEND %s\n", codec->name);
+               /* make sure codec is stopped */
+               snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
+                       snd_azf3328_codec_inw(
+                               codec, IDX_IO_CODEC_DMA_FLAGS
+                       ) & ~DMA_RESUME
+               );
                break;
         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
                snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
@@ -1217,7 +1321,7 @@ snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd)
                snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
                 break;
         default:
-               printk(KERN_ERR "FIXME: unknown trigger mode!\n");
+               snd_printk(KERN_ERR "FIXME: unknown trigger mode!\n");
                 return -EINVAL;
        }
 
@@ -1225,172 +1329,74 @@ snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd)
        return result;
 }
 
-/* this is just analogous to playback; I'm not quite sure whether recording
- * should actually be triggered like that */
 static int
-snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd)
+snd_azf3328_codec_playback_trigger(struct snd_pcm_substream *substream, int cmd)
 {
-       struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
-       struct snd_pcm_runtime *runtime = substream->runtime;
-       int result = 0;
-       unsigned int status1;
-
-       snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
-
-        switch (cmd) {
-        case SNDRV_PCM_TRIGGER_START:
-
-               snd_azf3328_dbgplay("START CAPTURE\n");
-
-               snd_azf3328_codec_setfmt(chip, IDX_IO_REC_SOUNDFORMAT,
-                       runtime->rate,
-                       snd_pcm_format_width(runtime->format),
-                       runtime->channels);
-
-               spin_lock(&chip->reg_lock);
-               /* first, remember current value: */
-               status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
-
-               /* stop recording */
-               status1 &= ~DMA_RESUME;
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
-
-               /* FIXME: clear interrupts or what??? */
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff);
-               spin_unlock(&chip->reg_lock);
-
-               snd_azf3328_setdmaa(chip, runtime->dma_addr,
-                       snd_pcm_lib_period_bytes(substream),
-                       snd_pcm_lib_buffer_bytes(substream),
-                       AZF_CAPTURE);
-
-               spin_lock(&chip->reg_lock);
-#ifdef WIN9X
-               /* FIXME: enable playback/recording??? */
-               status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
-
-               /* start capture again */
-               /* FIXME: what is this value (0x0010)??? */
-               status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
-#else
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
-                       0x0000);
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
-                       DMA_PLAY_SOMETHING1);
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
-                       DMA_PLAY_SOMETHING1 |
-                       DMA_PLAY_SOMETHING2);
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
-                       DMA_RESUME |
-                       SOMETHING_ALMOST_ALWAYS_SET |
-                       DMA_EPILOGUE_SOMETHING |
-                       DMA_SOMETHING_ELSE);
-#endif
-               spin_unlock(&chip->reg_lock);
-               snd_azf3328_codec_activity(chip, AZF_CAPTURE, 1);
-
-               snd_azf3328_dbgplay("STARTED CAPTURE\n");
-               break;
-       case SNDRV_PCM_TRIGGER_RESUME:
-               snd_azf3328_dbgplay("RESUME CAPTURE\n");
-               /* resume recording if we were active */
-               spin_lock(&chip->reg_lock);
-               if (chip->audio_stream[AZF_CAPTURE].running)
-                       snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
-                               snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) | DMA_RESUME);
-               spin_unlock(&chip->reg_lock);
-               break;
-        case SNDRV_PCM_TRIGGER_STOP:
-               snd_azf3328_dbgplay("STOP CAPTURE\n");
-
-               spin_lock(&chip->reg_lock);
-               /* first, remember current value: */
-               status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS);
-
-               /* stop recording */
-               status1 &= ~DMA_RESUME;
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
-
-               status1 |= DMA_PLAY_SOMETHING1;
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
-
-               status1 &= ~DMA_PLAY_SOMETHING1;
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1);
-               spin_unlock(&chip->reg_lock);
-               snd_azf3328_codec_activity(chip, AZF_CAPTURE, 0);
+       return snd_azf3328_codec_trigger(AZF_CODEC_PLAYBACK, substream, cmd);
+}
 
-               snd_azf3328_dbgplay("STOPPED CAPTURE\n");
-               break;
-       case SNDRV_PCM_TRIGGER_SUSPEND:
-               snd_azf3328_dbgplay("SUSPEND CAPTURE\n");
-               /* make sure recording is stopped */
-               snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS,
-                       snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) & ~DMA_RESUME);
-               break;
-        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
-               snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
-                break;
-        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
-               snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
-                break;
-        default:
-               printk(KERN_ERR "FIXME: unknown trigger mode!\n");
-                return -EINVAL;
-       }
+static int
+snd_azf3328_codec_capture_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+       return snd_azf3328_codec_trigger(AZF_CODEC_CAPTURE, substream, cmd);
+}
 
-       snd_azf3328_dbgcallleave();
-       return result;
+static int
+snd_azf3328_codec_i2s_out_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+       return snd_azf3328_codec_trigger(AZF_CODEC_I2S_OUT, substream, cmd);
 }
 
 static snd_pcm_uframes_t
-snd_azf3328_playback_pointer(struct snd_pcm_substream *substream)
+snd_azf3328_codec_pointer(struct snd_pcm_substream *substream,
+                         enum snd_azf3328_codec_type codec_type
+)
 {
-       struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
+       const struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
+       const struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
        unsigned long bufptr, result;
        snd_pcm_uframes_t frmres;
 
 #ifdef QUERY_HARDWARE
-       bufptr = snd_azf3328_codec_inl(chip, IDX_IO_PLAY_DMA_START_1);
+       bufptr = snd_azf3328_codec_inl(codec, IDX_IO_CODEC_DMA_START_1);
 #else
        bufptr = substream->runtime->dma_addr;
 #endif
-       result = snd_azf3328_codec_inl(chip, IDX_IO_PLAY_DMA_CURRPOS);
+       result = snd_azf3328_codec_inl(codec, IDX_IO_CODEC_DMA_CURRPOS);
 
        /* calculate offset */
        result -= bufptr;
        frmres = bytes_to_frames( substream->runtime, result);
-       snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres);
+       snd_azf3328_dbgcodec("%s @ 0x%8lx, frames %8ld\n",
+                               codec->name, result, frmres);
        return frmres;
 }
 
 static snd_pcm_uframes_t
-snd_azf3328_capture_pointer(struct snd_pcm_substream *substream)
+snd_azf3328_codec_playback_pointer(struct snd_pcm_substream *substream)
 {
-       struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
-       unsigned long bufptr, result;
-       snd_pcm_uframes_t frmres;
+       return snd_azf3328_codec_pointer(substream, AZF_CODEC_PLAYBACK);
+}
 
-#ifdef QUERY_HARDWARE
-       bufptr = snd_azf3328_codec_inl(chip, IDX_IO_REC_DMA_START_1);
-#else
-       bufptr = substream->runtime->dma_addr;
-#endif
-       result = snd_azf3328_codec_inl(chip, IDX_IO_REC_DMA_CURRPOS);
+static snd_pcm_uframes_t
+snd_azf3328_codec_capture_pointer(struct snd_pcm_substream *substream)
+{
+       return snd_azf3328_codec_pointer(substream, AZF_CODEC_CAPTURE);
+}
 
-       /* calculate offset */
-       result -= bufptr;
-       frmres = bytes_to_frames( substream->runtime, result);
-       snd_azf3328_dbgplay("REC  @ 0x%8lx, frames %8ld\n", result, frmres);
-       return frmres;
+static snd_pcm_uframes_t
+snd_azf3328_codec_i2s_out_pointer(struct snd_pcm_substream *substream)
+{
+       return snd_azf3328_codec_pointer(substream, AZF_CODEC_I2S_OUT);
 }
 
 /******************************************************************/
 
 #ifdef SUPPORT_GAMEPORT
 static inline void
-snd_azf3328_gameport_irq_enable(struct snd_azf3328 *chip, int enable)
+snd_azf3328_gameport_irq_enable(struct snd_azf3328 *chip,
+                               bool enable
+)
 {
        snd_azf3328_io_reg_setb(
                chip->game_io+IDX_GAME_HWCONFIG,
@@ -1400,7 +1406,9 @@ snd_azf3328_gameport_irq_enable(struct snd_azf3328 *chip, int enable)
 }
 
 static inline void
-snd_azf3328_gameport_legacy_address_enable(struct snd_azf3328 *chip, int enable)
+snd_azf3328_gameport_legacy_address_enable(struct snd_azf3328 *chip,
+                                          bool enable
+)
 {
        snd_azf3328_io_reg_setb(
                chip->game_io+IDX_GAME_HWCONFIG,
@@ -1409,10 +1417,27 @@ snd_azf3328_gameport_legacy_address_enable(struct snd_azf3328 *chip, int enable)
        );
 }
 
+static void
+snd_azf3328_gameport_set_counter_frequency(struct snd_azf3328 *chip,
+                                          unsigned int freq_cfg
+)
+{
+       snd_azf3328_io_reg_setb(
+               chip->game_io+IDX_GAME_HWCONFIG,
+               0x02,
+               (freq_cfg & 1) != 0
+       );
+       snd_azf3328_io_reg_setb(
+               chip->game_io+IDX_GAME_HWCONFIG,
+               0x04,
+               (freq_cfg & 2) != 0
+       );
+}
+
 static inline void
-snd_azf3328_gameport_axis_circuit_enable(struct snd_azf3328 *chip, int enable)
+snd_azf3328_gameport_axis_circuit_enable(struct snd_azf3328 *chip, bool enable)
 {
-       snd_azf3328_codec_reg_6AH_update(
+       snd_azf3328_ctrl_reg_6AH_update(
                chip, IO_6A_SOMETHING2_GAMEPORT, enable
        );
 }
@@ -1447,6 +1472,8 @@ snd_azf3328_gameport_open(struct gameport *gameport, int mode)
                break;
        }
 
+       snd_azf3328_gameport_set_counter_frequency(chip,
+                               GAME_HWCFG_ADC_COUNTER_FREQ_STD);
        snd_azf3328_gameport_axis_circuit_enable(chip, (res == 0));
 
        return res;
@@ -1458,6 +1485,8 @@ snd_azf3328_gameport_close(struct gameport *gameport)
        struct snd_azf3328 *chip = gameport_get_port_data(gameport);
 
        snd_azf3328_dbggame("gameport_close\n");
+       snd_azf3328_gameport_set_counter_frequency(chip,
+                               GAME_HWCFG_ADC_COUNTER_FREQ_1_200);
        snd_azf3328_gameport_axis_circuit_enable(chip, 0);
 }
 
@@ -1491,7 +1520,7 @@ snd_azf3328_gameport_cooked_read(struct gameport *gameport,
 
        val = snd_azf3328_game_inb(chip, IDX_GAME_AXES_CONFIG);
        if (val & GAME_AXES_SAMPLING_READY) {
-               for (i = 0; i < 4; ++i) {
+               for (i = 0; i < ARRAY_SIZE(chip->axes); ++i) {
                        /* configure the axis to read */
                        val = (i << 4) | 0x0f;
                        snd_azf3328_game_outb(chip, IDX_GAME_AXES_CONFIG, val);
@@ -1514,7 +1543,7 @@ snd_azf3328_gameport_cooked_read(struct gameport *gameport,
        snd_azf3328_game_outw(chip, IDX_GAME_AXIS_VALUE, 0xffff);
        spin_unlock_irqrestore(&chip->reg_lock, flags);
 
-       for (i = 0; i < 4; i++) {
+       for (i = 0; i < ARRAY_SIZE(chip->axes); i++) {
                axes[i] = chip->axes[i];
                if (axes[i] == 0xffff)
                        axes[i] = -1;
@@ -1552,6 +1581,8 @@ snd_azf3328_gameport(struct snd_azf3328 *chip, int dev)
        /* DISABLE legacy address: we don't need it! */
        snd_azf3328_gameport_legacy_address_enable(chip, 0);
 
+       snd_azf3328_gameport_set_counter_frequency(chip,
+                               GAME_HWCFG_ADC_COUNTER_FREQ_1_200);
        snd_azf3328_gameport_axis_circuit_enable(chip, 0);
 
        gameport_register_port(chip->gameport);
@@ -1585,40 +1616,77 @@ snd_azf3328_gameport_interrupt(struct snd_azf3328 *chip)
 static inline void
 snd_azf3328_irq_log_unknown_type(u8 which)
 {
-       snd_azf3328_dbgplay(
+       snd_azf3328_dbgcodec(
        "azt3328: unknown IRQ type (%x) occurred, please report!\n",
                which
        );
 }
 
+static inline void
+snd_azf3328_codec_interrupt(struct snd_azf3328 *chip, u8 status)
+{
+       u8 which;
+       enum snd_azf3328_codec_type codec_type;
+       const struct snd_azf3328_codec_data *codec;
+
+       for (codec_type = AZF_CODEC_PLAYBACK;
+                codec_type <= AZF_CODEC_I2S_OUT;
+                        ++codec_type) {
+
+               /* skip codec if there's no interrupt for it */
+               if (!(status & (1 << codec_type)))
+                       continue;
+
+               codec = &chip->codecs[codec_type];
+
+               spin_lock(&chip->reg_lock);
+               which = snd_azf3328_codec_inb(codec, IDX_IO_CODEC_IRQTYPE);
+               /* ack all IRQ types immediately */
+               snd_azf3328_codec_outb(codec, IDX_IO_CODEC_IRQTYPE, which);
+               spin_unlock(&chip->reg_lock);
+
+               if ((chip->pcm[codec_type]) && (codec->substream)) {
+                       snd_pcm_period_elapsed(codec->substream);
+                       snd_azf3328_dbgcodec("%s period done (#%x), @ %x\n",
+                               codec->name,
+                               which,
+                               snd_azf3328_codec_inl(
+                                       codec, IDX_IO_CODEC_DMA_CURRPOS
+                               )
+                       );
+               } else
+                       printk(KERN_WARNING "azt3328: irq handler problem!\n");
+               if (which & IRQ_SOMETHING)
+                       snd_azf3328_irq_log_unknown_type(which);
+       }
+}
+
 static irqreturn_t
 snd_azf3328_interrupt(int irq, void *dev_id)
 {
        struct snd_azf3328 *chip = dev_id;
-       u8 status, which;
-#if DEBUG_PLAY_REC
+       u8 status;
+#if DEBUG_CODEC
        static unsigned long irq_count;
 #endif
 
-       status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS);
+       status = snd_azf3328_ctrl_inb(chip, IDX_IO_IRQSTATUS);
 
         /* fast path out, to ease interrupt sharing */
        if (!(status &
-               (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_GAMEPORT|IRQ_MPU401|IRQ_TIMER)
+               (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_I2S_OUT
+               |IRQ_GAMEPORT|IRQ_MPU401|IRQ_TIMER)
        ))
                return IRQ_NONE; /* must be interrupt for another device */
 
-       snd_azf3328_dbgplay(
-               "irq_count %ld! IDX_IO_PLAY_FLAGS %04x, "
-               "IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n",
+       snd_azf3328_dbgcodec(
+               "irq_count %ld! IDX_IO_IRQSTATUS %04x\n",
                        irq_count++ /* debug-only */,
-                       snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS),
-                       snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE),
                        status
        );
 
        if (status & IRQ_TIMER) {
-               /* snd_azf3328_dbgplay("timer %ld\n",
+               /* snd_azf3328_dbgcodec("timer %ld\n",
                        snd_azf3328_codec_inl(chip, IDX_IO_TIMER_VALUE)
                                & TIMER_VALUE_MASK
                ); */
@@ -1626,71 +1694,36 @@ snd_azf3328_interrupt(int irq, void *dev_id)
                        snd_timer_interrupt(chip->timer, chip->timer->sticks);
                /* ACK timer */
                 spin_lock(&chip->reg_lock);
-               snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
+               snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
                spin_unlock(&chip->reg_lock);
-               snd_azf3328_dbgplay("azt3328: timer IRQ\n");
+               snd_azf3328_dbgcodec("azt3328: timer IRQ\n");
        }
-       if (status & IRQ_PLAYBACK) {
-               spin_lock(&chip->reg_lock);
-               which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE);
-               /* ack all IRQ types immediately */
-               snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which);
-                       spin_unlock(&chip->reg_lock);
 
-               if (chip->pcm && chip->audio_stream[AZF_PLAYBACK].substream) {
-                       snd_pcm_period_elapsed(
-                               chip->audio_stream[AZF_PLAYBACK].substream
-                       );
-                       snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n",
-                               which,
-                               snd_azf3328_codec_inl(
-                                       chip, IDX_IO_PLAY_DMA_CURRPOS
-                               )
-                       );
-               } else
-                       printk(KERN_WARNING "azt3328: irq handler problem!\n");
-               if (which & IRQ_PLAY_SOMETHING)
-                       snd_azf3328_irq_log_unknown_type(which);
-       }
-       if (status & IRQ_RECORDING) {
-                spin_lock(&chip->reg_lock);
-               which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE);
-               /* ack all IRQ types immediately */
-               snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which);
-               spin_unlock(&chip->reg_lock);
+       if (status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_I2S_OUT))
+               snd_azf3328_codec_interrupt(chip, status);
 
-               if (chip->pcm && chip->audio_stream[AZF_CAPTURE].substream) {
-                       snd_pcm_period_elapsed(
-                               chip->audio_stream[AZF_CAPTURE].substream
-                       );
-                       snd_azf3328_dbgplay("REC  period done (#%x), @ %x\n",
-                               which,
-                               snd_azf3328_codec_inl(
-                                       chip, IDX_IO_REC_DMA_CURRPOS
-                               )
-                       );
-               } else
-                       printk(KERN_WARNING "azt3328: irq handler problem!\n");
-               if (which & IRQ_REC_SOMETHING)
-                       snd_azf3328_irq_log_unknown_type(which);
-       }
        if (status & IRQ_GAMEPORT)
                snd_azf3328_gameport_interrupt(chip);
+
        /* MPU401 has less critical IRQ requirements
         * than timer and playback/recording, right? */
        if (status & IRQ_MPU401) {
                snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
 
                /* hmm, do we have to ack the IRQ here somehow?
-                * If so, then I don't know how... */
-               snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n");
+                * If so, then I don't know how yet... */
+               snd_azf3328_dbgcodec("azt3328: MPU401 IRQ\n");
        }
        return IRQ_HANDLED;
 }
 
 /*****************************************************************/
 
-static const struct snd_pcm_hardware snd_azf3328_playback =
+/* as long as we think we have identical snd_pcm_hardware parameters
+   for playback, capture and i2s out, we can use the same physical struct
+   since the struct is simply being copied into a member.
+*/
+static const struct snd_pcm_hardware snd_azf3328_hardware =
 {
        /* FIXME!! Correct? */
        .info =                 SNDRV_PCM_INFO_MMAP |
@@ -1718,31 +1751,6 @@ static const struct snd_pcm_hardware snd_azf3328_playback =
        .fifo_size =            0,
 };
 
-static const struct snd_pcm_hardware snd_azf3328_capture =
-{
-       /* FIXME */
-       .info =                 SNDRV_PCM_INFO_MMAP |
-                               SNDRV_PCM_INFO_INTERLEAVED |
-                               SNDRV_PCM_INFO_MMAP_VALID,
-       .formats =              SNDRV_PCM_FMTBIT_S8 |
-                               SNDRV_PCM_FMTBIT_U8 |
-                               SNDRV_PCM_FMTBIT_S16_LE |
-                               SNDRV_PCM_FMTBIT_U16_LE,
-       .rates =                SNDRV_PCM_RATE_5512 |
-                               SNDRV_PCM_RATE_8000_48000 |
-                               SNDRV_PCM_RATE_KNOT,
-       .rate_min =             AZF_FREQ_4000,
-       .rate_max =             AZF_FREQ_66200,
-       .channels_min =         1,
-       .channels_max =         2,
-       .buffer_bytes_max =     65536,
-       .period_bytes_min =     64,
-       .period_bytes_max =     65536,
-       .periods_min =          1,
-       .periods_max =          1024,
-       .fifo_size =            0,
-};
-
 
 static unsigned int snd_azf3328_fixed_rates[] = {
        AZF_FREQ_4000,
@@ -1770,55 +1778,72 @@ static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = {
 /*****************************************************************/
 
 static int
-snd_azf3328_playback_open(struct snd_pcm_substream *substream)
+snd_azf3328_pcm_open(struct snd_pcm_substream *substream,
+                    enum snd_azf3328_codec_type codec_type
+)
 {
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
        struct snd_pcm_runtime *runtime = substream->runtime;
 
        snd_azf3328_dbgcallenter();
-       chip->audio_stream[AZF_PLAYBACK].substream = substream;
-       runtime->hw = snd_azf3328_playback;
+       chip->codecs[codec_type].substream = substream;
+
+       /* same parameters for all our codecs - at least we think so... */
+       runtime->hw = snd_azf3328_hardware;
+
        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
                                   &snd_azf3328_hw_constraints_rates);
        snd_azf3328_dbgcallleave();
        return 0;
 }
 
+static int
+snd_azf3328_playback_open(struct snd_pcm_substream *substream)
+{
+       return snd_azf3328_pcm_open(substream, AZF_CODEC_PLAYBACK);
+}
+
 static int
 snd_azf3328_capture_open(struct snd_pcm_substream *substream)
 {
-       struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
-       struct snd_pcm_runtime *runtime = substream->runtime;
+       return snd_azf3328_pcm_open(substream, AZF_CODEC_CAPTURE);
+}
 
-       snd_azf3328_dbgcallenter();
-       chip->audio_stream[AZF_CAPTURE].substream = substream;
-       runtime->hw = snd_azf3328_capture;
-       snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
-                                  &snd_azf3328_hw_constraints_rates);
-       snd_azf3328_dbgcallleave();
-       return 0;
+static int
+snd_azf3328_i2s_out_open(struct snd_pcm_substream *substream)
+{
+       return snd_azf3328_pcm_open(substream, AZF_CODEC_I2S_OUT);
 }
 
 static int
-snd_azf3328_playback_close(struct snd_pcm_substream *substream)
+snd_azf3328_pcm_close(struct snd_pcm_substream *substream,
+                     enum snd_azf3328_codec_type codec_type
+)
 {
        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
 
        snd_azf3328_dbgcallenter();
-       chip->audio_stream[AZF_PLAYBACK].substream = NULL;
+       chip->codecs[codec_type].substream = NULL;
        snd_azf3328_dbgcallleave();
        return 0;
 }
 
+static int
+snd_azf3328_playback_close(struct snd_pcm_substream *substream)
+{
+       return snd_azf3328_pcm_close(substream, AZF_CODEC_PLAYBACK);
+}
+
 static int
 snd_azf3328_capture_close(struct snd_pcm_substream *substream)
 {
-       struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
+       return snd_azf3328_pcm_close(substream, AZF_CODEC_CAPTURE);
+}
 
-       snd_azf3328_dbgcallenter();
-       chip->audio_stream[AZF_CAPTURE].substream = NULL;
-       snd_azf3328_dbgcallleave();
-       return 0;
+static int
+snd_azf3328_i2s_out_close(struct snd_pcm_substream *substream)
+{
+       return snd_azf3328_pcm_close(substream, AZF_CODEC_I2S_OUT);
 }
 
 /******************************************************************/
@@ -1829,9 +1854,9 @@ static struct snd_pcm_ops snd_azf3328_playback_ops = {
        .ioctl =        snd_pcm_lib_ioctl,
        .hw_params =    snd_azf3328_hw_params,
        .hw_free =      snd_azf3328_hw_free,
-       .prepare =      snd_azf3328_playback_prepare,
-       .trigger =      snd_azf3328_playback_trigger,
-       .pointer =      snd_azf3328_playback_pointer
+       .prepare =      snd_azf3328_codec_prepare,
+       .trigger =      snd_azf3328_codec_playback_trigger,
+       .pointer =      snd_azf3328_codec_playback_pointer
 };
 
 static struct snd_pcm_ops snd_azf3328_capture_ops = {
@@ -1840,30 +1865,67 @@ static struct snd_pcm_ops snd_azf3328_capture_ops = {
        .ioctl =        snd_pcm_lib_ioctl,
        .hw_params =    snd_azf3328_hw_params,
        .hw_free =      snd_azf3328_hw_free,
-       .prepare =      snd_azf3328_capture_prepare,
-       .trigger =      snd_azf3328_capture_trigger,
-       .pointer =      snd_azf3328_capture_pointer
+       .prepare =      snd_azf3328_codec_prepare,
+       .trigger =      snd_azf3328_codec_capture_trigger,
+       .pointer =      snd_azf3328_codec_capture_pointer
+};
+
+static struct snd_pcm_ops snd_azf3328_i2s_out_ops = {
+       .open =         snd_azf3328_i2s_out_open,
+       .close =        snd_azf3328_i2s_out_close,
+       .ioctl =        snd_pcm_lib_ioctl,
+       .hw_params =    snd_azf3328_hw_params,
+       .hw_free =      snd_azf3328_hw_free,
+       .prepare =      snd_azf3328_codec_prepare,
+       .trigger =      snd_azf3328_codec_i2s_out_trigger,
+       .pointer =      snd_azf3328_codec_i2s_out_pointer
 };
 
 static int __devinit
-snd_azf3328_pcm(struct snd_azf3328 *chip, int device)
+snd_azf3328_pcm(struct snd_azf3328 *chip)
 {
+enum { AZF_PCMDEV_STD, AZF_PCMDEV_I2S_OUT, NUM_AZF_PCMDEVS }; /* pcm devices */
+
        struct snd_pcm *pcm;
        int err;
 
        snd_azf3328_dbgcallenter();
-       if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
+
+       err = snd_pcm_new(chip->card, "AZF3328 DSP", AZF_PCMDEV_STD,
+                                                               1, 1, &pcm);
+       if (err < 0)
                return err;
-       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
-       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
+       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
+                                               &snd_azf3328_playback_ops);
+       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
+                                               &snd_azf3328_capture_ops);
 
        pcm->private_data = chip;
        pcm->info_flags = 0;
        strcpy(pcm->name, chip->card->shortname);
-       chip->pcm = pcm;
+       /* same pcm object for playback/capture (see snd_pcm_new() above) */
+       chip->pcm[AZF_CODEC_PLAYBACK] = pcm;
+       chip->pcm[AZF_CODEC_CAPTURE] = pcm;
 
        snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
-                                             snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
+                                               snd_dma_pci_data(chip->pci),
+                                                       64*1024, 64*1024);
+
+       err = snd_pcm_new(chip->card, "AZF3328 I2S OUT", AZF_PCMDEV_I2S_OUT,
+                                                               1, 0, &pcm);
+       if (err < 0)
+               return err;
+       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
+                                               &snd_azf3328_i2s_out_ops);
+
+       pcm->private_data = chip;
+       pcm->info_flags = 0;
+       strcpy(pcm->name, chip->card->shortname);
+       chip->pcm[AZF_CODEC_I2S_OUT] = pcm;
+
+       snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+                                               snd_dma_pci_data(chip->pci),
+                                                       64*1024, 64*1024);
 
        snd_azf3328_dbgcallleave();
        return 0;
@@ -1902,7 +1964,7 @@ snd_azf3328_timer_start(struct snd_timer *timer)
        snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay);
        delay |= TIMER_COUNTDOWN_ENABLE | TIMER_IRQ_ENABLE;
        spin_lock_irqsave(&chip->reg_lock, flags);
-       snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay);
+       snd_azf3328_ctrl_outl(chip, IDX_IO_TIMER_VALUE, delay);
        spin_unlock_irqrestore(&chip->reg_lock, flags);
        snd_azf3328_dbgcallleave();
        return 0;
@@ -1919,7 +1981,7 @@ snd_azf3328_timer_stop(struct snd_timer *timer)
        spin_lock_irqsave(&chip->reg_lock, flags);
        /* disable timer countdown and interrupt */
        /* FIXME: should we write TIMER_IRQ_ACK here? */
-       snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
+       snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0);
        spin_unlock_irqrestore(&chip->reg_lock, flags);
        snd_azf3328_dbgcallleave();
        return 0;
@@ -2035,7 +2097,7 @@ snd_azf3328_test_bit(unsigned unsigned reg, int bit)
 
        outb(val, reg);
 
-       printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n",
+       printk(KERN_DEBUG "reg %04x bit %d: %02x %02x %02x\n",
                                reg, bit, val, valoff, valon
        );
 }
@@ -2048,9 +2110,9 @@ snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip)
        u16 tmp;
 
        snd_azf3328_dbgmisc(
-               "codec_io 0x%lx, game_io 0x%lx, mpu_io 0x%lx, "
+               "ctrl_io 0x%lx, game_io 0x%lx, mpu_io 0x%lx, "
                "opl3_io 0x%lx, mixer_io 0x%lx, irq %d\n",
-               chip->codec_io, chip->game_io, chip->mpu_io,
+               chip->ctrl_io, chip->game_io, chip->mpu_io,
                chip->opl3_io, chip->mixer_io, chip->irq
        );
 
@@ -2083,9 +2145,9 @@ snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip)
                                inb(0x38c + tmp)
                );
 
-       for (tmp = 0; tmp < AZF_IO_SIZE_CODEC; tmp += 2)
-               snd_azf3328_dbgmisc("codec 0x%02x: 0x%04x\n",
-                       tmp, snd_azf3328_codec_inw(chip, tmp)
+       for (tmp = 0; tmp < AZF_IO_SIZE_CTRL; tmp += 2)
+               snd_azf3328_dbgmisc("ctrl 0x%02x: 0x%04x\n",
+                       tmp, snd_azf3328_ctrl_inw(chip, tmp)
                );
 
        for (tmp = 0; tmp < AZF_IO_SIZE_MIXER; tmp += 2)
@@ -2106,7 +2168,8 @@ snd_azf3328_create(struct snd_card *card,
        static struct snd_device_ops ops = {
                .dev_free =     snd_azf3328_dev_free,
        };
-       u16 tmp;
+       u8 dma_init;
+       enum snd_azf3328_codec_type codec_type;
 
        *rchip = NULL;
 
@@ -2138,14 +2201,21 @@ snd_azf3328_create(struct snd_card *card,
        if (err < 0)
                goto out_err;
 
-       chip->codec_io = pci_resource_start(pci, 0);
+       chip->ctrl_io  = pci_resource_start(pci, 0);
        chip->game_io  = pci_resource_start(pci, 1);
        chip->mpu_io   = pci_resource_start(pci, 2);
-       chip->opl3_io = pci_resource_start(pci, 3);
+       chip->opl3_io  = pci_resource_start(pci, 3);
        chip->mixer_io = pci_resource_start(pci, 4);
 
-       chip->audio_stream[AZF_PLAYBACK].portbase = chip->codec_io + 0x00;
-       chip->audio_stream[AZF_CAPTURE].portbase   = chip->codec_io + 0x20;
+       chip->codecs[AZF_CODEC_PLAYBACK].io_base =
+                               chip->ctrl_io + AZF_IO_OFFS_CODEC_PLAYBACK;
+       chip->codecs[AZF_CODEC_PLAYBACK].name = "PLAYBACK";
+       chip->codecs[AZF_CODEC_CAPTURE].io_base =
+                               chip->ctrl_io + AZF_IO_OFFS_CODEC_CAPTURE;
+       chip->codecs[AZF_CODEC_CAPTURE].name = "CAPTURE";
+       chip->codecs[AZF_CODEC_I2S_OUT].io_base =
+                               chip->ctrl_io + AZF_IO_OFFS_CODEC_I2S_OUT;
+       chip->codecs[AZF_CODEC_I2S_OUT].name = "I2S_OUT";
 
        if (request_irq(pci->irq, snd_azf3328_interrupt,
                        IRQF_SHARED, card->shortname, chip)) {
@@ -2168,20 +2238,25 @@ snd_azf3328_create(struct snd_card *card,
        if (err < 0)
                goto out_err;
 
-       /* shutdown codecs to save power */
-               /* have snd_azf3328_codec_activity() act properly */
-       chip->audio_stream[AZF_PLAYBACK].running = 1;
-       snd_azf3328_codec_activity(chip, AZF_PLAYBACK, 0);
+       /* standard codec init stuff */
+               /* default DMA init value */
+       dma_init = DMA_RUN_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
 
-       /* standard chip init stuff */
-               /* default IRQ init value */
-       tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
+       for (codec_type = AZF_CODEC_PLAYBACK;
+               codec_type <= AZF_CODEC_I2S_OUT; ++codec_type) {
+               struct snd_azf3328_codec_data *codec =
+                        &chip->codecs[codec_type];
 
-       spin_lock_irq(&chip->reg_lock);
-       snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp);
-       snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp);
-       snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp);
-       spin_unlock_irq(&chip->reg_lock);
+               /* shutdown codecs to save power */
+                       /* have ...ctrl_codec_activity() act properly */
+               codec->running = 1;
+               snd_azf3328_ctrl_codec_activity(chip, codec_type, 0);
+
+               spin_lock_irq(&chip->reg_lock);
+               snd_azf3328_codec_outb(codec, IDX_IO_CODEC_DMA_FLAGS,
+                                                dma_init);
+               spin_unlock_irq(&chip->reg_lock);
+       }
 
        snd_card_set_dev(card, &pci->dev);
 
@@ -2229,8 +2304,11 @@ snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
 
        card->private_data = chip;
 
+       /* chose to use MPU401_HW_AZT2320 ID instead of MPU401_HW_MPU401,
+          since our hardware ought to be similar, thus use same ID. */
        err = snd_mpu401_uart_new(
-               card, 0, MPU401_HW_MPU401, chip->mpu_io, MPU401_INFO_INTEGRATED,
+               card, 0,
+               MPU401_HW_AZT2320, chip->mpu_io, MPU401_INFO_INTEGRATED,
                pci->irq, 0, &chip->rmidi
        );
        if (err < 0) {
@@ -2244,7 +2322,7 @@ snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
        if (err < 0)
                goto out_err;
 
-       err = snd_azf3328_pcm(chip, 0);
+       err = snd_azf3328_pcm(chip);
        if (err < 0)
                goto out_err;
 
@@ -2266,14 +2344,14 @@ snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
        opl3->private_data = chip;
 
        sprintf(card->longname, "%s at 0x%lx, irq %i",
-               card->shortname, chip->codec_io, chip->irq);
+               card->shortname, chip->ctrl_io, chip->irq);
 
        err = snd_card_register(card);
        if (err < 0)
                goto out_err;
 
 #ifdef MODULE
-       printk(
+       printk(KERN_INFO
 "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168.\n"
 "azt3328: Hardware was completely undocumented, unfortunately.\n"
 "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n"
@@ -2308,36 +2386,52 @@ snd_azf3328_remove(struct pci_dev *pci)
 }
 
 #ifdef CONFIG_PM
+static inline void
+snd_azf3328_suspend_regs(unsigned long io_addr, unsigned count, u32 *saved_regs)
+{
+       unsigned reg;
+
+       for (reg = 0; reg < count; ++reg) {
+               *saved_regs = inl(io_addr);
+               snd_azf3328_dbgpm("suspend: io 0x%04lx: 0x%08x\n",
+                       io_addr, *saved_regs);
+               ++saved_regs;
+               io_addr += sizeof(*saved_regs);
+       }
+}
+
 static int
 snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
 {
        struct snd_card *card = pci_get_drvdata(pci);
        struct snd_azf3328 *chip = card->private_data;
-       unsigned reg;
+       u16 *saved_regs_ctrl_u16;
 
        snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 
-       snd_pcm_suspend_all(chip->pcm);
+       snd_pcm_suspend_all(chip->pcm[AZF_CODEC_PLAYBACK]);
+       snd_pcm_suspend_all(chip->pcm[AZF_CODEC_I2S_OUT]);
 
-       for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; ++reg)
-               chip->saved_regs_mixer[reg] = inw(chip->mixer_io + reg * 2);
+       snd_azf3328_suspend_regs(chip->mixer_io,
+               ARRAY_SIZE(chip->saved_regs_mixer), chip->saved_regs_mixer);
 
        /* make sure to disable master volume etc. to prevent looping sound */
        snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1);
        snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 
-       for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; ++reg)
-               chip->saved_regs_codec[reg] = inw(chip->codec_io + reg * 2);
+       snd_azf3328_suspend_regs(chip->ctrl_io,
+               ARRAY_SIZE(chip->saved_regs_ctrl), chip->saved_regs_ctrl);
 
        /* manually store the one currently relevant write-only reg, too */
-       chip->saved_regs_codec[IDX_IO_6AH / 2] = chip->shadow_reg_codec_6AH;
+       saved_regs_ctrl_u16 = (u16 *)chip->saved_regs_ctrl;
+       saved_regs_ctrl_u16[IDX_IO_6AH / 2] = chip->shadow_reg_ctrl_6AH;
 
-       for (reg = 0; reg < AZF_IO_SIZE_GAME_PM / 2; ++reg)
-               chip->saved_regs_game[reg] = inw(chip->game_io + reg * 2);
-       for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; ++reg)
-               chip->saved_regs_mpu[reg] = inw(chip->mpu_io + reg * 2);
-       for (reg = 0; reg < AZF_IO_SIZE_OPL3_PM / 2; ++reg)
-               chip->saved_regs_opl3[reg] = inw(chip->opl3_io + reg * 2);
+       snd_azf3328_suspend_regs(chip->game_io,
+               ARRAY_SIZE(chip->saved_regs_game), chip->saved_regs_game);
+       snd_azf3328_suspend_regs(chip->mpu_io,
+               ARRAY_SIZE(chip->saved_regs_mpu), chip->saved_regs_mpu);
+       snd_azf3328_suspend_regs(chip->opl3_io,
+               ARRAY_SIZE(chip->saved_regs_opl3), chip->saved_regs_opl3);
 
        pci_disable_device(pci);
        pci_save_state(pci);
@@ -2345,12 +2439,28 @@ snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state)
        return 0;
 }
 
+static inline void
+snd_azf3328_resume_regs(const u32 *saved_regs,
+                       unsigned long io_addr,
+                       unsigned count
+)
+{
+       unsigned reg;
+
+       for (reg = 0; reg < count; ++reg) {
+               outl(*saved_regs, io_addr);
+               snd_azf3328_dbgpm("resume: io 0x%04lx: 0x%08x --> 0x%08x\n",
+                       io_addr, *saved_regs, inl(io_addr));
+               ++saved_regs;
+               io_addr += sizeof(*saved_regs);
+       }
+}
+
 static int
 snd_azf3328_resume(struct pci_dev *pci)
 {
        struct snd_card *card = pci_get_drvdata(pci);
-       struct snd_azf3328 *chip = card->private_data;
-       unsigned reg;
+       const struct snd_azf3328 *chip = card->private_data;
 
        pci_set_power_state(pci, PCI_D0);
        pci_restore_state(pci);
@@ -2362,16 +2472,24 @@ snd_azf3328_resume(struct pci_dev *pci)
        }
        pci_set_master(pci);
 
-       for (reg = 0; reg < AZF_IO_SIZE_GAME_PM / 2; ++reg)
-               outw(chip->saved_regs_game[reg], chip->game_io + reg * 2);
-       for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; ++reg)
-               outw(chip->saved_regs_mpu[reg], chip->mpu_io + reg * 2);
-       for (reg = 0; reg < AZF_IO_SIZE_OPL3_PM / 2; ++reg)
-               outw(chip->saved_regs_opl3[reg], chip->opl3_io + reg * 2);
-       for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; ++reg)
-               outw(chip->saved_regs_mixer[reg], chip->mixer_io + reg * 2);
-       for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; ++reg)
-               outw(chip->saved_regs_codec[reg], chip->codec_io + reg * 2);
+       snd_azf3328_resume_regs(chip->saved_regs_game, chip->game_io,
+                                       ARRAY_SIZE(chip->saved_regs_game));
+       snd_azf3328_resume_regs(chip->saved_regs_mpu, chip->mpu_io,
+                                       ARRAY_SIZE(chip->saved_regs_mpu));
+       snd_azf3328_resume_regs(chip->saved_regs_opl3, chip->opl3_io,
+                                       ARRAY_SIZE(chip->saved_regs_opl3));
+
+       snd_azf3328_resume_regs(chip->saved_regs_mixer, chip->mixer_io,
+                                       ARRAY_SIZE(chip->saved_regs_mixer));
+
+       /* unfortunately with 32bit transfers, IDX_MIXER_PLAY_MASTER (0x02)
+          and IDX_MIXER_RESET (offset 0x00) get touched at the same time,
+          resulting in a mixer reset condition persisting until _after_
+          master vol was restored. Thus master vol needs an extra restore. */
+       outw(((u16 *)chip->saved_regs_mixer)[1], chip->mixer_io + 2);
+
+       snd_azf3328_resume_regs(chip->saved_regs_ctrl, chip->ctrl_io,
+                                       ARRAY_SIZE(chip->saved_regs_ctrl));
 
        snd_power_change_state(card, SNDRV_CTL_POWER_D0);
        return 0;
index 974e051..6f46b97 100644 (file)
@@ -6,50 +6,59 @@
 
 /*** main I/O area port indices ***/
 /* (only 0x70 of 0x80 bytes saved/restored by Windows driver) */
-#define AZF_IO_SIZE_CODEC      0x80
-#define AZF_IO_SIZE_CODEC_PM   0x70
+#define AZF_IO_SIZE_CTRL       0x80
+#define AZF_IO_SIZE_CTRL_PM    0x70
 
-/* the driver initialisation suggests a layout of 4 main areas:
- * from 0x00 (playback), from 0x20 (recording) and from 0x40 (maybe MPU401??).
+/* the driver initialisation suggests a layout of 4 areas
+ * within the main card control I/O:
+ * from 0x00 (playback codec), from 0x20 (recording codec)
+ * and from 0x40 (most certainly I2S out codec).
  * And another area from 0x60 to 0x6f (DirectX timer, IRQ management,
  * power management etc.???). */
 
-/** playback area **/
-#define IDX_IO_PLAY_FLAGS       0x00 /* PU:0x0000 */
+#define AZF_IO_OFFS_CODEC_PLAYBACK     0x00
+#define AZF_IO_OFFS_CODEC_CAPTURE      0x20
+#define AZF_IO_OFFS_CODEC_I2S_OUT      0x40
+
+#define IDX_IO_CODEC_DMA_FLAGS       0x00 /* PU:0x0000 */
      /* able to reactivate output after output muting due to 8/16bit
       * output change, just like 0x0002.
       * 0x0001 is the only bit that's able to start the DMA counter */
-  #define DMA_RESUME                   0x0001 /* paused if cleared ? */
+  #define DMA_RESUME                   0x0001 /* paused if cleared? */
      /* 0x0002 *temporarily* set during DMA stopping. hmm
       * both 0x0002 and 0x0004 set in playback setup. */
      /* able to reactivate output after output muting due to 8/16bit
       * output change, just like 0x0001. */
-  #define DMA_PLAY_SOMETHING1          0x0002 /* \ alternated (toggled) */
+  #define DMA_RUN_SOMETHING1           0x0002 /* \ alternated (toggled) */
      /* 0x0004: NOT able to reactivate output */
-  #define DMA_PLAY_SOMETHING2          0x0004 /* / bits */
+  #define DMA_RUN_SOMETHING2           0x0004 /* / bits */
   #define SOMETHING_ALMOST_ALWAYS_SET  0x0008 /* ???; can be modified */
   #define DMA_EPILOGUE_SOMETHING       0x0010
   #define DMA_SOMETHING_ELSE           0x0020 /* ??? */
-  #define SOMETHING_UNMODIFIABLE       0xffc0 /* unused ? not modifiable */
-#define IDX_IO_PLAY_IRQTYPE     0x02 /* PU:0x0001 */
+  #define SOMETHING_UNMODIFIABLE       0xffc0 /* unused? not modifiable */
+#define IDX_IO_CODEC_IRQTYPE     0x02 /* PU:0x0001 */
   /* write back to flags in case flags are set, in order to ACK IRQ in handler
    * (bit 1 of port 0x64 indicates interrupt for one of these three types)
    * sometimes in this case it just writes 0xffff to globally ACK all IRQs
    * settings written are not reflected when reading back, though.
-   * seems to be IRQ, too (frequently used: port |= 0x07 !), but who knows ? */
-  #define IRQ_PLAY_SOMETHING           0x0001 /* something & ACK */
-  #define IRQ_FINISHED_PLAYBUF_1       0x0002 /* 1st dmabuf finished & ACK */
-  #define IRQ_FINISHED_PLAYBUF_2       0x0004 /* 2nd dmabuf finished & ACK */
+   * seems to be IRQ, too (frequently used: port |= 0x07 !), but who knows? */
+  #define IRQ_SOMETHING                        0x0001 /* something & ACK */
+  #define IRQ_FINISHED_DMABUF_1                0x0002 /* 1st dmabuf finished & ACK */
+  #define IRQ_FINISHED_DMABUF_2                0x0004 /* 2nd dmabuf finished & ACK */
   #define IRQMASK_SOME_STATUS_1                0x0008 /* \ related bits */
   #define IRQMASK_SOME_STATUS_2                0x0010 /* / (checked together in loop) */
-  #define IRQMASK_UNMODIFIABLE         0xffe0 /* unused ? not modifiable */
-#define IDX_IO_PLAY_DMA_START_1 0x04 /* start address of 1st DMA play area, PU:0x00000000 */
-#define IDX_IO_PLAY_DMA_START_2 0x08 /* start address of 2nd DMA play area, PU:0x00000000 */
-#define IDX_IO_PLAY_DMA_LEN_1   0x0c /* length of 1st DMA play area, PU:0x0000 */
-#define IDX_IO_PLAY_DMA_LEN_2   0x0e /* length of 2nd DMA play area, PU:0x0000 */
-#define IDX_IO_PLAY_DMA_CURRPOS 0x10 /* current DMA position, PU:0x00000000 */
-#define IDX_IO_PLAY_DMA_CURROFS        0x14 /* offset within current DMA play area, PU:0x0000 */
-#define IDX_IO_PLAY_SOUNDFORMAT 0x16 /* PU:0x0010 */
+  #define IRQMASK_UNMODIFIABLE         0xffe0 /* unused? not modifiable */
+  /* start address of 1st DMA transfer area, PU:0x00000000 */
+#define IDX_IO_CODEC_DMA_START_1 0x04
+  /* start address of 2nd DMA transfer area, PU:0x00000000 */
+#define IDX_IO_CODEC_DMA_START_2 0x08
+  /* both lengths of DMA transfer areas, PU:0x00000000
+     length1: offset 0x0c, length2: offset 0x0e */
+#define IDX_IO_CODEC_DMA_LENGTHS 0x0c
+#define IDX_IO_CODEC_DMA_CURRPOS 0x10 /* current DMA position, PU:0x00000000 */
+  /* offset within current DMA transfer area, PU:0x0000 */
+#define IDX_IO_CODEC_DMA_CURROFS 0x14
+#define IDX_IO_CODEC_SOUNDFORMAT 0x16 /* PU:0x0010 */
   /* all unspecified bits can't be modified */
   #define SOUNDFORMAT_FREQUENCY_MASK   0x000f
   #define SOUNDFORMAT_XTAL1            0x00
@@ -76,6 +85,7 @@
   #define SOUNDFORMAT_FLAG_16BIT       0x0010
   #define SOUNDFORMAT_FLAG_2CHANNELS   0x0020
 
+
 /* define frequency helpers, for maximum value safety */
 enum azf_freq_t {
 #define AZF_FREQ(rate) AZF_FREQ_##rate = rate
@@ -96,29 +106,6 @@ enum azf_freq_t {
 #undef AZF_FREQ
 };
 
-/** recording area (see also: playback bit flag definitions) **/
-#define IDX_IO_REC_FLAGS       0x20 /* ??, PU:0x0000 */
-#define IDX_IO_REC_IRQTYPE     0x22 /* ??, PU:0x0000 */
-  #define IRQ_REC_SOMETHING            0x0001 /* something & ACK */
-  #define IRQ_FINISHED_RECBUF_1                0x0002 /* 1st dmabuf finished & ACK */
-  #define IRQ_FINISHED_RECBUF_2                0x0004 /* 2nd dmabuf finished & ACK */
-  /* hmm, maybe these are just the corresponding *recording* flags ?
-   * but OTOH they are most likely at port 0x22 instead */
-  #define IRQMASK_SOME_STATUS_1                0x0008 /* \ related bits */
-  #define IRQMASK_SOME_STATUS_2                0x0010 /* / (checked together in loop) */
-#define IDX_IO_REC_DMA_START_1  0x24 /* PU:0x00000000 */
-#define IDX_IO_REC_DMA_START_2  0x28 /* PU:0x00000000 */
-#define IDX_IO_REC_DMA_LEN_1    0x2c /* PU:0x0000 */
-#define IDX_IO_REC_DMA_LEN_2    0x2e /* PU:0x0000 */
-#define IDX_IO_REC_DMA_CURRPOS  0x30 /* PU:0x00000000 */
-#define IDX_IO_REC_DMA_CURROFS  0x34 /* PU:0x00000000 */
-#define IDX_IO_REC_SOUNDFORMAT  0x36 /* PU:0x0000 */
-
-/** hmm, what is this I/O area for? MPU401?? or external DAC via I2S?? (after playback, recording, ???, timer) **/
-#define IDX_IO_SOMETHING_FLAGS 0x40 /* gets set to 0x34 just like port 0x0 and 0x20 on card init, PU:0x0000 */
-/* general */
-#define IDX_IO_42H             0x42 /* PU:0x0001 */
-
 /** DirectX timer, main interrupt area (FIXME: and something else?) **/ 
 #define IDX_IO_TIMER_VALUE     0x60 /* found this timer area by pure luck :-) */
   /* timer countdown value; triggers IRQ when timer is finished */
@@ -133,17 +120,19 @@ enum azf_freq_t {
 #define IDX_IO_IRQSTATUS        0x64
   /* some IRQ bit in here might also be used to signal a power-management timer
    * timeout, to request shutdown of the chip (e.g. AD1815JS has such a thing).
-   * Some OPL3 hardware (e.g. in LM4560) has some special timer hardware which
-   * can trigger an OPL3 timer IRQ, so maybe there's such a thing as well... */
+   * OPL3 hardware contains several timers which confusingly in most cases
+   * are NOT routed to an IRQ, but some designs (e.g. LM4560) DO support that,
+   * so I wouldn't be surprised at all to discover that AZF3328
+   * supports that thing as well... */
 
   #define IRQ_PLAYBACK 0x0001
   #define IRQ_RECORDING        0x0002
-  #define IRQ_UNKNOWN1 0x0004 /* most probably I2S port */
+  #define IRQ_I2S_OUT  0x0004 /* this IS I2S, right!? (untested) */
   #define IRQ_GAMEPORT 0x0008 /* Interrupt of Digital(ly) Enhanced Game Port */
   #define IRQ_MPU401   0x0010
   #define IRQ_TIMER    0x0020 /* DirectX timer */
-  #define IRQ_UNKNOWN2 0x0040 /* probably unused, or possibly I2S port? */
-  #define IRQ_UNKNOWN3 0x0080 /* probably unused, or possibly I2S port? */
+  #define IRQ_UNKNOWN2 0x0040 /* probably unused, or possibly OPL3 timer? */
+  #define IRQ_UNKNOWN3 0x0080 /* probably unused, or possibly OPL3 timer? */
 #define IDX_IO_66H             0x66    /* writing 0xffff returns 0x0000 */
   /* this is set to e.g. 0x3ff or 0x300, and writable;
    * maybe some buffer limit, but I couldn't find out more, PU:0x00ff: */
@@ -206,7 +195,7 @@ enum azf_freq_t {
 /*** Gameport area port indices ***/
 /* (only 0x06 of 0x08 bytes saved/restored by Windows driver) */ 
 #define AZF_IO_SIZE_GAME               0x08
-#define AZF_IO_SIZE_GAME_PM    0x06
+#define AZF_IO_SIZE_GAME_PM            0x06
 
 enum {
        AZF_GAME_LEGACY_IO_PORT = 0x200
@@ -272,6 +261,12 @@ enum {
    * 11 --> 1/200: */
   #define GAME_HWCFG_ADC_COUNTER_FREQ_MASK     0x06
 
+  /* FIXME: these values might be reversed... */
+  #define GAME_HWCFG_ADC_COUNTER_FREQ_STD      0
+  #define GAME_HWCFG_ADC_COUNTER_FREQ_1_2      1
+  #define GAME_HWCFG_ADC_COUNTER_FREQ_1_20     2
+  #define GAME_HWCFG_ADC_COUNTER_FREQ_1_200    3
+
   /* enable gameport legacy I/O address (0x200)
    * I was unable to locate any configurability for a different address: */
   #define GAME_HWCFG_LEGACY_ADDRESS_ENABLE     0x08
@@ -281,6 +276,7 @@ enum {
 #define AZF_IO_SIZE_MPU_PM     0x04
 
 /*** OPL3 synth ***/
+/* (only 0x06 of 0x08 bytes saved/restored by Windows driver) */
 #define AZF_IO_SIZE_OPL3       0x08
 #define AZF_IO_SIZE_OPL3_PM    0x06
 /* hmm, given that a standard OPL3 has 4 registers only,
@@ -340,4 +336,7 @@ enum {
 #define SET_CHAN_LEFT  1
 #define SET_CHAN_RIGHT 2
 
+/* helper macro to align I/O port ranges to 32bit I/O width */
+#define AZF_ALIGN(x) (((x) + 3) & (~3))
+
 #endif /* __SOUND_AZT3328_H  */
index d3e786a..b1749bc 100644 (file)
@@ -29,6 +29,7 @@ source "sound/soc/au1x/Kconfig"
 source "sound/soc/blackfin/Kconfig"
 source "sound/soc/davinci/Kconfig"
 source "sound/soc/fsl/Kconfig"
+source "sound/soc/imx/Kconfig"
 source "sound/soc/omap/Kconfig"
 source "sound/soc/pxa/Kconfig"
 source "sound/soc/s3c24xx/Kconfig"
index 6f1e28d..0c5eac0 100644 (file)
@@ -1,4 +1,4 @@
-snd-soc-core-objs := soc-core.o soc-dapm.o soc-jack.o
+snd-soc-core-objs := soc-core.o soc-dapm.o soc-jack.o soc-cache.o
 
 obj-$(CONFIG_SND_SOC)  += snd-soc-core.o
 obj-$(CONFIG_SND_SOC)  += codecs/
@@ -7,6 +7,7 @@ obj-$(CONFIG_SND_SOC)   += au1x/
 obj-$(CONFIG_SND_SOC)  += blackfin/
 obj-$(CONFIG_SND_SOC)  += davinci/
 obj-$(CONFIG_SND_SOC)  += fsl/
+obj-$(CONFIG_SND_SOC)   += imx/
 obj-$(CONFIG_SND_SOC)  += omap/
 obj-$(CONFIG_SND_SOC)  += pxa/
 obj-$(CONFIG_SND_SOC)  += s3c24xx/
index 173a239..130b121 100644 (file)
 
 #define MCLK_RATE 12000000
 
-static struct clk *mclk;
-
-static int at91sam9g20ek_startup(struct snd_pcm_substream *substream)
-{
-       struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
-       struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
-       int ret;
-
-       ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK,
-               MCLK_RATE, SND_SOC_CLOCK_IN);
-       if (ret < 0) {
-               clk_disable(mclk);
-               return ret;
-       }
-
-       return 0;
-}
-
-static void at91sam9g20ek_shutdown(struct snd_pcm_substream *substream)
-{
-       struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
+/*
+ * As shipped the board does not have inputs.  However, it is relatively
+ * straightforward to modify the board to hook them up so support is left
+ * in the driver.
+ */
+#undef ENABLE_MIC_INPUT
 
-       dev_dbg(rtd->socdev->dev, "shutdown");
-}
+static struct clk *mclk;
 
 static int at91sam9g20ek_hw_params(struct snd_pcm_substream *substream,
        struct snd_pcm_hw_params *params)
@@ -87,102 +71,17 @@ static int at91sam9g20ek_hw_params(struct snd_pcm_substream *substream,
        struct snd_soc_pcm_runtime *rtd = substream->private_data;
        struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
        struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
-       struct atmel_ssc_info *ssc_p = cpu_dai->private_data;
-       struct ssc_device *ssc = ssc_p->ssc;
        int ret;
 
-       unsigned int rate;
-       int cmr_div, period;
-
-       if (ssc == NULL) {
-               printk(KERN_INFO "at91sam9g20ek_hw_params: ssc is NULL!\n");
-               return -EINVAL;
-       }
-
        /* set codec DAI configuration */
        ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
-               SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
+               SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
        if (ret < 0)
                return ret;
 
        /* set cpu DAI configuration */
        ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
-               SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
-       if (ret < 0)
-               return ret;
-
-       /*
-        * The SSC clock dividers depend on the sample rate.  The CMR.DIV
-        * field divides the system master clock MCK to drive the SSC TK
-        * signal which provides the codec BCLK.  The TCMR.PERIOD and
-        * RCMR.PERIOD fields further divide the BCLK signal to drive
-        * the SSC TF and RF signals which provide the codec DACLRC and
-        * ADCLRC clocks.
-        *
-        * The dividers were determined through trial and error, where a
-        * CMR.DIV value is chosen such that the resulting BCLK value is
-        * divisible, or almost divisible, by (2 * sample rate), and then
-        * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
-        */
-       rate = params_rate(params);
-
-       switch (rate) {
-       case 8000:
-               cmr_div = 55;   /* BCLK = 133MHz/(2*55) = 1.209MHz */
-               period = 74;    /* LRC = BCLK/(2*(74+1)) ~= 8060,6Hz */
-               break;
-       case 11025:
-               cmr_div = 67;   /* BCLK = 133MHz/(2*60) = 1.108MHz */
-               period = 45;    /* LRC = BCLK/(2*(49+1)) = 11083,3Hz */
-               break;
-       case 16000:
-               cmr_div = 63;   /* BCLK = 133MHz/(2*63) = 1.055MHz */
-               period = 32;    /* LRC = BCLK/(2*(32+1)) = 15993,2Hz */
-               break;
-       case 22050:
-               cmr_div = 52;   /* BCLK = 133MHz/(2*52) = 1.278MHz */
-               period = 28;    /* LRC = BCLK/(2*(28+1)) = 22049Hz */
-               break;
-       case 32000:
-               cmr_div = 66;   /* BCLK = 133MHz/(2*66) = 1.007MHz */
-               period = 15;    /* LRC = BCLK/(2*(15+1)) = 31486,742Hz */
-               break;
-       case 44100:
-               cmr_div = 29;   /* BCLK = 133MHz/(2*29) = 2.293MHz */
-               period = 25;    /* LRC = BCLK/(2*(25+1)) = 44098Hz */
-               break;
-       case 48000:
-               cmr_div = 33;   /* BCLK = 133MHz/(2*33) = 2.015MHz */
-               period = 20;    /* LRC = BCLK/(2*(20+1)) = 47979,79Hz */
-               break;
-       case 88200:
-               cmr_div = 29;   /* BCLK = 133MHz/(2*29) = 2.293MHz */
-               period = 12;    /* LRC = BCLK/(2*(12+1)) = 88196Hz */
-               break;
-       case 96000:
-               cmr_div = 23;   /* BCLK = 133MHz/(2*23) = 2.891MHz */
-               period = 14;    /* LRC = BCLK/(2*(14+1)) = 96376Hz */
-               break;
-       default:
-               printk(KERN_WARNING "unsupported rate %d"
-                               " on at91sam9g20ek board\n", rate);
-               return -EINVAL;
-       }
-
-       /* set the MCK divider for BCLK */
-       ret = snd_soc_dai_set_clkdiv(cpu_dai, ATMEL_SSC_CMR_DIV, cmr_div);
-       if (ret < 0)
-               return ret;
-
-       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-               /* set the BCLK divider for DACLRC */
-               ret = snd_soc_dai_set_clkdiv(cpu_dai,
-                                               ATMEL_SSC_TCMR_PERIOD, period);
-       } else {
-               /* set the BCLK divider for ADCLRC */
-               ret = snd_soc_dai_set_clkdiv(cpu_dai,
-                                               ATMEL_SSC_RCMR_PERIOD, period);
-       }
+               SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
        if (ret < 0)
                return ret;
 
@@ -190,9 +89,7 @@ static int at91sam9g20ek_hw_params(struct snd_pcm_substream *substream,
 }
 
 static struct snd_soc_ops at91sam9g20ek_ops = {
-       .startup = at91sam9g20ek_startup,
        .hw_params = at91sam9g20ek_hw_params,
-       .shutdown = at91sam9g20ek_shutdown,
 };
 
 static int at91sam9g20ek_set_bias_level(struct snd_soc_card *card,
@@ -241,10 +138,20 @@ static const struct snd_soc_dapm_route intercon[] = {
  */
 static int at91sam9g20ek_wm8731_init(struct snd_soc_codec *codec)
 {
+       struct snd_soc_dai *codec_dai = &codec->dai[0];
+       int ret;
+
        printk(KERN_DEBUG
                        "at91sam9g20ek_wm8731 "
                        ": at91sam9g20ek_wm8731_init() called\n");
 
+       ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK,
+               MCLK_RATE, SND_SOC_CLOCK_IN);
+       if (ret < 0) {
+               printk(KERN_ERR "Failed to set WM8731 SYSCLK: %d\n", ret);
+               return ret;
+       }
+
        /* Add specific widgets */
        snd_soc_dapm_new_controls(codec, at91sam9g20ek_dapm_widgets,
                                  ARRAY_SIZE(at91sam9g20ek_dapm_widgets));
@@ -255,8 +162,13 @@ static int at91sam9g20ek_wm8731_init(struct snd_soc_codec *codec)
        snd_soc_dapm_nc_pin(codec, "RLINEIN");
        snd_soc_dapm_nc_pin(codec, "LLINEIN");
 
-       /* always connected */
+#ifdef ENABLE_MIC_INPUT
        snd_soc_dapm_enable_pin(codec, "Int Mic");
+#else
+       snd_soc_dapm_nc_pin(codec, "Int Mic");
+#endif
+
+       /* always connected */
        snd_soc_dapm_enable_pin(codec, "Ext Spk");
 
        snd_soc_dapm_sync(codec);
index 479d7bd..a521aa9 100644 (file)
@@ -1,8 +1,8 @@
 /*
  * Au12x0/Au1550 PSC ALSA ASoC audio support.
  *
- * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
- *     Manuel Lauss <mano@roarinelk.homelinux.net>
+ * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
+ *     Manuel Lauss <manuel.lauss@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -19,6 +19,7 @@
 #include <linux/module.h>
 #include <linux/device.h>
 #include <linux/delay.h>
+#include <linux/mutex.h>
 #include <linux/suspend.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
@@ -29,6 +30,9 @@
 
 #include "psc.h"
 
+/* how often to retry failed codec register reads/writes */
+#define AC97_RW_RETRIES        5
+
 #define AC97_DIR       \
        (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
 
@@ -45,6 +49,9 @@
 #define AC97PCR_CLRFIFO(stype) \
        ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
 
+#define AC97STAT_BUSY(stype)   \
+       ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
+
 /* instance data. There can be only one, MacLeod!!!! */
 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
 
@@ -54,24 +61,33 @@ static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
 {
        /* FIXME */
        struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
-       unsigned short data, tmo;
+       unsigned short data, retry, tmo;
 
-       au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg), AC97_CDC(pscdata));
+       au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
        au_sync();
 
-       tmo = 1000;
-       while ((!(au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)) && --tmo)
-               udelay(2);
+       retry = AC97_RW_RETRIES;
+       do {
+               mutex_lock(&pscdata->lock);
+
+               au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
+                         AC97_CDC(pscdata));
+               au_sync();
+
+               tmo = 2000;
+               while ((!(au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD))
+                       && --tmo)
+                       udelay(2);
 
-       if (!tmo)
-               data = 0xffff;
-       else
                data = au_readl(AC97_CDC(pscdata)) & 0xffff;
 
-       au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
-       au_sync();
+               au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
+               au_sync();
+
+               mutex_unlock(&pscdata->lock);
+       } while (--retry && !tmo);
 
-       return data;
+       return retry ? data : 0xffff;
 }
 
 /* AC97 controller writes to codec register */
@@ -80,16 +96,29 @@ static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
 {
        /* FIXME */
        struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
-       unsigned int tmo;
+       unsigned int tmo, retry;
 
-       au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff), AC97_CDC(pscdata));
+       au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
        au_sync();
-       tmo = 1000;
-       while ((!(au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)) && --tmo)
+
+       retry = AC97_RW_RETRIES;
+       do {
+               mutex_lock(&pscdata->lock);
+
+               au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
+                         AC97_CDC(pscdata));
                au_sync();
 
-       au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
-       au_sync();
+               tmo = 2000;
+               while ((!(au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD))
+                      && --tmo)
+                       udelay(2);
+
+               au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
+               au_sync();
+
+               mutex_unlock(&pscdata->lock);
+       } while (--retry && !tmo);
 }
 
 /* AC97 controller asserts a warm reset */
@@ -129,9 +158,9 @@ static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
        au_sync();
 
        /* wait for PSC to indicate it's ready */
-       i = 100000;
+       i = 1000;
        while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
-               au_sync();
+               msleep(1);
 
        if (i == 0) {
                printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
@@ -143,9 +172,9 @@ static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
        au_sync();
 
        /* wait for AC97 core to become ready */
-       i = 100000;
+       i = 1000;
        while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
-               au_sync();
+               msleep(1);
        if (i == 0)
                printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
 }
@@ -165,12 +194,12 @@ static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
 {
        /* FIXME */
        struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
-       unsigned long r, stat;
+       unsigned long r, ro, stat;
        int chans, stype = SUBSTREAM_TYPE(substream);
 
        chans = params_channels(params);
 
-       r = au_readl(AC97_CFG(pscdata));
+       r = ro = au_readl(AC97_CFG(pscdata));
        stat = au_readl(AC97_STAT(pscdata));
 
        /* already active? */
@@ -180,9 +209,6 @@ static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
                    (pscdata->rate != params_rate(params)))
                        return -EINVAL;
        } else {
-               /* disable AC97 device controller first */
-               au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
-               au_sync();
 
                /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
                r &= ~PSC_AC97CFG_LEN_MASK;
@@ -199,14 +225,40 @@ static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
                        r |= PSC_AC97CFG_RXSLOT_ENA(4);
                }
 
-               /* finally enable the AC97 controller again */
+               /* do we need to poke the hardware? */
+               if (!(r ^ ro))
+                       goto out;
+
+               /* ac97 engine is about to be disabled */
+               mutex_lock(&pscdata->lock);
+
+               /* disable AC97 device controller first... */
+               au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
+               au_sync();
+
+               /* ...wait for it... */
+               while (au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)
+                       asm volatile ("nop");
+
+               /* ...write config... */
+               au_writel(r, AC97_CFG(pscdata));
+               au_sync();
+
+               /* ...enable the AC97 controller again... */
                au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
                au_sync();
 
+               /* ...and wait for ready bit */
+               while (!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR))
+                       asm volatile ("nop");
+
+               mutex_unlock(&pscdata->lock);
+
                pscdata->cfg = r;
                pscdata->rate = params_rate(params);
        }
 
+out:
        return 0;
 }
 
@@ -222,6 +274,8 @@ static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
        switch (cmd) {
        case SNDRV_PCM_TRIGGER_START:
        case SNDRV_PCM_TRIGGER_RESUME:
+               au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
+               au_sync();
                au_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
                au_sync();
                break;
@@ -229,6 +283,13 @@ static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
        case SNDRV_PCM_TRIGGER_SUSPEND:
                au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
                au_sync();
+
+               while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
+                       asm volatile ("nop");
+
+               au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
+               au_sync();
+
                break;
        default:
                ret = -EINVAL;
@@ -251,6 +312,8 @@ static int au1xpsc_ac97_probe(struct platform_device *pdev,
        if (!au1xpsc_ac97_workdata)
                return -ENOMEM;
 
+       mutex_init(&au1xpsc_ac97_workdata->lock);
+
        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!r) {
                ret = -ENODEV;
@@ -269,9 +332,9 @@ static int au1xpsc_ac97_probe(struct platform_device *pdev,
                goto out1;
 
        /* configuration: max dma trigger threshold, enable ac97 */
-        au1xpsc_ac97_workdata->cfg = PSC_AC97CFG_RT_FIFO8 |
-                                     PSC_AC97CFG_TT_FIFO8 |
-                                     PSC_AC97CFG_DE_ENABLE;
+       au1xpsc_ac97_workdata->cfg = PSC_AC97CFG_RT_FIFO8 |
+                                    PSC_AC97CFG_TT_FIFO8 |
+                                    PSC_AC97CFG_DE_ENABLE;
 
        /* preserve PSC clock source set up by platform (dev.platform_data
         * is already occupied by soc layer)
@@ -386,4 +449,4 @@ module_exit(au1xpsc_ac97_exit);
 
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
-MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
+MODULE_AUTHOR("Manuel Lauss <manuel.lauss@gmail.com>");
index 8fdb1a0..3f474e8 100644 (file)
@@ -29,6 +29,7 @@ struct au1xpsc_audio_data {
 
        unsigned long pm[2];
        struct resource *ioarea;
+       struct mutex lock;
 };
 
 #define PCM_TX 0
index 811596f..ac927ff 100644 (file)
@@ -7,6 +7,15 @@ config SND_BF5XX_I2S
          mode (supports single stereo In/Out).
          You will also need to select the audio interfaces to support below.
 
+config SND_BF5XX_TDM
+       tristate "SoC I2S(TDM mode) Audio for the ADI BF5xx chip"
+       depends on (BLACKFIN && SND_SOC)
+       help
+         Say Y or M if you want to add support for codecs attached to
+         the Blackfin SPORT (synchronous serial ports) interface in TDM
+         mode.
+         You will also need to select the audio interfaces to support below.
+
 config SND_BF5XX_SOC_SSM2602
        tristate "SoC SSM2602 Audio support for BF52x ezkit"
        depends on SND_BF5XX_I2S
@@ -69,12 +78,24 @@ config SND_BF5XX_SOC_I2S
        tristate
        select SND_BF5XX_SOC_SPORT
 
+config SND_BF5XX_SOC_TDM
+       tristate
+       select SND_BF5XX_SOC_SPORT
+
 config SND_BF5XX_SOC_AC97
        tristate
        select AC97_BUS
        select SND_SOC_AC97_BUS
        select SND_BF5XX_SOC_SPORT
 
+config SND_BF5XX_SOC_AD1836
+       tristate "SoC AD1836 Audio support for BF5xx"
+       depends on SND_BF5XX_TDM
+       select SND_BF5XX_SOC_TDM
+       select SND_SOC_AD1836
+       help
+         Say Y if you want to add support for SoC audio on BF5xx STAMP/EZKIT.
+
 config SND_BF5XX_SOC_AD1980
        tristate "SoC AD1980/1 Audio support for BF5xx"
        depends on SND_BF5XX_AC97
@@ -83,9 +104,17 @@ config SND_BF5XX_SOC_AD1980
        help
          Say Y if you want to add support for SoC audio on BF5xx STAMP/EZKIT.
 
+config SND_BF5XX_SOC_AD1938
+        tristate "SoC AD1938 Audio support for Blackfin"
+        depends on SND_BF5XX_TDM
+        select SND_BF5XX_SOC_TDM
+        select SND_SOC_AD1938
+        help
+          Say Y if you want to add support for AD1938 codec on Blackfin.
+
 config SND_BF5XX_SPORT_NUM
        int "Set a SPORT for Sound chip"
-       depends on (SND_BF5XX_I2S || SND_BF5XX_AC97)
+       depends on (SND_BF5XX_I2S || SND_BF5XX_AC97 || SND_BF5XX_TDM)
        range 0 3 if BF54x
        range 0 1 if !BF54x
        default 0
index 97bb37a..87e3042 100644 (file)
@@ -1,21 +1,29 @@
 # Blackfin Platform Support
 snd-bf5xx-ac97-objs := bf5xx-ac97-pcm.o
 snd-bf5xx-i2s-objs := bf5xx-i2s-pcm.o
+snd-bf5xx-tdm-objs := bf5xx-tdm-pcm.o
 snd-soc-bf5xx-sport-objs := bf5xx-sport.o
 snd-soc-bf5xx-ac97-objs := bf5xx-ac97.o
 snd-soc-bf5xx-i2s-objs := bf5xx-i2s.o
+snd-soc-bf5xx-tdm-objs := bf5xx-tdm.o
 
 obj-$(CONFIG_SND_BF5XX_AC97) += snd-bf5xx-ac97.o
 obj-$(CONFIG_SND_BF5XX_I2S) += snd-bf5xx-i2s.o
+obj-$(CONFIG_SND_BF5XX_TDM) += snd-bf5xx-tdm.o
 obj-$(CONFIG_SND_BF5XX_SOC_SPORT) += snd-soc-bf5xx-sport.o
 obj-$(CONFIG_SND_BF5XX_SOC_AC97) += snd-soc-bf5xx-ac97.o
 obj-$(CONFIG_SND_BF5XX_SOC_I2S) += snd-soc-bf5xx-i2s.o
+obj-$(CONFIG_SND_BF5XX_SOC_TDM) += snd-soc-bf5xx-tdm.o
 
 # Blackfin Machine Support
+snd-ad1836-objs := bf5xx-ad1836.o
 snd-ad1980-objs := bf5xx-ad1980.o
 snd-ssm2602-objs := bf5xx-ssm2602.o
 snd-ad73311-objs := bf5xx-ad73311.o
+snd-ad1938-objs := bf5xx-ad1938.o
 
+obj-$(CONFIG_SND_BF5XX_SOC_AD1836) += snd-ad1836.o
 obj-$(CONFIG_SND_BF5XX_SOC_AD1980) += snd-ad1980.o
 obj-$(CONFIG_SND_BF5XX_SOC_SSM2602) += snd-ssm2602.o
 obj-$(CONFIG_SND_BF5XX_SOC_AD73311) += snd-ad73311.o
+obj-$(CONFIG_SND_BF5XX_SOC_AD1938) += snd-ad1938.o
index b1ed423..2758b90 100644 (file)
@@ -277,28 +277,24 @@ static int bf5xx_ac97_resume(struct snd_soc_dai *dai)
        if (!dai->active)
                return 0;
 
-       ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
+       ret = sport_set_multichannel(sport, 16, 0x1F, 1);
        if (ret) {
                pr_err("SPORT is busy!\n");
                return -EBUSY;
        }
 
-       ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
+       ret = sport_config_rx(sport, IRFS, 0xF, 0, (16*16-1));
        if (ret) {
                pr_err("SPORT is busy!\n");
                return -EBUSY;
        }
 
-       ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
+       ret = sport_config_tx(sport, ITFS, 0xF, 0, (16*16-1));
        if (ret) {
                pr_err("SPORT is busy!\n");
                return -EBUSY;
        }
 
-       if (dai->capture.active)
-               sport_rx_start(sport);
-       if (dai->playback.active)
-               sport_tx_start(sport);
        return 0;
 }
 
diff --git a/sound/soc/blackfin/bf5xx-ad1836.c b/sound/soc/blackfin/bf5xx-ad1836.c
new file mode 100644 (file)
index 0000000..cd361e3
--- /dev/null
@@ -0,0 +1,128 @@
+/*
+ * File:         sound/soc/blackfin/bf5xx-ad1836.c
+ * Author:       Barry Song <Barry.Song@analog.com>
+ *
+ * Created:      Aug 4 2009
+ * Description:  Board driver for ad1836 sound chip
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm_params.h>
+
+#include <asm/blackfin.h>
+#include <asm/cacheflush.h>
+#include <asm/irq.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#include "../codecs/ad1836.h"
+#include "bf5xx-sport.h"
+
+#include "bf5xx-tdm-pcm.h"
+#include "bf5xx-tdm.h"
+
+static struct snd_soc_card bf5xx_ad1836;
+
+static int bf5xx_ad1836_startup(struct snd_pcm_substream *substream)
+{
+       struct snd_soc_pcm_runtime *rtd = substream->private_data;
+       struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+
+       cpu_dai->private_data = sport_handle;
+       return 0;
+}
+
+static int bf5xx_ad1836_hw_params(struct snd_pcm_substream *substream,
+       struct snd_pcm_hw_params *params)
+{
+       struct snd_soc_pcm_runtime *rtd = substream->private_data;
+       struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+       struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
+       int ret = 0;
+       /* set cpu DAI configuration */
+       ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A |
+               SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_CBM_CFM);
+       if (ret < 0)
+               return ret;
+
+       /* set codec DAI configuration */
+       ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |
+               SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_CBM_CFM);
+       if (ret < 0)
+               return ret;
+
+       return 0;
+}
+
+static struct snd_soc_ops bf5xx_ad1836_ops = {
+       .startup = bf5xx_ad1836_startup,
+       .hw_params = bf5xx_ad1836_hw_params,
+};
+
+static struct snd_soc_dai_link bf5xx_ad1836_dai = {
+       .name = "ad1836",
+       .stream_name = "AD1836",
+       .cpu_dai = &bf5xx_tdm_dai,
+       .codec_dai = &ad1836_dai,
+       .ops = &bf5xx_ad1836_ops,
+};
+
+static struct snd_soc_card bf5xx_ad1836 = {
+       .name = "bf5xx_ad1836",
+       .platform = &bf5xx_tdm_soc_platform,
+       .dai_link = &bf5xx_ad1836_dai,
+       .num_links = 1,
+};
+
+static struct snd_soc_device bf5xx_ad1836_snd_devdata = {
+       .card = &bf5xx_ad1836,
+       .codec_dev = &soc_codec_dev_ad1836,
+};
+
+static struct platform_device *bfxx_ad1836_snd_device;
+
+static int __init bf5xx_ad1836_init(void)
+{
+       int ret;
+
+       bfxx_ad1836_snd_device = platform_device_alloc("soc-audio", -1);
+       if (!bfxx_ad1836_snd_device)
+               return -ENOMEM;
+
+       platform_set_drvdata(bfxx_ad1836_snd_device, &bf5xx_ad1836_snd_devdata);
+       bf5xx_ad1836_snd_devdata.dev = &bfxx_ad1836_snd_device->dev;
+       ret = platform_device_add(bfxx_ad1836_snd_device);
+
+       if (ret)
+               platform_device_put(bfxx_ad1836_snd_device);
+
+       return ret;
+}
+
+static void __exit bf5xx_ad1836_exit(void)
+{
+       platform_device_unregister(bfxx_ad1836_snd_device);
+}
+
+module_init(bf5xx_ad1836_init);
+module_exit(bf5xx_ad1836_exit);
+
+/* Module information */
+MODULE_AUTHOR("Barry Song");
+MODULE_DESCRIPTION("ALSA SoC AD1836 board driver");
+MODULE_LICENSE("GPL");
+
diff --git a/sound/soc/blackfin/bf5xx-ad1938.c b/sound/soc/blackfin/bf5xx-ad1938.c
new file mode 100644 (file)
index 0000000..08269e9
--- /dev/null
@@ -0,0 +1,142 @@
+/*
+ * File:         sound/soc/blackfin/bf5xx-ad1938.c
+ * Author:       Barry Song <Barry.Song@analog.com>
+ *
+ * Created:      Thur June 4 2009
+ * Description:  Board driver for ad1938 sound chip
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/pcm_params.h>
+
+#include <asm/blackfin.h>
+#include <asm/cacheflush.h>
+#include <asm/irq.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#include "../codecs/ad1938.h"
+#include "bf5xx-sport.h"
+
+#include "bf5xx-tdm-pcm.h"
+#include "bf5xx-tdm.h"
+
+static struct snd_soc_card bf5xx_ad1938;
+
+static int bf5xx_ad1938_startup(struct snd_pcm_substream *substream)
+{
+       struct snd_soc_pcm_runtime *rtd = substream->private_data;
+       struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+
+       cpu_dai->private_data = sport_handle;
+       return 0;
+}
+
+static int bf5xx_ad1938_hw_params(struct snd_pcm_substream *substream,
+       struct snd_pcm_hw_params *params)
+{
+       struct snd_soc_pcm_runtime *rtd = substream->private_data;
+       struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+       struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
+       int ret = 0;
+       /* set cpu DAI configuration */
+       ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A |
+               SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_CBM_CFM);
+       if (ret < 0)
+               return ret;
+
+       /* set codec DAI configuration */
+       ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |
+               SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_CBM_CFM);
+       if (ret < 0)
+               return ret;
+
+       /* set codec DAI slots, 8 channels, all channels are enabled */
+       ret = snd_soc_dai_set_tdm_slot(codec_dai, 0xFF, 8);
+       if (ret < 0)
+               return ret;
+
+       return 0;
+}
+
+static struct snd_soc_ops bf5xx_ad1938_ops = {
+       .startup = bf5xx_ad1938_startup,
+       .hw_params = bf5xx_ad1938_hw_params,
+};
+
+static struct snd_soc_dai_link bf5xx_ad1938_dai = {
+       .name = "ad1938",
+       .stream_name = "AD1938",
+       .cpu_dai = &bf5xx_tdm_dai,
+       .codec_dai = &ad1938_dai,
+       .ops = &bf5xx_ad1938_ops,
+};
+
+static struct snd_soc_card bf5xx_ad1938 = {
+       .name = "bf5xx_ad1938",
+       .platform = &bf5xx_tdm_soc_platform,
+       .dai_link = &bf5xx_ad1938_dai,
+       .num_links = 1,
+};
+
+static struct snd_soc_device bf5xx_ad1938_snd_devdata = {
+       .card = &bf5xx_ad1938,
+       .codec_dev = &soc_codec_dev_ad1938,
+};
+
+static struct platform_device *bfxx_ad1938_snd_device;
+
+static int __init bf5xx_ad1938_init(void)
+{
+       int ret;
+
+       bfxx_ad1938_snd_device = platform_device_alloc("soc-audio", -1);
+       if (!bfxx_ad1938_snd_device)
+               return -ENOMEM;
+
+       platform_set_drvdata(bfxx_ad1938_snd_device, &bf5xx_ad1938_snd_devdata);
+       bf5xx_ad1938_snd_devdata.dev = &bfxx_ad1938_snd_device->dev;
+       ret = platform_device_add(bfxx_ad1938_snd_device);
+
+       if (ret)
+               platform_device_put(bfxx_ad1938_snd_device);
+
+       return ret;
+}
+
+static void __exit bf5xx_ad1938_exit(void)
+{
+       platform_device_unregister(bfxx_ad1938_snd_device);
+}
+
+module_init(bf5xx_ad1938_init);
+module_exit(bf5xx_ad1938_exit);
+
+/* Module information */
+MODULE_AUTHOR("Barry Song");
+MODULE_DESCRIPTION("ALSA SoC AD1938 board driver");
+MODULE_LICENSE("GPL");
+
index edfbdc0..9825b71 100644 (file)
@@ -203,23 +203,23 @@ static struct snd_soc_device bf5xx_ad73311_snd_devdata = {
        .codec_dev = &soc_codec_dev_ad73311,
 };
 
-static struct platform_device *bf52x_ad73311_snd_device;
+static struct platform_device *bf5xx_ad73311_snd_device;
 
 static int __init bf5xx_ad73311_init(void)
 {
        int ret;
 
        pr_debug("%s enter\n", __func__);
-       bf52x_ad73311_snd_device = platform_device_alloc("soc-audio", -1);
-       if (!bf52x_ad73311_snd_device)
+       bf5xx_ad73311_snd_device = platform_device_alloc("soc-audio", -1);
+       if (!bf5xx_ad73311_snd_device)
                return -ENOMEM;
 
-       platform_set_drvdata(bf52x_ad73311_snd_device, &bf5xx_ad73311_snd_devdata);
-       bf5xx_ad73311_snd_devdata.dev = &bf52x_ad73311_snd_device->dev;
-       ret = platform_device_add(bf52x_ad73311_snd_device);
+       platform_set_drvdata(bf5xx_ad73311_snd_device, &bf5xx_ad73311_snd_devdata);
+       bf5xx_ad73311_snd_devdata.dev = &bf5xx_ad73311_snd_device->dev;
+       ret = platform_device_add(bf5xx_ad73311_snd_device);
 
        if (ret)
-               platform_device_put(bf52x_ad73311_snd_device);
+               platform_device_put(bf5xx_ad73311_snd_device);
 
        return ret;
 }
@@ -227,7 +227,7 @@ static int __init bf5xx_ad73311_init(void)
 static void __exit bf5xx_ad73311_exit(void)
 {
        pr_debug("%s enter\n", __func__);
-       platform_device_unregister(bf52x_ad73311_snd_device);
+       platform_device_unregister(bf5xx_ad73311_snd_device);
 }
 
 module_init(bf5xx_ad73311_init);
index af06904..876abad 100644 (file)
@@ -259,22 +259,18 @@ static int bf5xx_i2s_resume(struct snd_soc_dai *dai)
        if (!dai->active)
                return 0;
 
-       ret = sport_config_rx(sport_handle, RFSR | RCKFE, RSFSE|0x1f, 0, 0);
+       ret = sport_config_rx(sport, RFSR | RCKFE, RSFSE|0x1f, 0, 0);
        if (ret) {
                pr_err("SPORT is busy!\n");
                return -EBUSY;
        }
 
-       ret = sport_config_tx(sport_handle, TFSR | TCKFE, TSFSE|0x1f, 0, 0);
+       ret = sport_config_tx(sport, TFSR | TCKFE, TSFSE|0x1f, 0, 0);
        if (ret) {
                pr_err("SPORT is busy!\n");
                return -EBUSY;
        }
 
-       if (dai->capture.active)
-               sport_rx_start(sport);
-       if (dai->playback.active)
-               sport_tx_start(sport);
        return 0;
 }
 
index bc0cdde..3a00fa4 100644 (file)
@@ -148,24 +148,24 @@ static struct snd_soc_device bf5xx_ssm2602_snd_devdata = {
        .codec_data = &bf5xx_ssm2602_setup,
 };
 
-static struct platform_device *bf52x_ssm2602_snd_device;
+static struct platform_device *bf5xx_ssm2602_snd_device;
 
 static int __init bf5xx_ssm2602_init(void)
 {
        int ret;
 
        pr_debug("%s enter\n", __func__);
-       bf52x_ssm2602_snd_device = platform_device_alloc("soc-audio", -1);
-       if (!bf52x_ssm2602_snd_device)
+       bf5xx_ssm2602_snd_device = platform_device_alloc("soc-audio", -1);
+       if (!bf5xx_ssm2602_snd_device)
                return -ENOMEM;
 
-       platform_set_drvdata(bf52x_ssm2602_snd_device,
+       platform_set_drvdata(bf5xx_ssm2602_snd_device,
                                &bf5xx_ssm2602_snd_devdata);
-       bf5xx_ssm2602_snd_devdata.dev = &bf52x_ssm2602_snd_device->dev;
-       ret = platform_device_add(bf52x_ssm2602_snd_device);
+       bf5xx_ssm2602_snd_devdata.dev = &bf5xx_ssm2602_snd_device->dev;
+       ret = platform_device_add(bf5xx_ssm2602_snd_device);
 
        if (ret)
-               platform_device_put(bf52x_ssm2602_snd_device);
+               platform_device_put(bf5xx_ssm2602_snd_device);
 
        return ret;
 }
@@ -173,7 +173,7 @@ static int __init bf5xx_ssm2602_init(void)
 static void __exit bf5xx_ssm2602_exit(void)
 {
        pr_debug("%s enter\n", __func__);
-       platform_device_unregister(bf52x_ssm2602_snd_device);
+       platform_device_unregister(bf5xx_ssm2602_snd_device);
 }
 
 module_init(bf5xx_ssm2602_init);
diff --git a/sound/soc/blackfin/bf5xx-tdm-pcm.c b/sound/soc/blackfin/bf5xx-tdm-pcm.c
new file mode 100644 (file)
index 0000000..ccb5e82
--- /dev/null
@@ -0,0 +1,330 @@
+/*
+ * File:         sound/soc/blackfin/bf5xx-tdm-pcm.c
+ * Author:       Barry Song <Barry.Song@analog.com>
+ *
+ * Created:      Tue June 06 2009
+ * Description:  DMA driver for tdm codec
+ *
+ * Modified:
+ *               Copyright 2009 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/dma-mapping.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+
+#include <asm/dma.h>
+
+#include "bf5xx-tdm-pcm.h"
+#include "bf5xx-tdm.h"
+#include "bf5xx-sport.h"
+
+#define PCM_BUFFER_MAX  0x10000
+#define FRAGMENT_SIZE_MIN  (4*1024)
+#define FRAGMENTS_MIN  2
+#define FRAGMENTS_MAX  32
+
+static void bf5xx_dma_irq(void *data)
+{
+       struct snd_pcm_substream *pcm = data;
+       snd_pcm_period_elapsed(pcm);
+}
+
+static const struct snd_pcm_hardware bf5xx_pcm_hardware = {
+       .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
+               SNDRV_PCM_INFO_RESUME),
+       .formats =          SNDRV_PCM_FMTBIT_S32_LE,
+       .rates =            SNDRV_PCM_RATE_48000,
+       .channels_min =     2,
+       .channels_max =     8,
+       .buffer_bytes_max = PCM_BUFFER_MAX,
+       .period_bytes_min = FRAGMENT_SIZE_MIN,
+       .period_bytes_max = PCM_BUFFER_MAX/2,
+       .periods_min =      FRAGMENTS_MIN,
+       .periods_max =      FRAGMENTS_MAX,
+};
+
+static int bf5xx_pcm_hw_params(struct snd_pcm_substream *substream,
+       struct snd_pcm_hw_params *params)
+{
+       size_t size = bf5xx_pcm_hardware.buffer_bytes_max;
+       snd_pcm_lib_malloc_pages(substream, size * 4);
+
+       return 0;
+}
+
+static int bf5xx_pcm_hw_free(struct snd_pcm_substream *substream)
+{
+       snd_pcm_lib_free_pages(substream);
+
+       return 0;
+}
+
+static int bf5xx_pcm_prepare(struct snd_pcm_substream *substream)
+{
+       struct snd_pcm_runtime *runtime = substream->runtime;
+       struct sport_device *sport = runtime->private_data;
+       int fragsize_bytes = frames_to_bytes(runtime, runtime->period_size);
+
+       fragsize_bytes /= runtime->channels;
+       /* inflate the fragsize to match the dma width of SPORT */
+       fragsize_bytes *= 8;
+
+       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+               sport_set_tx_callback(sport, bf5xx_dma_irq, substream);
+               sport_config_tx_dma(sport, runtime->dma_area,
+                       runtime->periods, fragsize_bytes);
+       } else {
+               sport_set_rx_callback(sport, bf5xx_dma_irq, substream);
+               sport_config_rx_dma(sport, runtime->dma_area,
+                       runtime->periods, fragsize_bytes);
+       }
+
+       return 0;
+}
+
+static int bf5xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+       struct snd_pcm_runtime *runtime = substream->runtime;
+       struct sport_device *sport = runtime->private_data;
+       int ret = 0;
+
+       switch (cmd) {
+       case SNDRV_PCM_TRIGGER_START:
+               if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+                       sport_tx_start(sport);
+               else
+                       sport_rx_start(sport);
+               break;
+       case SNDRV_PCM_TRIGGER_STOP:
+       case SNDRV_PCM_TRIGGER_SUSPEND:
+       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+               if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+                       sport_tx_stop(sport);
+               else
+                       sport_rx_stop(sport);
+               break;
+       default:
+               ret = -EINVAL;
+       }
+
+       return ret;
+}
+
+static snd_pcm_uframes_t bf5xx_pcm_pointer(struct snd_pcm_substream *substream)
+{
+       struct snd_pcm_runtime *runtime = substream->runtime;
+       struct sport_device *sport = runtime->private_data;
+       unsigned int diff;
+       snd_pcm_uframes_t frames;
+
+       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+               diff = sport_curr_offset_tx(sport);
+               frames = diff / (8*4); /* 32 bytes per frame */
+       } else {
+               diff = sport_curr_offset_rx(sport);
+               frames = diff / (8*4);
+       }
+       return frames;
+}
+
+static int bf5xx_pcm_open(struct snd_pcm_substream *substream)
+{
+       struct snd_pcm_runtime *runtime = substream->runtime;
+       int ret = 0;
+
+       snd_soc_set_runtime_hwparams(substream, &bf5xx_pcm_hardware);
+
+       ret = snd_pcm_hw_constraint_integer(runtime,
+               SNDRV_PCM_HW_PARAM_PERIODS);
+       if (ret < 0)
+               goto out;
+
+       if (sport_handle != NULL)
+               runtime->private_data = sport_handle;
+       else {
+               pr_err("sport_handle is NULL\n");
+               ret = -ENODEV;
+       }
+out:
+       return ret;
+}
+
+static int bf5xx_pcm_copy(struct snd_pcm_substream *substream, int channel,
+       snd_pcm_uframes_t pos, void *buf, snd_pcm_uframes_t count)
+{
+       unsigned int *src;
+       unsigned int *dst;
+       int i;
+
+       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+               src = buf;
+               dst = (unsigned int *)substream->runtime->dma_area;
+
+               dst += pos * 8;
+               while (count--) {
+                       for (i = 0; i < substream->runtime->channels; i++)
+                               *(dst + i) = *src++;
+                       dst += 8;
+               }
+       } else {
+               src = (unsigned int *)substream->runtime->dma_area;
+               dst = buf;
+
+               src += pos * 8;
+               while (count--) {
+                       for (i = 0; i < substream->runtime->channels; i++)
+                               *dst++ = *(src+i);
+                       src += 8;
+               }
+       }
+
+       return 0;
+}
+
+static int bf5xx_pcm_silence(struct snd_pcm_substream *substream,
+       int channel, snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
+{
+       unsigned char *buf = substream->runtime->dma_area;
+       buf += pos * 8 * 4;
+       memset(buf, '\0', count * 8 * 4);
+
+       return 0;
+}
+
+
+struct snd_pcm_ops bf5xx_pcm_tdm_ops = {
+       .open           = bf5xx_pcm_open,
+       .ioctl          = snd_pcm_lib_ioctl,
+       .hw_params      = bf5xx_pcm_hw_params,
+       .hw_free        = bf5xx_pcm_hw_free,
+       .prepare        = bf5xx_pcm_prepare,
+       .trigger        = bf5xx_pcm_trigger,
+       .pointer        = bf5xx_pcm_pointer,
+       .copy           = bf5xx_pcm_copy,
+       .silence        = bf5xx_pcm_silence,
+};
+
+static int bf5xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
+{
+       struct snd_pcm_substream *substream = pcm->streams[stream].substream;
+       struct snd_dma_buffer *buf = &substream->dma_buffer;
+       size_t size = bf5xx_pcm_hardware.buffer_bytes_max;
+
+       buf->dev.type = SNDRV_DMA_TYPE_DEV;
+       buf->dev.dev = pcm->card->dev;
+       buf->private_data = NULL;
+       buf->area = dma_alloc_coherent(pcm->card->dev, size * 4,
+               &buf->addr, GFP_KERNEL);
+       if (!buf->area) {
+               pr_err("Failed to allocate dma memory \
+                       Please increase uncached DMA memory region\n");
+               return -ENOMEM;
+       }
+       buf->bytes = size;
+
+       if (stream == SNDRV_PCM_STREAM_PLAYBACK)
+               sport_handle->tx_buf = buf->area;
+       else
+               sport_handle->rx_buf = buf->area;
+
+       return 0;
+}
+
+static void bf5xx_pcm_free_dma_buffers(struct snd_pcm *pcm)
+{
+       struct snd_pcm_substream *substream;
+       struct snd_dma_buffer *buf;
+       int stream;
+
+       for (stream = 0; stream < 2; stream++) {
+               substream = pcm->streams[stream].substream;
+               if (!substream)
+                       continue;
+
+               buf = &substream->dma_buffer;
+               if (!buf->area)
+                       continue;
+               dma_free_coherent(NULL, buf->bytes, buf->area, 0);
+               buf->area = NULL;
+       }
+       if (sport_handle)
+               sport_done(sport_handle);
+}
+
+static u64 bf5xx_pcm_dmamask = DMA_BIT_MASK(32);
+
+static int bf5xx_pcm_tdm_new(struct snd_card *card, struct snd_soc_dai *dai,
+       struct snd_pcm *pcm)
+{
+       int ret = 0;
+
+       if (!card->dev->dma_mask)
+               card->dev->dma_mask = &bf5xx_pcm_dmamask;
+       if (!card->dev->coherent_dma_mask)
+               card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
+
+       if (dai->playback.channels_min) {
+               ret = bf5xx_pcm_preallocate_dma_buffer(pcm,
+                       SNDRV_PCM_STREAM_PLAYBACK);
+               if (ret)
+                       goto out;
+       }
+
+       if (dai->capture.channels_min) {
+               ret = bf5xx_pcm_preallocate_dma_buffer(pcm,
+                       SNDRV_PCM_STREAM_CAPTURE);
+               if (ret)
+                       goto out;
+       }
+out:
+       return ret;
+}
+
+struct snd_soc_platform bf5xx_tdm_soc_platform = {
+       .name           = "bf5xx-audio",
+       .pcm_ops        = &bf5xx_pcm_tdm_ops,
+       .pcm_new        = bf5xx_pcm_tdm_new,
+       .pcm_free       = bf5xx_pcm_free_dma_buffers,
+};
+EXPORT_SYMBOL_GPL(bf5xx_tdm_soc_platform);
+
+static int __init bfin_pcm_tdm_init(void)
+{
+       return snd_soc_register_platform(&bf5xx_tdm_soc_platform);
+}
+module_init(bfin_pcm_tdm_init);
+
+static void __exit bfin_pcm_tdm_exit(void)
+{
+       snd_soc_unregister_platform(&bf5xx_tdm_soc_platform);
+}
+module_exit(bfin_pcm_tdm_exit);
+
+MODULE_AUTHOR("Barry Song");
+MODULE_DESCRIPTION("ADI Blackfin TDM PCM DMA module");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/blackfin/bf5xx-tdm-pcm.h b/sound/soc/blackfin/bf5xx-tdm-pcm.h
new file mode 100644 (file)
index 0000000..ddc5047
--- /dev/null
@@ -0,0 +1,21 @@
+/*
+ * sound/soc/blackfin/bf5xx-tdm-pcm.h -- ALSA PCM interface for the Blackfin
+ *
+ * Copyright 2009 Analog Device Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _BF5XX_TDM_PCM_H
+#define _BF5XX_TDM_PCM_H
+
+struct bf5xx_pcm_dma_params {
+       char *name;                     /* stream identifier */
+};
+
+/* platform data */
+extern struct snd_soc_platform bf5xx_tdm_soc_platform;
+
+#endif
diff --git a/sound/soc/blackfin/bf5xx-tdm.c b/sound/soc/blackfin/bf5xx-tdm.c
new file mode 100644 (file)
index 0000000..3096bad
--- /dev/null
@@ -0,0 +1,343 @@
+/*
+ * File:         sound/soc/blackfin/bf5xx-tdm.c
+ * Author:       Barry Song <Barry.Song@analog.com>
+ *
+ * Created:      Thurs June 04 2009
+ * Description:  Blackfin I2S(TDM) CPU DAI driver
+ *              Even though TDM mode can be as part of I2S DAI, but there
+ *              are so much difference in configuration and data flow,
+ *              it's very ugly to integrate I2S and TDM into a module
+ *
+ * Modified:
+ *               Copyright 2009 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+
+#include <asm/irq.h>
+#include <asm/portmux.h>
+#include <linux/mutex.h>
+#include <linux/gpio.h>
+
+#include "bf5xx-sport.h"
+#include "bf5xx-tdm.h"
+
+struct bf5xx_tdm_port {
+       u16 tcr1;
+       u16 rcr1;
+       u16 tcr2;
+       u16 rcr2;
+       int configured;
+};
+
+static struct bf5xx_tdm_port bf5xx_tdm;
+static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
+
+static struct sport_param sport_params[2] = {
+       {
+               .dma_rx_chan    = CH_SPORT0_RX,
+               .dma_tx_chan    = CH_SPORT0_TX,
+               .err_irq        = IRQ_SPORT0_ERROR,
+               .regs           = (struct sport_register *)SPORT0_TCR1,
+       },
+       {
+               .dma_rx_chan    = CH_SPORT1_RX,
+               .dma_tx_chan    = CH_SPORT1_TX,
+               .err_irq        = IRQ_SPORT1_ERROR,
+               .regs           = (struct sport_register *)SPORT1_TCR1,
+       }
+};
+
+/*
+ * Setting the TFS pin selector for SPORT 0 based on whether the selected
+ * port id F or G. If the port is F then no conflict should exist for the
+ * TFS. When Port G is selected and EMAC then there is a conflict between
+ * the PHY interrupt line and TFS.  Current settings prevent the conflict
+ * by ignoring the TFS pin when Port G is selected. This allows both
+ * ssm2602 using Port G and EMAC concurrently.
+ */
+#ifdef CONFIG_BF527_SPORT0_PORTF
+#define LOCAL_SPORT0_TFS (P_SPORT0_TFS)
+#else
+#define LOCAL_SPORT0_TFS (0)
+#endif
+
+static u16 sport_req[][7] = { {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+       P_SPORT0_DRPRI, P_SPORT0_RSCLK, LOCAL_SPORT0_TFS, 0},
+          {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, P_SPORT1_DRPRI,
+                  P_SPORT1_RSCLK, P_SPORT1_TFS, 0} };
+
+static int bf5xx_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
+       unsigned int fmt)
+{
+       int ret = 0;
+
+       /* interface format:support TDM,slave mode */
+       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+       case SND_SOC_DAIFMT_DSP_A:
+               break;
+       default:
+               printk(KERN_ERR "%s: Unknown DAI format type\n", __func__);
+               ret = -EINVAL;
+               break;
+       }
+
+       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+       case SND_SOC_DAIFMT_CBM_CFM:
+               break;
+       case SND_SOC_DAIFMT_CBS_CFS:
+       case SND_SOC_DAIFMT_CBM_CFS:
+       case SND_SOC_DAIFMT_CBS_CFM:
+               ret = -EINVAL;
+               break;
+       default:
+               printk(KERN_ERR "%s: Unknown DAI master type\n", __func__);
+               ret = -EINVAL;
+               break;
+       }
+
+       return ret;
+}
+
+static int bf5xx_tdm_hw_params(struct snd_pcm_substream *substream,
+       struct snd_pcm_hw_params *params,
+       struct snd_soc_dai *dai)
+{
+       int ret = 0;
+
+       bf5xx_tdm.tcr2 &= ~0x1f;
+       bf5xx_tdm.rcr2 &= ~0x1f;
+       switch (params_format(params)) {
+       case SNDRV_PCM_FORMAT_S32_LE:
+               bf5xx_tdm.tcr2 |= 31;
+               bf5xx_tdm.rcr2 |= 31;
+               sport_handle->wdsize = 4;
+               break;
+               /* at present, we only support 32bit transfer */
+       default:
+               pr_err("not supported PCM format yet\n");
+               return -EINVAL;
+               break;
+       }
+
+       if (!bf5xx_tdm.configured) {
+               /*
+                * TX and RX are not independent,they are enabled at the
+                * same time, even if only one side is running. So, we
+                * need to configure both of them at the time when the first
+                * stream is opened.
+                *
+                * CPU DAI:slave mode.
+                */
+               ret = sport_config_rx(sport_handle, bf5xx_tdm.rcr1,
+                       bf5xx_tdm.rcr2, 0, 0);
+               if (ret) {
+                       pr_err("SPORT is busy!\n");
+                       return -EBUSY;
+               }
+
+               ret = sport_config_tx(sport_handle, bf5xx_tdm.tcr1,
+                       bf5xx_tdm.tcr2, 0, 0);
+               if (ret) {
+                       pr_err("SPORT is busy!\n");
+                       return -EBUSY;
+               }
+
+               bf5xx_tdm.configured = 1;
+       }
+
+       return 0;
+}
+
+static void bf5xx_tdm_shutdown(struct snd_pcm_substream *substream,
+       struct snd_soc_dai *dai)
+{
+       /* No active stream, SPORT is allowed to be configured again. */
+       if (!dai->active)
+               bf5xx_tdm.configured = 0;
+}
+
+#ifdef CONFIG_PM
+static int bf5xx_tdm_suspend(struct snd_soc_dai *dai)
+{
+       struct sport_device *sport =
+               (struct sport_device *)dai->private_data;
+
+       if (!dai->active)
+               return 0;
+       if (dai->capture.active)
+               sport_rx_stop(sport);
+       if (dai->playback.active)
+               sport_tx_stop(sport);
+       return 0;
+}
+
+static int bf5xx_tdm_resume(struct snd_soc_dai *dai)
+{
+       int ret;
+       struct sport_device *sport =
+               (struct sport_device *)dai->private_data;
+
+       if (!dai->active)
+               return 0;
+
+       ret = sport_set_multichannel(sport, 8, 0xFF, 1);
+       if (ret) {
+               pr_err("SPORT is busy!\n");
+               ret = -EBUSY;
+       }
+
+       ret = sport_config_rx(sport, IRFS, 0x1F, 0, 0);
+       if (ret) {
+               pr_err("SPORT is busy!\n");
+               ret = -EBUSY;
+       }
+
+       ret = sport_config_tx(sport, ITFS, 0x1F, 0, 0);
+       if (ret) {
+               pr_err("SPORT is busy!\n");
+               ret = -EBUSY;
+       }
+
+       return 0;
+}
+
+#else
+#define bf5xx_tdm_suspend      NULL
+#define bf5xx_tdm_resume       NULL
+#endif
+
+static struct snd_soc_dai_ops bf5xx_tdm_dai_ops = {
+       .hw_params      = bf5xx_tdm_hw_params,
+       .set_fmt        = bf5xx_tdm_set_dai_fmt,
+       .shutdown       = bf5xx_tdm_shutdown,
+};
+
+struct snd_soc_dai bf5xx_tdm_dai = {
+       .name = "bf5xx-tdm",
+       .id = 0,
+       .suspend = bf5xx_tdm_suspend,
+       .resume = bf5xx_tdm_resume,
+       .playback = {
+               .channels_min = 2,
+               .channels_max = 8,
+               .rates = SNDRV_PCM_RATE_48000,
+               .formats = SNDRV_PCM_FMTBIT_S32_LE,},
+       .capture = {
+               .channels_min = 2,
+               .channels_max = 8,
+               .rates = SNDRV_PCM_RATE_48000,
+               .formats = SNDRV_PCM_FMTBIT_S32_LE,},
+       .ops = &bf5xx_tdm_dai_ops,
+};
+EXPORT_SYMBOL_GPL(bf5xx_tdm_dai);
+
+static int __devinit bfin_tdm_probe(struct platform_device *pdev)
+{
+       int ret = 0;
+
+       if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
+               pr_err("Requesting Peripherals failed\n");
+               return -EFAULT;
+       }
+
+       /* request DMA for SPORT */
+       sport_handle = sport_init(&sport_params[sport_num], 4, \
+               8 * sizeof(u32), NULL);
+       if (!sport_handle) {
+               peripheral_free_list(&sport_req[sport_num][0]);
+               return -ENODEV;
+       }
+
+       /* SPORT works in TDM mode */
+       ret = sport_set_multichannel(sport_handle, 8, 0xFF, 1);
+       if (ret) {
+               pr_err("SPORT is busy!\n");
+               ret = -EBUSY;
+               goto sport_config_err;
+       }
+
+       ret = sport_config_rx(sport_handle, IRFS, 0x1F, 0, 0);
+       if (ret) {
+               pr_err("SPORT is busy!\n");
+               ret = -EBUSY;
+               goto sport_config_err;
+       }
+
+       ret = sport_config_tx(sport_handle, ITFS, 0x1F, 0, 0);
+       if (ret) {
+               pr_err("SPORT is busy!\n");
+               ret = -EBUSY;
+               goto sport_config_err;
+       }
+
+       ret = snd_soc_register_dai(&bf5xx_tdm_dai);
+       if (ret) {
+               pr_err("Failed to register DAI: %d\n", ret);
+               goto sport_config_err;
+       }
+       return 0;
+
+sport_config_err:
+       peripheral_free_list(&sport_req[sport_num][0]);
+       return ret;
+}
+
+static int __devexit bfin_tdm_remove(struct platform_device *pdev)
+{
+       peripheral_free_list(&sport_req[sport_num][0]);
+       snd_soc_unregister_dai(&bf5xx_tdm_dai);
+
+       return 0;
+}
+
+static struct platform_driver bfin_tdm_driver = {
+       .probe  = bfin_tdm_probe,
+       .remove = __devexit_p(bfin_tdm_remove),
+       .driver = {
+               .name   = "bfin-tdm",
+               .owner  = THIS_MODULE,
+       },
+};
+
+static int __init bfin_tdm_init(void)
+{
+       return platform_driver_register(&bfin_tdm_driver);
+}
+module_init(bfin_tdm_init);
+
+static void __exit bfin_tdm_exit(void)
+{
+       platform_driver_unregister(&bfin_tdm_driver);
+}
+module_exit(bfin_tdm_exit);
+
+/* Module information */
+MODULE_AUTHOR("Barry Song");
+MODULE_DESCRIPTION("TDM driver for ADI Blackfin");
+MODULE_LICENSE("GPL");
+
diff --git a/sound/soc/blackfin/bf5xx-tdm.h b/sound/soc/blackfin/bf5xx-tdm.h
new file mode 100644 (file)
index 0000000..618ec3d
--- /dev/null
@@ -0,0 +1,14 @@
+/*
+ * sound/soc/blackfin/bf5xx-tdm.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _BF5XX_TDM_H
+#define _BF5XX_TDM_H
+
+extern struct snd_soc_dai bf5xx_tdm_dai;
+
+#endif
index bbc97fd..0edca93 100644 (file)
@@ -12,11 +12,15 @@ config SND_SOC_ALL_CODECS
        tristate "Build all ASoC CODEC drivers"
        select SND_SOC_L3
        select SND_SOC_AC97_CODEC if SND_SOC_AC97_BUS
+       select SND_SOC_AD1836 if SPI_MASTER
+       select SND_SOC_AD1938 if SPI_MASTER
        select SND_SOC_AD1980 if SND_SOC_AC97_BUS
        select SND_SOC_AD73311 if I2C
        select SND_SOC_AK4104 if SPI_MASTER
        select SND_SOC_AK4535 if I2C
+       select SND_SOC_AK4642 if I2C
        select SND_SOC_CS4270 if I2C
+       select SND_SOC_MAX9877 if I2C
        select SND_SOC_PCM3008
        select SND_SOC_SPDIF
        select SND_SOC_SSM2602 if I2C
@@ -30,18 +34,23 @@ config SND_SOC_ALL_CODECS
        select SND_SOC_WM8350 if MFD_WM8350
        select SND_SOC_WM8400 if MFD_WM8400
        select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI
+       select SND_SOC_WM8523 if I2C
        select SND_SOC_WM8580 if I2C
        select SND_SOC_WM8728 if SND_SOC_I2C_AND_SPI
        select SND_SOC_WM8731 if SND_SOC_I2C_AND_SPI
        select SND_SOC_WM8750 if SND_SOC_I2C_AND_SPI
        select SND_SOC_WM8753 if SND_SOC_I2C_AND_SPI
+       select SND_SOC_WM8776 if SND_SOC_I2C_AND_SPI
        select SND_SOC_WM8900 if I2C
        select SND_SOC_WM8903 if I2C
        select SND_SOC_WM8940 if I2C
        select SND_SOC_WM8960 if I2C
+       select SND_SOC_WM8961 if I2C
        select SND_SOC_WM8971 if I2C
+       select SND_SOC_WM8974 if I2C
        select SND_SOC_WM8988 if SND_SOC_I2C_AND_SPI
        select SND_SOC_WM8990 if I2C
+       select SND_SOC_WM8993 if I2C
        select SND_SOC_WM9081 if I2C
        select SND_SOC_WM9705 if SND_SOC_AC97_BUS
        select SND_SOC_WM9712 if SND_SOC_AC97_BUS
@@ -57,11 +66,21 @@ config SND_SOC_ALL_CODECS
 
           If unsure select "N".
 
+config SND_SOC_WM_HUBS
+       tristate
+       default y if SND_SOC_WM8993=y
+       default m if SND_SOC_WM8993=m
 
 config SND_SOC_AC97_CODEC
        tristate
        select SND_AC97_CODEC
 
+config SND_SOC_AD1836
+       tristate
+
+config SND_SOC_AD1938
+       tristate
+
 config SND_SOC_AD1980
        tristate
 
@@ -74,6 +93,9 @@ config SND_SOC_AK4104
 config SND_SOC_AK4535
        tristate
 
+config SND_SOC_AK4642
+       tristate
+
 # Cirrus Logic CS4270 Codec
 config SND_SOC_CS4270
        tristate
@@ -86,6 +108,9 @@ config SND_SOC_CS4270_VD33_ERRATA
        bool
        depends on SND_SOC_CS4270
 
+config SND_SOC_CX20442
+       tristate
+
 config SND_SOC_L3
        tristate
 
@@ -129,6 +154,9 @@ config SND_SOC_WM8400
 config SND_SOC_WM8510
        tristate
 
+config SND_SOC_WM8523
+       tristate
+
 config SND_SOC_WM8580
        tristate
 
@@ -144,6 +172,9 @@ config SND_SOC_WM8750
 config SND_SOC_WM8753
        tristate
 
+config SND_SOC_WM8776
+       tristate
+
 config SND_SOC_WM8900
        tristate
 
@@ -156,15 +187,24 @@ config SND_SOC_WM8940
 config SND_SOC_WM8960
        tristate
 
+config SND_SOC_WM8961
+       tristate
+
 config SND_SOC_WM8971
        tristate
 
+config SND_SOC_WM8974
+       tristate
+
 config SND_SOC_WM8988
        tristate
 
 config SND_SOC_WM8990
        tristate
 
+config SND_SOC_WM8993
+       tristate
+
 config SND_SOC_WM9081
        tristate
 
@@ -176,3 +216,7 @@ config SND_SOC_WM9712
 
 config SND_SOC_WM9713
        tristate
+
+# Amp
+config SND_SOC_MAX9877
+       tristate
index 8b75305..fb4af28 100644 (file)
@@ -1,9 +1,13 @@
 snd-soc-ac97-objs := ac97.o
+snd-soc-ad1836-objs := ad1836.o
+snd-soc-ad1938-objs := ad1938.o
 snd-soc-ad1980-objs := ad1980.o
 snd-soc-ad73311-objs := ad73311.o
 snd-soc-ak4104-objs := ak4104.o
 snd-soc-ak4535-objs := ak4535.o
+snd-soc-ak4642-objs := ak4642.o
 snd-soc-cs4270-objs := cs4270.o
+snd-soc-cx20442-objs := cx20442.o
 snd-soc-l3-objs := l3.o
 snd-soc-pcm3008-objs := pcm3008.o
 snd-soc-spdif-objs := spdif_transciever.o
@@ -18,29 +22,42 @@ snd-soc-uda1380-objs := uda1380.o
 snd-soc-wm8350-objs := wm8350.o
 snd-soc-wm8400-objs := wm8400.o
 snd-soc-wm8510-objs := wm8510.o
+snd-soc-wm8523-objs := wm8523.o
 snd-soc-wm8580-objs := wm8580.o
 snd-soc-wm8728-objs := wm8728.o
 snd-soc-wm8731-objs := wm8731.o
 snd-soc-wm8750-objs := wm8750.o
 snd-soc-wm8753-objs := wm8753.o
+snd-soc-wm8776-objs := wm8776.o
 snd-soc-wm8900-objs := wm8900.o
 snd-soc-wm8903-objs := wm8903.o
 snd-soc-wm8940-objs := wm8940.o
 snd-soc-wm8960-objs := wm8960.o
+snd-soc-wm8961-objs := wm8961.o
 snd-soc-wm8971-objs := wm8971.o
+snd-soc-wm8974-objs := wm8974.o
 snd-soc-wm8988-objs := wm8988.o
 snd-soc-wm8990-objs := wm8990.o
+snd-soc-wm8993-objs := wm8993.o
 snd-soc-wm9081-objs := wm9081.o
 snd-soc-wm9705-objs := wm9705.o
 snd-soc-wm9712-objs := wm9712.o
 snd-soc-wm9713-objs := wm9713.o
+snd-soc-wm-hubs-objs := wm_hubs.o
+
+# Amp
+snd-soc-max9877-objs := max9877.o
 
 obj-$(CONFIG_SND_SOC_AC97_CODEC)       += snd-soc-ac97.o
+obj-$(CONFIG_SND_SOC_AD1836)   += snd-soc-ad1836.o
+obj-$(CONFIG_SND_SOC_AD1938)   += snd-soc-ad1938.o
 obj-$(CONFIG_SND_SOC_AD1980)   += snd-soc-ad1980.o
 obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o
 obj-$(CONFIG_SND_SOC_AK4104)   += snd-soc-ak4104.o
 obj-$(CONFIG_SND_SOC_AK4535)   += snd-soc-ak4535.o
+obj-$(CONFIG_SND_SOC_AK4642)   += snd-soc-ak4642.o
 obj-$(CONFIG_SND_SOC_CS4270)   += snd-soc-cs4270.o
+obj-$(CONFIG_SND_SOC_CX20442)  += snd-soc-cx20442.o
 obj-$(CONFIG_SND_SOC_L3)       += snd-soc-l3.o
 obj-$(CONFIG_SND_SOC_PCM3008)  += snd-soc-pcm3008.o
 obj-$(CONFIG_SND_SOC_SPDIF)    += snd-soc-spdif.o
@@ -55,19 +72,28 @@ obj-$(CONFIG_SND_SOC_UDA1380)       += snd-soc-uda1380.o
 obj-$(CONFIG_SND_SOC_WM8350)   += snd-soc-wm8350.o
 obj-$(CONFIG_SND_SOC_WM8400)   += snd-soc-wm8400.o
 obj-$(CONFIG_SND_SOC_WM8510)   += snd-soc-wm8510.o
+obj-$(CONFIG_SND_SOC_WM8523)   += snd-soc-wm8523.o
 obj-$(CONFIG_SND_SOC_WM8580)   += snd-soc-wm8580.o
 obj-$(CONFIG_SND_SOC_WM8728)   += snd-soc-wm8728.o
 obj-$(CONFIG_SND_SOC_WM8731)   += snd-soc-wm8731.o
 obj-$(CONFIG_SND_SOC_WM8750)   += snd-soc-wm8750.o
 obj-$(CONFIG_SND_SOC_WM8753)   += snd-soc-wm8753.o
+obj-$(CONFIG_SND_SOC_WM8776)   += snd-soc-wm8776.o
 obj-$(CONFIG_SND_SOC_WM8900)   += snd-soc-wm8900.o
 obj-$(CONFIG_SND_SOC_WM8903)   += snd-soc-wm8903.o
 obj-$(CONFIG_SND_SOC_WM8971)   += snd-soc-wm8971.o
+obj-$(CONFIG_SND_SOC_WM8974)   += snd-soc-wm8974.o
 obj-$(CONFIG_SND_SOC_WM8940)   += snd-soc-wm8940.o
 obj-$(CONFIG_SND_SOC_WM8960)   += snd-soc-wm8960.o
+obj-$(CONFIG_SND_SOC_WM8961)   += snd-soc-wm8961.o
 obj-$(CONFIG_SND_SOC_WM8988)   += snd-soc-wm8988.o
 obj-$(CONFIG_SND_SOC_WM8990)   += snd-soc-wm8990.o
+obj-$(CONFIG_SND_SOC_WM8993)   += snd-soc-wm8993.o
 obj-$(CONFIG_SND_SOC_WM9081)   += snd-soc-wm9081.o
 obj-$(CONFIG_SND_SOC_WM9705)   += snd-soc-wm9705.o
 obj-$(CONFIG_SND_SOC_WM9712)   += snd-soc-wm9712.o
 obj-$(CONFIG_SND_SOC_WM9713)   += snd-soc-wm9713.o
+obj-$(CONFIG_SND_SOC_WM_HUBS)  += snd-soc-wm-hubs.o
+
+# Amp
+obj-$(CONFIG_SND_SOC_MAX9877)  += snd-soc-max9877.o
diff --git a/sound/soc/codecs/ad1836.c b/sound/soc/codecs/ad1836.c
new file mode 100644 (file)
index 0000000..3612bb9
--- /dev/null
@@ -0,0 +1,446 @@
+/*
+ * File:         sound/soc/codecs/ad1836.c
+ * Author:       Barry Song <Barry.Song@analog.com>
+ *
+ * Created:      Aug 04 2009
+ * Description:  Driver for AD1836 sound chip
+ *
+ * Modified:
+ *               Copyright 2009 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+#include <sound/tlv.h>
+#include <sound/soc-dapm.h>
+#include <linux/spi/spi.h>
+#include "ad1836.h"
+
+/* codec private data */
+struct ad1836_priv {
+       struct snd_soc_codec codec;
+       u16 reg_cache[AD1836_NUM_REGS];
+};
+
+static struct snd_soc_codec *ad1836_codec;
+struct snd_soc_codec_device soc_codec_dev_ad1836;
+static int ad1836_register(struct ad1836_priv *ad1836);
+static void ad1836_unregister(struct ad1836_priv *ad1836);
+
+/*
+ * AD1836 volume/mute/de-emphasis etc. controls
+ */
+static const char *ad1836_deemp[] = {"None", "44.1kHz", "32kHz", "48kHz"};
+
+static const struct soc_enum ad1836_deemp_enum =
+       SOC_ENUM_SINGLE(AD1836_DAC_CTRL1, 8, 4, ad1836_deemp);
+
+static const struct snd_kcontrol_new ad1836_snd_controls[] = {
+       /* DAC volume control */
+       SOC_DOUBLE_R("DAC1 Volume", AD1836_DAC_L1_VOL,
+                       AD1836_DAC_R1_VOL, 0, 0x3FF, 0),
+       SOC_DOUBLE_R("DAC2 Volume", AD1836_DAC_L2_VOL,
+                       AD1836_DAC_R2_VOL, 0, 0x3FF, 0),
+       SOC_DOUBLE_R("DAC3 Volume", AD1836_DAC_L3_VOL,
+                       AD1836_DAC_R3_VOL, 0, 0x3FF, 0),
+
+       /* ADC switch control */
+       SOC_DOUBLE("ADC1 Switch", AD1836_ADC_CTRL2, AD1836_ADCL1_MUTE,
+               AD1836_ADCR1_MUTE, 1, 1),
+       SOC_DOUBLE("ADC2 Switch", AD1836_ADC_CTRL2, AD1836_ADCL2_MUTE,
+               AD1836_ADCR2_MUTE, 1, 1),
+
+       /* DAC switch control */
+       SOC_DOUBLE("DAC1 Switch", AD1836_DAC_CTRL2, AD1836_DACL1_MUTE,
+               AD1836_DACR1_MUTE, 1, 1),
+       SOC_DOUBLE("DAC2 Switch", AD1836_DAC_CTRL2, AD1836_DACL2_MUTE,
+               AD1836_DACR2_MUTE, 1, 1),
+       SOC_DOUBLE("DAC3 Switch", AD1836_DAC_CTRL2, AD1836_DACL3_MUTE,
+               AD1836_DACR3_MUTE, 1, 1),
+
+       /* ADC high-pass filter */
+       SOC_SINGLE("ADC High Pass Filter Switch", AD1836_ADC_CTRL1,
+                       AD1836_ADC_HIGHPASS_FILTER, 1, 0),
+
+       /* DAC de-emphasis */
+       SOC_ENUM("Playback Deemphasis", ad1836_deemp_enum),
+};
+
+static const struct snd_soc_dapm_widget ad1836_dapm_widgets[] = {
+       SND_SOC_DAPM_DAC("DAC", "Playback", AD1836_DAC_CTRL1,
+                               AD1836_DAC_POWERDOWN, 1),
+       SND_SOC_DAPM_ADC("ADC", "Capture", SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_SUPPLY("ADC_PWR", AD1836_ADC_CTRL1,
+                               AD1836_ADC_POWERDOWN, 1, NULL, 0),
+       SND_SOC_DAPM_OUTPUT("DAC1OUT"),
+       SND_SOC_DAPM_OUTPUT("DAC2OUT"),
+       SND_SOC_DAPM_OUTPUT("DAC3OUT"),
+       SND_SOC_DAPM_INPUT("ADC1IN"),
+       SND_SOC_DAPM_INPUT("ADC2IN"),
+};
+
+static const struct snd_soc_dapm_route audio_paths[] = {
+       { "DAC", NULL, "ADC_PWR" },
+       { "ADC", NULL, "ADC_PWR" },
+       { "DAC1OUT", "DAC1 Switch", "DAC" },
+       { "DAC2OUT", "DAC2 Switch", "DAC" },
+       { "DAC3OUT", "DAC3 Switch", "DAC" },
+       { "ADC", "ADC1 Switch", "ADC1IN" },
+       { "ADC", "ADC2 Switch", "ADC2IN" },
+};
+
+/*
+ * DAI ops entries
+ */
+
+static int ad1836_set_dai_fmt(struct snd_soc_dai *codec_dai,
+               unsigned int fmt)
+{
+       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+       /* at present, we support adc aux mode to interface with
+        * blackfin sport tdm mode
+        */
+       case SND_SOC_DAIFMT_DSP_A:
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+       case SND_SOC_DAIFMT_IB_IF:
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+       /* ALCLK,ABCLK are both output, AD1836 can only be master */
+       case SND_SOC_DAIFMT_CBM_CFM:
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return 0;
+}
+
+static int ad1836_hw_params(struct snd_pcm_substream *substream,
+               struct snd_pcm_hw_params *params,
+               struct snd_soc_dai *dai)
+{
+       int word_len = 0;
+
+       struct snd_soc_pcm_runtime *rtd = substream->private_data;
+       struct snd_soc_device *socdev = rtd->socdev;
+       struct snd_soc_codec *codec = socdev->card->codec;
+
+       /* bit size */
+       switch (params_format(params)) {
+       case SNDRV_PCM_FORMAT_S16_LE:
+               word_len = 3;
+               break;
+       case SNDRV_PCM_FORMAT_S20_3LE:
+               word_len = 1;
+               break;
+       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S32_LE:
+               word_len = 0;
+               break;
+       }
+
+       snd_soc_update_bits(codec, AD1836_DAC_CTRL1,
+               AD1836_DAC_WORD_LEN_MASK, word_len);
+
+       snd_soc_update_bits(codec, AD1836_ADC_CTRL2,
+               AD1836_ADC_WORD_LEN_MASK, word_len);
+
+       return 0;
+}
+
+
+/*
+ * interface to read/write ad1836 register
+ */
+#define AD1836_SPI_REG_SHFT 12
+#define AD1836_SPI_READ     (1 << 11)
+#define AD1836_SPI_VAL_MSK  0x3FF
+
+/*
+ * write to the ad1836 register space
+ */
+
+static int ad1836_write_reg(struct snd_soc_codec *codec, unsigned int reg,
+               unsigned int value)
+{
+       u16 *reg_cache = codec->reg_cache;
+       int ret = 0;
+
+       if (value != reg_cache[reg]) {
+               unsigned short buf;
+               struct spi_transfer t = {
+                       .tx_buf = &buf,
+                       .len = 2,
+               };
+               struct spi_message m;
+
+               buf = (reg << AD1836_SPI_REG_SHFT) |
+                       (value & AD1836_SPI_VAL_MSK);
+               spi_message_init(&m);
+               spi_message_add_tail(&t, &m);
+               ret = spi_sync(codec->control_data, &m);
+               if (ret == 0)
+                       reg_cache[reg] = value;
+       }
+
+       return ret;
+}
+
+/*
+ * read from the ad1836 register space cache
+ */
+static unsigned int ad1836_read_reg_cache(struct snd_soc_codec *codec,
+                                         unsigned int reg)
+{
+       u16 *reg_cache = codec->reg_cache;
+
+       if (reg >= codec->reg_cache_size)
+               return -EINVAL;
+
+       return reg_cache[reg];
+}
+
+static int __devinit ad1836_spi_probe(struct spi_device *spi)
+{
+       struct snd_soc_codec *codec;
+       struct ad1836_priv *ad1836;
+
+       ad1836 = kzalloc(sizeof(struct ad1836_priv), GFP_KERNEL);
+       if (ad1836 == NULL)
+               return -ENOMEM;
+
+       codec = &ad1836->codec;
+       codec->control_data = spi;
+       codec->dev = &spi->dev;
+
+       dev_set_drvdata(&spi->dev, ad1836);
+
+       return ad1836_register(ad1836);
+}
+
+static int __devexit ad1836_spi_remove(struct spi_device *spi)
+{
+       struct ad1836_priv *ad1836 = dev_get_drvdata(&spi->dev);
+
+       ad1836_unregister(ad1836);
+       return 0;
+}
+
+static struct spi_driver ad1836_spi_driver = {
+       .driver = {
+               .name   = "ad1836-spi",
+               .bus    = &spi_bus_type,
+               .owner  = THIS_MODULE,
+       },
+       .probe          = ad1836_spi_probe,
+       .remove         = __devexit_p(ad1836_spi_remove),
+};
+
+static struct snd_soc_dai_ops ad1836_dai_ops = {
+       .hw_params = ad1836_hw_params,
+       .set_fmt = ad1836_set_dai_fmt,
+};
+
+/* codec DAI instance */
+struct snd_soc_dai ad1836_dai = {
+       .name = "AD1836",
+       .playback = {
+               .stream_name = "Playback",
+               .channels_min = 2,
+               .channels_max = 6,
+               .rates = SNDRV_PCM_RATE_48000,
+               .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
+                       SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
+       },
+       .capture = {
+               .stream_name = "Capture",
+               .channels_min = 2,
+               .channels_max = 4,
+               .rates = SNDRV_PCM_RATE_48000,
+               .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S16_LE |
+                       SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE,
+       },
+       .ops = &ad1836_dai_ops,
+};
+EXPORT_SYMBOL_GPL(ad1836_dai);
+
+static int ad1836_register(struct ad1836_priv *ad1836)
+{
+       int ret;
+       struct snd_soc_codec *codec = &ad1836->codec;
+
+       if (ad1836_codec) {
+               dev_err(codec->dev, "Another ad1836 is registered\n");
+               return -EINVAL;
+       }
+
+       mutex_init(&codec->mutex);
+       INIT_LIST_HEAD(&codec->dapm_widgets);
+       INIT_LIST_HEAD(&codec->dapm_paths);
+       codec->private_data = ad1836;
+       codec->reg_cache = ad1836->reg_cache;
+       codec->reg_cache_size = AD1836_NUM_REGS;
+       codec->name = "AD1836";
+       codec->owner = THIS_MODULE;
+       codec->dai = &ad1836_dai;
+       codec->num_dai = 1;
+       codec->write = ad1836_write_reg;
+       codec->read = ad1836_read_reg_cache;
+       INIT_LIST_HEAD(&codec->dapm_widgets);
+       INIT_LIST_HEAD(&codec->dapm_paths);
+
+       ad1836_dai.dev = codec->dev;
+       ad1836_codec = codec;
+
+       /* default setting for ad1836 */
+       /* de-emphasis: 48kHz, power-on dac */
+       codec->write(codec, AD1836_DAC_CTRL1, 0x300);
+       /* unmute dac channels */
+       codec->write(codec, AD1836_DAC_CTRL2, 0x0);
+       /* high-pass filter enable, power-on adc */
+       codec->write(codec, AD1836_ADC_CTRL1, 0x100);
+       /* unmute adc channles, adc aux mode */
+       codec->write(codec, AD1836_ADC_CTRL2, 0x180);
+       /* left/right diff:PGA/MUX */
+       codec->write(codec, AD1836_ADC_CTRL3, 0x3A);
+       /* volume */
+       codec->write(codec, AD1836_DAC_L1_VOL, 0x3FF);
+       codec->write(codec, AD1836_DAC_R1_VOL, 0x3FF);
+       codec->write(codec, AD1836_DAC_L2_VOL, 0x3FF);
+       codec->write(codec, AD1836_DAC_R2_VOL, 0x3FF);
+       codec->write(codec, AD1836_DAC_L3_VOL, 0x3FF);
+       codec->write(codec, AD1836_DAC_R3_VOL, 0x3FF);
+
+       ret = snd_soc_register_codec(codec);
+       if (ret != 0) {
+               dev_err(codec->dev, "Failed to register codec: %d\n", ret);
+