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(parent: b276268) | patch
x86, mce, cmci: avoid potential reentry of threshold interrupt
authorAndi Kleen <andi@firstfloor.org>
Thu, 12 Feb 2009 12:49:32 +0000 (13:49 +0100)
committerH. Peter Anvin <hpa@zytor.com>
Tue, 24 Feb 2009 21:24:42 +0000 (13:24 -0800)
commitf9695df42cdbca78530b4458c38ecfdd0bb90079
tree308cf4c9eeaae84663559a47f5797072fd0bce65tree | snapshot
parentb276268631af3a1b0df871e10d19d492f0513d4bcommit | diff
x86, mce, cmci: avoid potential reentry of threshold interrupt

Impact: minor bugfix

The threshold handler on AMD (and soon on Intel) could be theoretically
reentered by the hardware. This could lead to corrupted events
because the machine check poll code assumes it is not reentered.

Move the APIC ACK to the end of the interrupt handler to let
the hardware avoid that.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/kernel/cpu/mcheck/threshold.c diff | blob | history
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