[ARM] Marvell Feroceon CPU core support
authorAssaf Hoffman <hoffman@marvell.com>
Tue, 23 Oct 2007 19:14:41 +0000 (15:14 -0400)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 26 Jan 2008 15:03:38 +0000 (15:03 +0000)
commite50d64097b6e63278789ee3a4394d127bd6e4254
treea33325c4ea814bdcd1ef187559b9ec751ae553e2
parent2fd2b1242810fb4d2ba36548fecc1f005c36770c
[ARM] Marvell Feroceon CPU core support

The Feroceon is a family of independent ARMv5TE compliant CPU core
implementations, supporting a variable depth pipeline and out-of-order
execution.  The Feroceon is configurable with VFP support, and the
later models in the series are superscalar with up to two instructions
per clock cycle.

This patch adds the initial low-level cache/TLB handling for this core.

Signed-off-by: Assaf Hoffman <hoffman@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/Kconfig
arch/arm/mm/Kconfig
arch/arm/mm/Makefile
arch/arm/mm/proc-feroceon.S [new file with mode: 0644]
include/asm-arm/cacheflush.h
include/asm-arm/proc-fns.h