[PATCH] i386: i386 make NMI use PERFCTR1 for architectural perfmon (take 2)
authorStephane Eranian <eranian@hpl.hp.com>
Wed, 2 May 2007 17:27:05 +0000 (19:27 +0200)
committerAndi Kleen <andi@basil.nowhere.org>
Wed, 2 May 2007 17:27:05 +0000 (19:27 +0200)
commitbf8696ed6dfa561198b4736deaf11ab68dcc4845
tree54409e3dd141d468ab0f0c611ebb32f1d67af817
parent803d80f65038f77c4681a0d7708e9d693e68aaa8
[PATCH] i386: i386 make NMI use PERFCTR1 for architectural perfmon (take 2)

Hello,

This patch against 2.6.20-git14 makes the NMI watchdog use PERFSEL1/PERFCTR1
instead of PERFSEL0/PERFCTR0 on processors supporting Intel architectural
perfmon, such as Intel Core 2. Although all PMU events can work on
both counters, the Precise Event-Based Sampling (PEBS) requires that the
event be in PERFCTR0 to work correctly (see section 18.14.4.1 in the
IA32 SDM Vol 3b).

A similar patch for x86-64 is to follow.

Changelog:
        - make the i386 NMI watchdog use PERFSEL1/PERFCTR1 instead of PERFSEL0/PERFCTR0
          on processors supporting the Intel architectural perfmon (e.g. Core 2 Duo).
          This allows PEBS to work when the NMI watchdog is active.

signed-off-by: stephane eranian <eranian@hpl.hp.com>

Signed-off-by: Andi Kleen <ak@suse.de>
arch/i386/kernel/nmi.c