ASoC: Intel: Add Baytrail SST ID and Baytrail specific register bits
authorJarkko Nikula <jarkko.nikula@linux.intel.com>
Mon, 24 Feb 2014 15:26:56 +0000 (17:26 +0200)
committerMark Brown <broonie@linaro.org>
Tue, 25 Feb 2014 04:44:27 +0000 (13:44 +0900)
commit6ef20de726bd68b68a925cc63f12e0ed655c6b56
tree400b9d67602a24dbb2b1afa9f3ae0c568c496814
parent90931b9eaed9aaf772784a93da320cf10713effa
ASoC: Intel: Add Baytrail SST ID and Baytrail specific register bits

While the SHIM register addresses in Baytrail are the same than Haswell and
Broadwell their register size is 64-bit and some bits are different.

This patch adds the SST device ID for Baytrail and Baytrail specific
SHIM bit definitions.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Liam Girdwood <liam.r.girdwood@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/intel/sst-dsp.h