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ASoC: fsl_esai: Only bypass sck_div for EXTAL source
authorNicolin Chen <Guangyu.Chen@freescale.com>
Tue, 6 May 2014 08:56:00 +0000 (16:56 +0800)
committerMark Brown <broonie@linaro.org>
Mon, 12 May 2014 22:13:13 +0000 (23:13 +0100)
commit57ebbcafab0ce8cce4493c6a243ecdd7066e6ef1
treef1c3fc761b5e43b85d319f580f9f04991125154dtree | snapshot
parent89e47f62cf3eea7ad5e3d7d72ea846be37d6e352commit | diff
ASoC: fsl_esai: Only bypass sck_div for EXTAL source

ESAI can only output EXTAL clock source directly. But for FSYS clock source,
ESAI can not output it without getting through PSR PM dividers.

So this patch adds an extra check in the code.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/fsl/fsl_esai.c diff | blob | history
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