ARM: Add Tauros2 L2 cache controller support
authorLennert Buytenhek <buytenh@marvell.com>
Tue, 24 Nov 2009 17:33:52 +0000 (19:33 +0200)
committerNicolas Pitre <nico@fluxnic.net>
Fri, 27 Nov 2009 20:43:21 +0000 (15:43 -0500)
commit573a652fb0da50a1ff3fca2c67afd81138fd06d2
treee393e667f733db56447c266d45e58accf141894f
parentedabd38e1a017e922e3e3b485ee3ddb4df433aa4
ARM: Add Tauros2 L2 cache controller support

Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
arch/arm/configs/dove_defconfig
arch/arm/include/asm/hardware/cache-tauros2.h [new file with mode: 0644]
arch/arm/mach-dove/common.c
arch/arm/mm/Kconfig
arch/arm/mm/Makefile
arch/arm/mm/cache-tauros2.c [new file with mode: 0644]