drm/i915: add PLL sharing support to handle 3 pipes
authorJesse Barnes <jbarnes@virtuousgeek.org>
Wed, 12 Oct 2011 16:51:31 +0000 (09:51 -0700)
committerKeith Packard <keithp@keithp.com>
Fri, 21 Oct 2011 06:13:23 +0000 (23:13 -0700)
commit4b645f14021871e06ce96c359bbdf0b48248c26e
treea5d1522a25c1d4279981e68ee0d7f281d62947aa
parentd3ccbe8670520fc61cbe974c97761b0dfc57f6df
drm/i915: add PLL sharing support to handle 3 pipes

Add two new fields to the intel_crtc struct for 3 pipe support: no_pll
and use_pll_a.  The no_pll field is only set on the 3rd pipe to indicate
that it doesn't have a PLL of its own and so shouldn't try to write the
main PLL regs.  The use_pll_a field controls which PLL pipe 3 will
share, A or B.  The core code will try to share PLLs with whichever pipe
has the same timings, rejecting the mode set if none is found.  This
means that pipe 3 must always be set after one of the other pipes has
been configured with real PLL settings.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h