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(parent: 8a9fab2) | patch
cxgb3 - TP SRAM update
authorDivy Le Ray <divy@chelsio.com>
Thu, 31 May 2007 04:10:58 +0000 (21:10 -0700)
committerJeff Garzik <jeff@garzik.org>
Mon, 9 Jul 2007 02:16:39 +0000 (22:16 -0400)
commit480fe1a31c662ef4ff0598a7cacefa21f98335f1
tree66da8f259d7093d7f9290054f4fbda1f68ff9e0atree | snapshot
parent8a9fab22cf6a3abde7731f4425d4ff87509bc15acommit | diff
cxgb3 - TP SRAM update

The chip executes microcode present in internal RAM,
whose content is loaded from EEPROM on power cycle.
This patch allows an update of the microcode through PIO
without forcing a power cycle.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/net/cxgb3/common.h diff | blob | history
drivers/net/cxgb3/cxgb3_main.c diff | blob | history
drivers/net/cxgb3/regs.h diff | blob | history
drivers/net/cxgb3/t3_hw.c diff | blob | history
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