sata, highbank: send extra clock cycles in SGPIO patterns
authorMark Langsdorf <mark.langsdorf@calxeda.com>
Wed, 14 Aug 2013 18:23:32 +0000 (13:23 -0500)
committerTejun Heo <tj@kernel.org>
Wed, 14 Aug 2013 20:43:30 +0000 (16:43 -0400)
commit2b79c56fb41d3956f672990fe83e342a809c89ab
tree4de09de58eeffe51d987fca8a94d4897e348b542
parentb2e4c7b94e2826bea435aa3107e7c44f3e68515b
sata, highbank: send extra clock cycles in SGPIO patterns

Some SGPIO PICs don't follow the standard very well and expect a certain
number of clock cycles or port frames in each SGPIO pattern. Add two
optional parameters in the DTB that can provide the number of extra
clock cycles to be sent before and after SGPIO pattern. Read those
parameters from the DTB and send the extra clock cycles.

Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Documentation/devicetree/bindings/ata/sata_highbank.txt
drivers/ata/sata_highbank.c