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[ARM] 3366/1: Allow the 16bpp mode configuration in the CLCD control register
authorCatalin Marinas <catalin.marinas@arm.com>
Thu, 16 Mar 2006 14:10:19 +0000 (14:10 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 16 Mar 2006 14:10:19 +0000 (14:10 +0000)
commit243f196d572822214bb86522f28b30e096d67414
tree37043d91a1091b085de2f33ddd40418d3152372dtree | snapshot
parent5466eb5d0ad5e9d4238da71a2a9bd216985a4849commit | diff
[ARM] 3366/1: Allow the 16bpp mode configuration in the CLCD control register

Patch from Catalin Marinas

Starting with PL111, the 5551 or 565 modes can be configured in the
primecell's control register directly. This patch detects the required mode
and sets the correct value.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
include/linux/amba/clcd.h diff | blob | history
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