x86, MCE, AMD: Make APIC LVT thresholding interrupt optional
authorBorislav Petkov <borislav.petkov@amd.com>
Mon, 16 Apr 2012 16:01:53 +0000 (18:01 +0200)
committerBorislav Petkov <borislav.petkov@amd.com>
Mon, 30 Apr 2012 11:22:22 +0000 (13:22 +0200)
commitf227d4306cf30e1d5b6f231e8ef9006c34f3d186
tree8badf6561db888e0aedf1437555c850143447999
parent69964ea4c7b68c9399f7977aa5b9aa6539a6a98a
x86, MCE, AMD: Make APIC LVT thresholding interrupt optional

Currently, the APIC LVT interrupt for error thresholding is implicitly
enabled. However, there are models in the F15h range which do not enable
it. Make the code machinery which sets up the APIC interrupt support
an optional setting and add an ->interrupt_capable member to the bank
representation mirroring that capability and enable the interrupt offset
programming only if it is true.

Simplify code and fixup comment style while at it.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
arch/x86/kernel/cpu/mcheck/mce_amd.c