Michal Simek [Wed, 1 Oct 2025 06:20:07 +0000 (08:20 +0200)]
usb: onboard-hub: Make i2c-bus optional
DT binding doesn't mandate i2c-bus as required property because hub itself
doesn't need to have i2c connected.
It can be in standalone mode that only power regulator and reset should be
handled.
Or hub should be configured via spi interface.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Tom Rini [Fri, 3 Oct 2025 21:20:58 +0000 (15:20 -0600)]
Merge patch series "Drop ATAGS for B&R boards"
Wolfgang Wallner <wolfgang.wallner@br-automation.com> says:
There was recently a discussion on which boards need ATAGS support.
The B&R boards which have this support enabled actualyl don't need it.
This patch series drops the settings from the relevant defconfigs.
Link: https://lore.kernel.org/r/20250919134308.122437-1-wolfgang.wallner@br-automation.com
Tom Rini [Mon, 15 Sep 2025 19:05:48 +0000 (13:05 -0600)]
cmd: spl: Remove ATAG support from this command
While we continue to have some systems which support extremely legacy
OS booting methods, we do not have use cases for supporting this in
Falcon mode anymore. Remove this support and references from the
documentation.
Co-developed-by: Anshul Dalal <anshuld@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Mon, 22 Sep 2025 12:29:22 +0000 (14:29 +0200)]
linux/kernel.h: Update upper_NN_bits() and lower_NN_bits() macros
Synchronize upper_NN_bits() and lower_NN_bits() macros with Linux 6.16
commit
118d777c4cb4 ("wordpart.h: Add REPEAT_BYTE_U32()"). This fixes the
lower_32_bits() macros and assures it works with 64bit systems correctly.
This also adds 16bit variants of these macros, which will be used by the
Airoha PHY driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Wolfgang Wallner [Fri, 19 Sep 2025 13:43:02 +0000 (15:43 +0200)]
configs: brcp170: Drop CONFIG_SUPPORT_PASSING_ATAGS
CONFIG_SUPPORT_PASSING_ATAGS is not needed for this board.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Wolfgang Wallner [Fri, 19 Sep 2025 13:43:01 +0000 (15:43 +0200)]
configs: brcp150: Drop CONFIG_SUPPORT_PASSING_ATAGS
CONFIG_SUPPORT_PASSING_ATAGS is not needed for this board.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Wolfgang Wallner [Fri, 19 Sep 2025 13:43:00 +0000 (15:43 +0200)]
configs: brcp1: Drop CONFIG_SUPPORT_PASSING_ATAGS
CONFIG_SUPPORT_PASSING_ATAGS is not needed for these boards.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Anshul Dalal [Tue, 16 Sep 2025 11:22:05 +0000 (16:52 +0530)]
arm: armv8: remove redundant definition of mmu_status
mmu_status is used in io memcpy functions to prevent accesses to non
8-byte aligned addresses when the mmu is disabled. Though there is a
redundant definition enabled when icaches is turned off by setting
SYS_ICACHE_OFF.
This patch removes the redundant definition, allowing mmu_status to
properly report the status regardless of config settings. This shouldn't
be a problem since access to non 8-byte aligned data can be done
irrespective of icache state.
Fixes:
268f6ac1f95c ("arm64: Update memcpy_{from, to}io() helpers")
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Michal Simek [Mon, 22 Sep 2025 16:03:39 +0000 (18:03 +0200)]
env: spi: Fix gd->env_valid for the first write
When both SPI environment locations are invalid (gd->env_valid ==
ENV_INVALID), the first call to saveenv writes to the primary location and
sets the active flag. However, the logic for updating gd->env_valid
incorrectly sets it to ENV_REDUND, which does not match the actual location
written. This causes the first two writes to target the same location, and
alternation only begins after the second write.
Update the logic to alternate gd->env_valid based on whether the last write
was to the primary or redundant location, ensuring the first write sets
ENV_VALID and subsequent writes alternate as expected. This aligns
env_valid with the actual storage location and fixes the alternation
sequence from the first write.
With this change, the "Valid environment" printout correctly reflects the
active location after each save, and the alternation between primary and
redundant locations works as intended from the start.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Acked-by: E Shattow <e@freeshell.de>
Tom Rini [Thu, 2 Oct 2025 17:20:01 +0000 (11:20 -0600)]
Merge tag 'u-boot-dfu-next-
20251001' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-
20251001
CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/27791
Fastboot:
- Fix has-slot command when using nand back-end.
USB gadget:
- Add missing null checks to atmel, dwc2 drivers (smatch)
- Remove redundant check in dwc3 gadget (smatch)
Tom Rini [Tue, 30 Sep 2025 22:11:23 +0000 (16:11 -0600)]
Merge tag 'u-boot-socfpga-next-
20250930' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
SoCFPGA updates for v2025.10:
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762
This pull request brings a set of updates across SoCFPGA platforms
covering Agilex5, Agilex7, N5X, and Stratix10. The changes include:
* Agilex5 enhancements:
- USB3.1 enablement and DWC3 host driver support
- System Manager register configuration for USB3
- Watchdog timeout increase and SDMMC clock API integration
- dcache handling improvements in SMC mailbox path
- Enable SPL_SYS_DCACHE_OFF in defconfig
* Clock driver improvements:
- Introduce dt-bindings header for Agilex clocks
- Add enable/disable API and EMAC clock selection fixes
- Replace manual shifts with FIELD_GET usage
* DDR updates:
- IOSSM mailbox compatibility check
- Correct DDR calibration status handling
* Device tree changes:
- Agilex5: disable cache allocation for reads
- Stratix10: add NAND IP node
- Enable driver model watchdog
- Enable USB3.1 node for Agilex5
* Config cleanups:
- Simplify Agilex7 VAB defconfig
- Remove obsolete SYS_BOOTM_LEN from N5X VAB config
- Enable CRC32 support for SoCFPGA
- Increase USB hub debounce timeout
Overall this set improves reliability of DDR and cache flows,
adds missing USB and MMC features for Agilex5, and refines clock
and configuration handling across platforms.
This patch set has been tested on Agilex 5 devkit, and Agilex devkit.
Tom Rini [Tue, 30 Sep 2025 22:01:05 +0000 (16:01 -0600)]
Merge tag 'u-boot-amlogic-next-
20250930' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next
- set reversed bit when using internal phy on GXL SoCs
- support gpio toggle command for amlogic gpio
- fix saradc
- remove unreachable in meson clk driver
- Stop premature exit from for loop in meson pwm driver
- fix JetHub D1 eth mac fallback generation
Viacheslav Bocharov [Wed, 3 Sep 2025 11:06:03 +0000 (14:06 +0300)]
ARM: amlogic: fix JetHub D1 eth mac fallback generation
JetHome has allocated a special range for MAC fallback on JetHub D1/D1+
devices.
Signed-off-by: Viacheslav Bocharov <adeep@lexina.in>
Link: https://lore.kernel.org/r/20250903110726.546083-1-adeep@lexina.in
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Andrew Goodbody [Fri, 8 Aug 2025 09:34:43 +0000 (10:34 +0100)]
pwm: meson: Stop premature exit from for loop
In meson_pwm_probe the for loop attempts to get the name of a clock but
the following if..else statements only perform useful work if -ENODATA
is returned from clk_get_by_name. If clk_get_by_name simply succeeds
then this results in a premature exit from the for loop and the
following code can never be reached. Make the else clause only apply for
an error return from clk_get_by_name.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250808-pwm_meson-v1-1-cddb7e5f76bd@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Andrew Goodbody [Wed, 23 Jul 2025 16:37:24 +0000 (17:37 +0100)]
clk: meson: Remove unreachable code
A second return following the first return is unreachable code so remove
it.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250723-clk_meson-v1-1-8cd6e73145a4@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Andrew Goodbody [Tue, 22 Jul 2025 14:06:14 +0000 (15:06 +0100)]
adc: meson-saradc: uint cannot be less than zero
timeout is declared as a uint but then tested for being less than zero
which must always fail. Change the while loop for a pre-decrement on
timeout and test timeout for being zero.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250722-meson_saradc-v1-1-1ab45d53da9d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Yang Xiwen [Mon, 16 Jun 2025 17:01:17 +0000 (01:01 +0800)]
pinctrl: meson: support gpio toggle command
meson_gpio_get() always assumes gpio is configured to input mode. This
is incorrect and breaks `gpio toggle` command:
gpio: pin aobus-banks2 (gpio 2) value is 0
Warning: value of pin is still 1
Fix it by adding the logic to handle both input and output mode.
Fixes:
2009a8d03fe5 ("pinctrl: meson: add GPIO support")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250617-meson_ppinctrl-v3-1-218d9321a8d2@outlook.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Neil Armstrong [Fri, 2 May 2025 06:51:45 +0000 (08:51 +0200)]
net: mdio: mux-meson-gxl: set reversed bit when using internal phy
This bit is necessary to receive packets from the internal PHY.
Without this bit set, no activity occurs on the interface.
Normally u-boot sets this bit, but if u-boot is compiled without
net support, the interface will be up but without any activity.
The vendor SDK sets this bit along with the PHY_ID bits.
Ported from the Linux change at [1] from Da Xu merged in
commit [2].
[1] https://lore.kernel.org/all/
20250425192009.1439508-1-da@libre.computer/
[2]
b23285e93bef ("net: mdio: mux-meson-gxl: set reversed bit when using internal phy")
Suggested-by: Da Xue <da@libre.computer>
Link: https://lore.kernel.org/r/20250502-u-boot-topic-mdio-mux-gxl-bit28-v1-1-399f6c3db154@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Andrew Goodbody [Mon, 29 Sep 2025 09:11:57 +0000 (10:11 +0100)]
usb: dwc3: Remove redundant test
In dwc3_ep0_complete_data there is a test for 'r' being null and the
code will return at that point if so. After that point 'r' is guaranteed
to not be null and testing for that is redundant. Remove the test for
'r' being non-null.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Link: https://lore.kernel.org/r/20250929-dwc3_ep0-v1-1-1d5c58933bde@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Andrew Goodbody [Mon, 29 Sep 2025 16:40:43 +0000 (17:40 +0100)]
usb: dwc2: Add missing null check
Add in the missing null check for dev->driver that is present at other
points in the function before it is dereferenced.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Link: https://lore.kernel.org/r/20250929-usb_dwc2-v1-1-863133dcbcde@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Andrew Goodbody [Mon, 29 Sep 2025 16:25:23 +0000 (17:25 +0100)]
usb: gadget: atmel: Add missing null check
Add in the missing null check for udc->driver that is present at other
points in the function before it is dereferenced.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Link: https://lore.kernel.org/r/20250929-atmel_usba_udc-v1-1-e1426271e12a@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Chance Yang [Tue, 26 Aug 2025 03:36:17 +0000 (11:36 +0800)]
fastboot: Fix has-slot command always returning yes for fb_nand
The issue was a mismatch in return value conventions between functions:
- getvar_get_part_info() expects >= 0 for success
- fb_nand_lookup() returns 0 on success, 1 on failure (from
mtdparts_init and find_dev_and_part)
When partition didn't exist, fb_nand_lookup returned 1, but
fastboot_nand_get_part_info passed it directly to getvar_get_part_info,
which treated 1 >= 0 as success, causing has-slot to always return yes.
Fix by converting positive return values to -ENOENT in
fastboot_nand_get_part_info to match the expected error convention.
Signed-off-by: Chance Yang <chance.yang@kneron.us>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250826-master-v2-1-30b787a2f9fd@kneron.us
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Naresh Kumar Ravulapalli [Wed, 24 Sep 2025 07:49:11 +0000 (00:49 -0700)]
arch: arm: socfpga: Configure USB3 System Manager registers
For successful reset staggering pulse operation, reset pulse
override bit is set. Port overcurrent bit 1, which in reality
reflects PIPE power present signal is set to avoid giving
false information of Vbus status to HPS controller.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Wed, 24 Sep 2025 07:49:10 +0000 (00:49 -0700)]
configs: Increase USB Hub debounce timeout in Agilex5
Some legacy USB mass storage devices during connection were
observed to have debounce issues. Hence, increasing the default
USB Hub debounce timeout value to handle this issue for devices
connected to Agilex5 boards.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Wed, 24 Sep 2025 07:49:09 +0000 (00:49 -0700)]
configs: Enable USB DWC3 host drivers for Agilex5
Required USB DWC3 host driver configurations are enabled
for Agilex5.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Wed, 24 Sep 2025 07:49:08 +0000 (00:49 -0700)]
arch: arm: dts: Enable USB3.1 for Agilex5
USB 3.1 node is enabled for Agilex5.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Thu, 11 Sep 2025 05:21:12 +0000 (22:21 -0700)]
drivers: clk: agilex: Use FIELD_GET during EMAC clock selection
FIELD_GET() macro is used during EMAC clock source selection
for better code readability and maintainability.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Thu, 11 Sep 2025 05:21:11 +0000 (22:21 -0700)]
drivers: clk: agilex: Fix EMAC clock source selection
Fix the incorrect bit masking and bit shift used to compute EMAC
control which in turn is used to select EMAC clock from EMAC
source A or B.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Alif Zakuan Yuslaimi [Tue, 9 Sep 2025 02:11:16 +0000 (19:11 -0700)]
mmc: socfpga_dw_mmc: Enable/disable SDMMC clock via API
Update the driver to enable or disable the SDMMC clock via
clock driver model API instead of doing it in the driver itself.
This allows for scalability of the driver for various SoCFPGA
devices.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Boon Khai Ng [Thu, 14 Aug 2025 03:17:41 +0000 (11:17 +0800)]
configs: agilex5: Enable config SPL_SYS_DCACHE_OFF
Add SPL_SYS_DCACHE_OFF to Agilex5 defconfig to disable data cache for SPL
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Alif Zakuan Yuslaimi [Tue, 9 Sep 2025 02:11:15 +0000 (19:11 -0700)]
drivers: clk: agilex: Support for enable/disable API
Update Agilex clock driver to support enabling or disabling
the peripheral clocks via clock driver model APIs.
The caller will pass the clock ID to this driver and the driver
will then proceed to manipulate the desired bit in the Agilex clock
manager peripheral PLL register based on the given clock ID.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Boon Khai Ng [Thu, 14 Aug 2025 03:17:40 +0000 (11:17 +0800)]
cache: Check dcache availability before calling cache functions
When the data cache (dcache) is disabled, calling related
status functions can lead to compilation errors due to
undefined references.
Adding a !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) check before
invoking dcache_status() (used in common/memsize.c:get_ram_size())
and mmu_status() (from arch/arm/include/asm/io.h).
Without this check, builds with dcache disabled will fail to compile.
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alif Zakuan Yuslaimi [Tue, 9 Sep 2025 02:11:14 +0000 (19:11 -0700)]
include: dt-bindings: clk: agilex: Add Agilex clock definitions header file
Introduce header file to define the clock indexes for the Agilex
platform.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Boon Khai Ng [Thu, 14 Aug 2025 03:17:39 +0000 (11:17 +0800)]
arch: arm: mach-socfpga: smc: Add dcache flushing and invalidation in smc_send_mailbox()
Adding the dcache flushing and invalidation in the smc_send_mailbox()
At the same time replace the use of u64 with uintptr_t to ensure
compatibility across different architectures and correct the
pointer arithmetic for buffer end address calculation.
Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Alif Zakuan Yuslaimi [Fri, 15 Aug 2025 03:40:22 +0000 (20:40 -0700)]
configs: agilex5: Increase watchdog timeout
Linux kernel will fail to boot due to exceeding timeout trying to
probe I3C device.
Increasing the watchdog timeout 30 seconds will give enough time for
Linux to probe the I3C device and will be able to boot up successfully.
User is expected to fine tune the watchdog timeout for the complete
boot in production.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Alif Zakuan Yuslaimi [Tue, 23 Sep 2025 01:31:47 +0000 (18:31 -0700)]
arm: socfpga: mailbox: Remove CONFIG_CADENCE_QSPI guard from QSPI mailbox API declarations
The QSPI mailbox API function declarations (mbox_qspi_close and
mbox_qspi_open) in mailbox_s10.h were guarded by CONFIG_CADENCE_QSPI
preprocessor conditional. This prevented their prototypes from being
visible to code that may use the stub implementations when
CONFIG_CADENCE_QSPI is disabled.
Remove the CONFIG_CADENCE_QSPI preprocessor conditional so these functions
are always declared, regardless of the configuration. This avoids potential
build or linkage errors when stubs are used.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Alif Zakuan Yuslaimi [Fri, 29 Aug 2025 03:42:59 +0000 (20:42 -0700)]
arm: socfpga: Define Use FPGA switch handoff section size for Agilex5
Agilex5 FPGA switch section in the handoff data is larger by 32 bytes
than the default value as these extra sections contains I3C0 and I3C1
register offsets and values with 4 bytes each.
This requires 4 more times of reading the FPGA switch section of the
handoff data to fully populate the handoff data table in the memory
during runtime.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Fri, 8 Aug 2025 09:42:42 +0000 (02:42 -0700)]
drivers: ddr: altera: Correct DDR calibration status check
Bit 3 of the seq2core register is no longer set to indicate
calibration completion. Instead, added polling of the seq2core
register until it reads
0b00000111, signaling that the Nios
processor has started the calibration process.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Fri, 8 Aug 2025 09:36:59 +0000 (02:36 -0700)]
drivers: ddr: altera: Check IOSSM mailbox compatibility
Compatibility check of IOSSM mailbox with U-Boot is performed
by verifying the mailbox specification version. If check fails,
appropriate error message is displayed.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Tue, 19 Aug 2025 04:34:40 +0000 (21:34 -0700)]
configs: socfpga: Remove SYS_BOOTM_LEN from N5X VAB config
Remove the current CONFIG_SYS_BOOTM_LEN in N5X VAB defconfig.
Previously, the size was set to 32MB, but due to larger kernel image,
64MB size is required. This 64MB configuration has been set as
default in the Kconfig.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Tue, 19 Aug 2025 04:24:04 +0000 (21:24 -0700)]
configs: socfpga: Add CRC32 support
CRC32 support for SoC64 devices is added.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Fri, 8 Aug 2025 09:30:41 +0000 (02:30 -0700)]
configs: Simplify Agilex7 VAB defconfig
To ensure unintentional bugs occurring because of config changes
in master defconfig and its VAB variants, VAB defconfig files now
include the master defconfig and enable config values specific to
VAB functionality only.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Tue, 19 Aug 2025 04:16:04 +0000 (21:16 -0700)]
arm: dts: socfpga: Enable driver model for watchdog timer
All SoCFPGA platforms are switching to CONFIG_WDT (driver
model for watchdog timer drivers) from CONFIG_HW_WATCHDOG. Status
of watchdog is enabled to assist with this switching.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Tue, 19 Aug 2025 04:25:55 +0000 (21:25 -0700)]
arch: arm: socfpga: Remove speed and mode from flash probe
Change is to allow the user to choose speed and mode values
from dts or the default ones.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Tue, 19 Aug 2025 04:17:44 +0000 (21:17 -0700)]
arch: arm: dts: stratix10: Add NAND IP to base dtsi
Add NAND node to the base stratix10 dtsi file.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Naresh Kumar Ravulapalli [Fri, 8 Aug 2025 09:40:03 +0000 (02:40 -0700)]
arch: arm: dts: agilex5: Disable cache allocation for reads
In order to circumvent CCU NOC issue in Agilex5, it is recommended
to disable cache allocation for reads. This prevents hang issues
caused by CCP (Common Cache Pipe) Fill Done FIFO overflow.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Daniel P. Berrangé [Fri, 26 Sep 2025 09:45:46 +0000 (10:45 +0100)]
Add symlink from gpl-2.0.txt to a COPYING file
While it is good that the "Licenses/" directory contains the text
for all licenses that are applicable to u-boot code, it is harder
to determine at a glance what the default and/or preferred license
is. While humans can look at the Licenses/README file, this is not
machine parseable, making it tricky for license detection tools to
automatically determine/report on the overall / aggregate u-boot
license.
The project previously had a top level COPYING file containing a
short blurb, followed by the GPL license text. This was removed
back in commit
eca3aeb352c964bdb28b8e191d6326370245e03f when
the "Licenses/" directory was introduced. For the benefit of
automated tools, it is helpful to retain a top level COPYING
file in the repository. Rather than duplicate the license text,
however, a symlink from the Licenses/gpl-2.0.txt file should
suffice.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Tom Rini <trini@konsulko.com>
Jiaxun Yang [Wed, 17 Jul 2024 15:12:59 +0000 (23:12 +0800)]
b4-config: configure `b4` for U-Boot
`b4` is a commandline tool to make patch-based development easier.
Provide a .b4-config file to match U-Boot's development preference about
who is cc'd on patch submission.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
[trini: Reword slightly]
Maksim Kiselev [Fri, 26 Sep 2025 10:05:26 +0000 (13:05 +0300)]
i2c: designware_i2c: Don't warn if reset DT property is not present
If reset property is missing in DT, then we get this warning:
designware_i2c@0: Can't get reset: -2
Avoid this by checking if reset DT property is present, first.
Fixes:
622597dee4f ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Sat, 27 Sep 2025 15:49:01 +0000 (09:49 -0600)]
Merge tag 'doc-next-2025-09-27' of https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request doc-next-2025-09-27
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/27746
Documentation:
* Move ext4 documentation to HTML.
* Describe configuration option EXT4_MAX_JOURNAL_ENTRIES and
memory ext4 journal memory requirements.
Tom Rini [Sat, 27 Sep 2025 14:05:53 +0000 (08:05 -0600)]
Merge tag 'efi-2025-10-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2025-10-rc6
CI:
* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/27745
Docs:
* Correct encodings for spl memory layout diagrams
* Suggest usage of KDOC_WERROR when building documentation
* Replace references to README.fdt-control
* Clarify precedence of environment locations
* Add documentation for the TI am335x_evm board
* Remove README.commands.itest
* Add a note about asking for feedback in the development process
UEFI:
* Cleanup UEFI Variables Kconfig menu
Michal Simek [Wed, 24 Sep 2025 14:18:18 +0000 (16:18 +0200)]
efi_loader: Cleanup UEFI Variables menu selection
There are 3 options listed between choice/endchoice FILE/TEE/NO_STORE.
There is no reason to add other config with dependencies between
choice/endchoice because they can never be selected because they depends on
only that 3 options which can be selected.
That's why move additional configuration with dependency below choice
section.
Signed-off-by: Michal Simek <michal.simek@amd.com>
E Shattow [Tue, 23 Sep 2025 22:30:50 +0000 (15:30 -0700)]
doc: Update mentions of README.fdt-control
Update documents 'README.fdt-control' reference to replacement 'control.rst':
doc/arch/nios2.rst
dts/Makefile
Also convert some adjacent pathname mentions to rST links where applicable
Fixes:
3e9fddfc4f14 "doc: Move devicetree control doc to rST"
Signed-off-by: E Shattow <e@freeshell.de>
Tom Rini [Tue, 23 Sep 2025 17:54:29 +0000 (11:54 -0600)]
doc: develop: process: Add note about asking for feedback
It can be unclear to contributors what to do if they haven't gotten any
feedback on patches they have submitted. Add a sentence saying that if
they feel it's been too long without any comment, it's OK to reply
again.
Signed-off-by: Tom Rini <trini@konsulko.com>
E Shattow [Fri, 19 Sep 2025 01:37:56 +0000 (18:37 -0700)]
doc: build: documentation: add description of KDOC_WERROR
Describe KDOC_WERROR and recommend when building documentation for a patch
submission.
Signed-off-by: E Shattow <e@freeshell.de>
Anshul Dalal [Wed, 17 Sep 2025 13:27:31 +0000 (18:57 +0530)]
doc: memory: fix encodings for spl layout diagrams
The commit
284ef1bbcefc ("doc: memory: Add documentation for system
RAM") added documentation for U-Boot's memory usage along with diagrams
showcasing the SPL's memory usage. Although the SVGs for the diagrams
were improperly encoded.
Therefore, this patch fixes the older SVGs with one's with better
encoding and reduced size created using inkscape[1].
[1]: https://inkscape.org/
Reported-by: Alexander Dahl <ada@thorsis.com>
Fixes:
284ef1bbcefc ("doc: memory: Add documentation for system RAM")
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Ricardo Simoes [Mon, 15 Sep 2025 14:40:33 +0000 (16:40 +0200)]
doc: environment: clarify env precedence
Since commit
5cf6a06a it is possible to have both text-based and
old-style C environment files. But so far the environment documentation
has not reflected this change. This commit fixes that.
Signed-off-by: Ricardo Simoes <ricardo.simoes@pt.bosch.com>
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Tony Dinh [Sun, 14 Sep 2025 20:56:28 +0000 (13:56 -0700)]
doc: usage: Add File System section and Ext4 documentation
Create doc/usage/filesystems/ section.
Convert doc/README.ext4 to rST format and move it to the new section.
Update documentation to add configuration instruction for Ext4 Write
when using large partitions.
Note that this patch depends on this previous patch:
https://patchwork.ozlabs.org/project/uboot/patch/
20250910215702.15576-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Tom Rini [Fri, 12 Sep 2025 23:02:52 +0000 (17:02 -0600)]
doc: Remove README.commands.itest
We currently document this command in doc/usage/cmd/itest.rst and this
documentation is more comprehensive than the older README file. Delete
the older file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tony Dinh [Wed, 10 Sep 2025 21:56:03 +0000 (14:56 -0700)]
doc: ext4fs: update documentation for Ext4 Write configuration
Update documentation for how to configure Ext4 Write when using large
partitions.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Neha Malcom Francis [Wed, 10 Sep 2025 15:40:39 +0000 (09:40 -0600)]
doc: memory: Restore missing diagram
When applying the patch that became commit
a2d881f5bcd3 ("doc: memory:
Add documentation for system RAM") one of the diagrams was missed.
Re-add this missing file.
Reported-by: Adriano Carvalho <adrianocarvalho.pt@gmail.com>
Fixes:
a2d881f5bcd3 doc: memory: Add documentation for system RAM
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
[trini: Take Neha's original svg and re-apply it]
Signed-off-by: Tom Rini <trini@konsulko.com>
Sidharth Seela [Wed, 3 Sep 2025 20:20:42 +0000 (01:50 +0530)]
doc: board: ti: am335x_evm: Add documentation
Link: https://lore.kernel.org/u-boot/20250829191830.GZ124814@bill-the-cat/
Add documentation for config changes required to enable Falcon SD-FAT boot.
Signed-off-by: Sidharth Seela <sidharthseela@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 26 Sep 2025 22:48:56 +0000 (16:48 -0600)]
Merge patch series "vexpress63: Set the DM_RNG property"
This series from Debbie Horsfall <debbie.horsfall@arm.com> enhances the
Vexpress64 platform in a few ways.
Link: https://lore.kernel.org/r/20250917162222.1061111-1-debbie.horsfall@arm.com
Debbie Horsfall [Wed, 17 Sep 2025 16:22:22 +0000 (17:22 +0100)]
arm: vexpress64: Enable SYSRESET and SYSRESET_PSCI
Select SYSRESET on Vexpress64 to enable system reset to support other
features, such as capsule-on-disk. Select SYSRESET_PSCI if PSCI is
inferred from the firmware (via ARM_PSCI_FW).
Select ARM_SMCCC for Vexpress64 boards which in turn selects
ARM_PSCI_FW.
The sysreset uclass unconditionally implements a reset_cpu() function.
Remove the empty reset_cpu() in vexpress64 board code.
Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com>
Debbie Horsfall [Wed, 17 Sep 2025 16:22:21 +0000 (17:22 +0100)]
vexpress64: Set the DM_RNG property
Enable the DM_RNG virtio random number generator driver in order to
consume entropy within U-Boot. This allows U-Boot to inject entropy to the
kernel via UEFI, so the kernel can use that early, for instance for
address layout randomisation, or when the kernel does not provide an
entropy driver itself.
Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Vishnu Singh [Tue, 16 Sep 2025 07:25:15 +0000 (12:55 +0530)]
bootstage: stash boot records to reserved mem before kernel handoff
U-Boot now stashes its bootstage buffer into a reserved memory region
whenever CONFIG_BOOTSTAGE_STASH is enabled, just before exiting to the
kernel. This allows a post boot parser to read a unified timeline
(SPL→U-Boot→Kernel→MCU/DSP) directly from DDR, enabling standardized
and repeatable boot-time profiling across releases and SoCs.
Change summary:
Call bootstage_stash_default() in announce_and_cleanup()
when CONFIG_BOOTSTAGE_STASH is set.
Reference boot-time parser utility:
https://github.com/v-singh1/boot-time-parser
Sample boot time report:
+--------------------------------------------------------------------+
am62xx-evm Boot Time Report
+--------------------------------------------------------------------+
Device Power On : 0 ms
SPL Time : 843 ms
U-Boot Time : 2173 ms
Kernel handoff time : 462 ms
Kernel Time : 2522 ms
Total Boot Time : 6000 ms
+--------------------------------------------------------------------+
+--------------------------------------------------------------------+
Bootloader and Kernel Boot Records
+--------------------------------------------------------------------+
BOOTSTAGE_AWAKE = 0 ms (+ 0 ms)
BOOTSTAGE_START_UBOOT_F = 843 ms (+ 0 ms)
BOOTSTAGE_ACCUM_DM_F = 843 ms (+ 0 ms)
BOOTSTAGE_START_UBOOT_R = 1951 ms (+1108 ms)
BOOTSTAGE_ACCUM_DM_R = 1951 ms (+ 0 ms)
BOOTSTAGE_NET_ETH_START = 2032 ms (+ 81 ms)
BOOTSTAGE_NET_ETH_INIT = 2053 ms (+ 21 ms)
BOOTSTAGE_MAIN_LOOP = 2055 ms (+ 2 ms)
BOOTSTAGE_START_MCU = 2661 ms (+606 ms)
BOOTSTAGE_BOOTM_START = 2959 ms (+298 ms)
BOOTSTAGE_RUN_OS = 3016 ms (+ 57 ms)
BOOTSTAGE_BOOTM_HANDOFF = 3016 ms (+ 0 ms)
BOOTSTAGE_KERNEL_START = 3478 ms (+462 ms)
BOOTSTAGE_KERNEL_END = 6000 ms (+2522 ms)
+--------------------------------------------------------------------+
+--------------------------------------------------------------------+
MCU Boot Records
+--------------------------------------------------------------------+
MCU_AWAKE = 2661 ms (+ 0 ms)
BOARD_PERIPHERALS_INIT = 2661 ms (+ 0 ms)
MAIN_TASK_CREATE = 2661 ms (+ 0 ms)
FIRST_TASK = 2662 ms (+ 1 ms)
DRIVERS_OPEN = 2662 ms (+ 0 ms)
BOARD_DRIVERS_OPEN = 2662 ms (+ 0 ms)
IPC_SYNC_FOR_LINUX = 6636 ms (+3974 ms)
IPC_REGISTER_CLIENT = 6636 ms (+ 0 ms)
IPC_SUSPEND_TASK = 6636 ms (+ 0 ms)
IPC_RECEIVE_TASK = 6636 ms (+ 0 ms)
IPC_SYNC_ALL = 6787 ms (+151 ms)
+--------------------------------------------------------------------+
Signed-off-by: Vishnu Singh <v-singh1@ti.com>
Marek Vasut [Thu, 18 Sep 2025 16:49:19 +0000 (18:49 +0200)]
arm64: Add MIDR entry for Cortex-A720
Add MIDR entry for Cortex-A720 core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Tue, 16 Sep 2025 16:14:45 +0000 (10:14 -0600)]
scripts: checkpatch.pl: Extend some checks to "env" files
In order for the U-Boot specific tests we've added (along with the long
line test) to be run on ".env" files as well, we need to update the line
in the process function that starts to limit the file extensions that we
test on.
Signed-off-by: Tom Rini <trini@konsulko.com>
Michal Simek [Wed, 17 Sep 2025 07:54:06 +0000 (09:54 +0200)]
arm: Change SYS_INIT_SP_BSS_OFFSET from int to hex
The most of OFFSET values are in hex instead of int which is easier for
layout description.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Fri, 26 Sep 2025 17:55:55 +0000 (11:55 -0600)]
Merge patch series "exports overhaul"
Rasmus Villemoes <ravi@prevas.dk> says:
This all started from me wondering "why does this standalone app end
up being so huge"? Oh, it essentially links in its own standard C
library to get strlen() and snprintf(). Which then led to asking "why
don't we export all those standard C functions when we have them
anyway?".
CI has chewed on these and seem happy - it was CI which told me about
the necessity of [1/9]: https://github.com/u-boot/u-boot/pull/813
Link: https://lore.kernel.org/r/20250919101002.568488-1-ravi@prevas.dk
Rasmus Villemoes [Fri, 19 Sep 2025 10:10:02 +0000 (12:10 +0200)]
exports.h: bump XF_VERSION
There have been quite a few changes to _exports.h since the last
update of XF_VERSION, also before the previous patches in this series.
I doubt the mechanism is actually being used in practice, it is simply
too fragile: Not only does the list of exported functions depend on
.config, so with the same XF_VERSION the jump table entries could have
different offsets. But getting to the jump table itself from gd to
even call the ->get_version() is fragile, since offsetof(gd_t, jt)
can, and does, change. For example, as recently as commit
d9902107027 ("global_data: Remove jump table in SPL").
One really must build one's standalone app against the proper U-Boot
version and config.h. But for good measure, do bump it now.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:10:01 +0000 (12:10 +0200)]
_exports.h: export standard memory/string handling functions
The current list of exported functions lacks quite a few bog-standard C
library functions that we might as well expose, since U-Boot certainly
has them implemented anyway. There's no reason a standalone
application should have its own strlen() implementation or link in a
copy from some tiny libc.
For a customer's standalone app, this means it goes from 95K to 10K.
More importantly, we can ditch the custom toolchain including a
newlibc used to build the standalone app and just use the same
toolchain as used to build u-boot itself.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:10:00 +0000 (12:10 +0200)]
_exports.h: reorganize a bit
The current list of exported functions is somewhat of a
mess. Reorganize them so that related functionality is kept together:
- console I/O: move vprintf next to printf and the getc/putc functions
- integer parsing: move the *strto* functions together
- standard string.h stuff: move memset() and strcpy() next to strcmp()
- time: move mdelay() next to udelay() and get_timer()
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:09:59 +0000 (12:09 +0200)]
exports.h: make sure declarations are in sync with the actual exports
After finishing a later patch in this series, I discovered I had
neglected to update the list of declarations in exports.h to
match. But then I realized I wasn't the first to do that.
Use the existing mechanism and DRY it out.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:09:58 +0000 (12:09 +0200)]
exports.c: drop unused dummy function
The !CONFIG_PHY_AQUANTIA defines were already superfluous since
_exports.h does have a CONFIG_PHY_AQUANTIA, so the entries never
existed. In fact, it couldn't have worked, because the defines would
affect both occurences of the mdio_get_current_dev identifier in the
EXPORT_FUNC(mdio_get_current_dev, struct mii_dev *,
mdio_get_current_dev, void)
so the C code would end up containing four copies of
gd->jt->dummy = dummy
but struct jt_funcs would not and does not have any 'dummy' member.
Now that nothing in _exports.h refers to dummy(), remove the empty
function.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:09:57 +0000 (12:09 +0200)]
_exports.h: drop the last dummy entries
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:09:56 +0000 (12:09 +0200)]
_exports.h: simplify condition for including spi functions
As for the i2c functions, drop the dummy entries that, if ever used,
would just have the standalone app get some random content in the
return register.
While deprecated, the spi_{setup,free}_slave functions do exist even
with CONFIG_DM_SPI - and a standalone app can't really do anything but
refer to a spi device via a (bus, cs) pair.
Eventually, one should probably export some function that could allow
a standalone app to get a struct udevice* corresponding to either a
full DT path, an alias, or perhaps a label (provided one builds with
-@), and then export functions that can operate on that.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:09:55 +0000 (12:09 +0200)]
_exports.h: drop creating dummy i2c entries and fixup config dependency
There's really no good reason to create stub entries that would call a
function that doesn't even return anything sensible.
The existence of these two i2c_* functions depends on
CONFIG_IS_ENABLED(SYS_I2C_LEGACY), which does depend on !DM_I2C, but
is not equivalent to it. They are probably rather hard to use unless
CMD_I2C and something in U-Boot has called "i2c dev foo" to set the
current i2c bus before calling the standalone app, so keep that
dependency.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rasmus Villemoes [Fri, 19 Sep 2025 10:09:54 +0000 (12:09 +0200)]
malloc.h: be a bit more consistent with macro definitions
Currrently, malloc and free are function-like macros, while calloc,
realloc and memalign are object-like macros.
Usually, this doesn't matter, but it does when the identifiers appear
without a following open parenthesis, such as when their address is
taken for building the export table. Adding calloc or realloc to that
table breaks the build on sandbox due to this inconsistency.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 26 Sep 2025 17:36:52 +0000 (11:36 -0600)]
Merge tag 'u-boot-imx-next-
20250926' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27737
- Add support for i.MX94 EVK.
- Set CONFIG_ETHPRIME to eth0 on phycore-imx93.
- Expand the nxp_fspi support to i.MX8QXP/8DXL/8ULP.
Ye Li [Fri, 26 Sep 2025 12:24:18 +0000 (20:24 +0800)]
imx9: scmi: Add PCIE ECAM and outbound space to MMU
Add PCIE1 and PCIE2 ECAM space and outbound space to MMU pagetable,
so A55 can access them.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Wed, 24 Sep 2025 02:11:27 +0000 (10:11 +0800)]
spi: nxp_fspi: Support i.MX8ULP flexspi
Add i.MX8ULP flexspi compatible string and driver data.
The flexspi on i.MX8ULP only has 16 LUT sequences and uses 1KB RX FIFO.
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Wed, 24 Sep 2025 02:11:26 +0000 (10:11 +0800)]
spi: nxp_fspi: Support i.MX8DXL flexspi
According to i.MX8DXL A1 errata ERR050601, concurrent read accesses
from the A35 cores to the peripherals within the LSIO subsystem
(region 0_5DXX_XXXX) and address spaces in the regions
[0_0000_0000 – 0_1BFF_FFFF] and [4_0000_0000 – 4_3FFF_FFFF] can collide
and cause data corruption in the returned data, with no failure report.
Even a single A35 core accessing both these regions can trigger the issue
because an A35 core can have more than one parallel read operation in
progress.
The flexspi0 AHB memory is in LSIO region mentioned in above errata.
So we can't use AHB read, only can read data from FIFO.
Add the compatible string for 8DXL and use a flag for the IPS read.
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Wed, 24 Sep 2025 02:11:25 +0000 (10:11 +0800)]
spi: nxp_fspi: Support i.MX8QXP flexspi
Add the compatible string and driver data for i.MX8QXP.
Signed-off-by: Ye Li <ye.li@nxp.com>
Ye Li [Wed, 24 Sep 2025 02:11:24 +0000 (10:11 +0800)]
spi: nxp_fspi: Use second last LUT entry for AHB read
Use a dedicated LUT (second last) for AHB read command, so we can
directly read from the AHB memory-mapped address and booting M core
for XIP on Flexspi NOR.
Signed-off-by: Ye Li <ye.li@nxp.com>
Primoz Fiser [Tue, 23 Sep 2025 10:49:07 +0000 (12:49 +0200)]
board: phytec: phycore-imx93: Set CONFIG_ETHPRIME to eth0
Set ethprime to eth0 since FEC interface is considered the primary IF on
phyCORE-i.MX93 SoM based boards. This comes from the fact that the same
bootloader is reused for both carrier boards, that is phyBOARD-Segin and
phyBOARD-Nash which both use different Ethernet PHYs on the EQOS (eth1)
interface and thus eth1 cannot be used as a prime.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Ye Li [Tue, 23 Sep 2025 02:15:04 +0000 (10:15 +0800)]
imx94_evk: Add i.MX943 EVK board support
Add board-level code and defconfig for the i.MX943 EVK board, supporting
multiple SOM variants: 19x19 LPDDR5, 19x19 LPDDR4 and 15x15 LPDDR4.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:15:03 +0000 (10:15 +0800)]
arm: dts: Add i.MX943 EVK board dtsi files
Introduce the base dtsi files for the i.MX943 EVK board. These files
define the essential components such as messaging units, uSDHC, GPIOs
and lpuart for board bring-up.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:15:02 +0000 (10:15 +0800)]
imx: ele_ahab: Add i.MX94 support to display_life_cycle()
Extend display_life_cycle() to support i.MX94.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:15:01 +0000 (10:15 +0800)]
imx: ele_ahab: Implement display_life_cycle() for i.MX95
The register reflects lifecycle and some lifecycle-derived state of
i.MX95 has new offset address and layout, so display_life_cycle() is
added specifically for it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:15:00 +0000 (10:15 +0800)]
imx9: Change container header temp buffer address
Due to i.MX95 has reserved first 256MB DDR, change to use the DDR
start address in u-boot as the container header buffer.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 23 Sep 2025 02:14:59 +0000 (10:14 +0800)]
pinctrl: nxp: Add i.MX94 daisy register offset
Define the daisy register offset for i.MX94 at 0x608 within the iomuxc
register space. This enables correct pad selection for daisy chain
configuration on i.MX94 platforms.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:14:58 +0000 (10:14 +0800)]
imx: container: Add i.MX94 support to get_imageset_end()
Extend get_imageset_end() to handle i.MX94 family.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:14:57 +0000 (10:14 +0800)]
imx9: scmi: Update the files under arch/arm/mach-imx/imx9/scmi/ to support i.MX94
- Add base addresses for WDG3, WDG4, GPIO6, and GPIO7 for i.MX94.
- Introduce common.h with macros of clock IDs, power domains, and CPU
types for platform-specific replacement (e.g., i.MX94, i.MX95).
- Extend imx_get_mac_from_fuse() to support i.MX94.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:14:56 +0000 (10:14 +0800)]
imx9: scmi: Add i.MX94 support to get_reset_reason()
Update get_reset_reason() to support i.MX94 to send message to the
System Manager to retrieve the LM/system last booted/shutdown reasons.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 23 Sep 2025 02:14:55 +0000 (10:14 +0800)]
imx95: Add get_reset_reason() to retrieve the LM/system last booted/shutdown reasons
System Manager provides the last booted and shutdown reasons of the
logical machines (LM) and system using the SCMI misc protocol (Protocol
ID: 0x84, Message ID: 0xA). This path adds get_reset_reason() to query
and print these reasons in SPL and U-Boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Alice Guo [Tue, 23 Sep 2025 02:14:54 +0000 (10:14 +0800)]
cpu: imx94: Add support for i.MX94 in get_imx_type_str()
Add a case for i.MX94 to return the correct string identifier in the
get_imx_type_str() function. This ensures proper CPU type reporting for
i.MX94 platforms.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Ye Li [Tue, 23 Sep 2025 02:14:53 +0000 (10:14 +0800)]
imx9: Add i.MX94 CPU type and SoC-level Kconfig
Introduce support for the new i.MX94 processor, including its CPU type
and SoC-level Kconfig entry.
The i.MX94 is a new member of the i.MX9 family. It uses a System Manager
to handle system-level functions such as power, clock, sensor and pin
control. The System Manager runs on a Cortex-M processor, while the
Cortex-A processor communicates with it via the ARM SCMI protocol and a
messaging unit.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Tom Rini [Fri, 26 Sep 2025 00:54:45 +0000 (18:54 -0600)]
Merge branch 'next' of git://source.denx.de/u-boot-usb into next
- Tighten some USB dependencies and remove some unused code.
Yegor Yefremov [Thu, 25 Sep 2025 20:51:50 +0000 (22:51 +0200)]
spl: nand: initialize writesize for am335x
Initialize mtd->writesize in nand_init() as otherwise
nand_page_size() returns 0 and this affects NAND read
operations.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>