{
}
- static void __init init_irq(void)
- {
- of_irq_init(irq_match);
- }
-static struct sys_timer timer = {
- .init = timer_init,
-};
static void __init board_init(void)
{
static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
- .init_irq = init_irq,
+ .init_irq = irqchip_init,
- .timer = &timer,
+ .init_time = timer_init,
.init_machine = board_init,
.dt_compat = bcm11351_dt_compat,
- .handle_irq = gic_handle_irq,
MACHINE_END
.atag_offset = 0x100,
.map_io = cns3420_map_io,
.init_irq = cns3xxx_init_irq,
- .timer = &cns3xxx_timer,
+ .init_time = cns3xxx_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = cns3420_init,
.restart = cns3xxx_restart,
MACHINE_END
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = adssphere_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = edb93xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = gesbc9312_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = micro9_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = micro9_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = micro9_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = micro9_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = simone_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = snappercl15_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = ts72xx_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = ts72xx_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.atag_offset = 0x100,
.map_io = vision_map_io,
.init_irq = ep93xx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &ep93xx_timer,
+ .init_time = ep93xx_timer_init,
.init_machine = vision_init_machine,
.init_late = ep93xx_init_late,
.restart = ep93xx_restart,
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = armlex4210_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = armlex4210_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.restart = exynos4_restart,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = exynos4_dt_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = exynos4_dt_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.dt_compat = exynos4_dt_compat,
.restart = exynos4_restart,
MACHINE_END
.init_irq = exynos5_init_irq,
.smp = smp_ops(exynos_smp_ops),
.map_io = exynos5_dt_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = exynos5_dt_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.dt_compat = exynos5_dt_compat,
.restart = exynos5_restart,
.reserve = exynos5_reserve,
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = nuri_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = nuri_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.reserve = &nuri_reserve,
.restart = exynos4_restart,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = origen_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = origen_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.reserve = &origen_reserve,
.restart = exynos4_restart,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = smdk4x12_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = smdk4x12_machine_init,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.restart = exynos4_restart,
.reserve = &smdk4x12_reserve,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = smdk4x12_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = smdk4x12_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.restart = exynos4_restart,
.reserve = &smdk4x12_reserve,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = smdkv310_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = smdkv310_machine_init,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.reserve = &smdkv310_reserve,
.restart = exynos4_restart,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = smdkv310_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = smdkv310_machine_init,
.init_late = exynos_init_late,
- .timer = &exynos4_timer,
+ .init_time = exynos4_timer_init,
.reserve = &smdkv310_reserve,
.restart = exynos4_restart,
MACHINE_END
.smp = smp_ops(exynos_smp_ops),
.init_irq = exynos4_init_irq,
.map_io = universal_map_io,
- .handle_irq = gic_handle_irq,
.init_machine = universal_machine_init,
.init_late = exynos_init_late,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.reserve = &universal_reserve,
.restart = exynos4_restart,
MACHINE_END
.smp = smp_ops(highbank_smp_ops),
.map_io = debug_ll_io_init,
.init_irq = highbank_init_irq,
- .timer = &highbank_timer,
+ .init_time = highbank_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = highbank_init,
.dt_compat = highbank_match,
.restart = highbank_restart,
.smp = smp_ops(imx_smp_ops),
.map_io = imx6q_map_io,
.init_irq = imx6q_init_irq,
- .handle_irq = imx6q_handle_irq,
- .timer = &imx6q_timer,
+ .init_time = imx6q_timer_init,
.init_machine = imx6q_init_machine,
.init_late = imx6q_init_late,
.dt_compat = imx6q_dt_compat,
DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8x60_io,
- .init_irq = msm8x60_init_irq,
- .handle_irq = gic_handle_irq,
+ .init_irq = irqchip_init,
.init_machine = msm8x60_dt_init,
.init_late = msm8x60_init_late,
- .timer = &msm_dt_timer,
+ .init_time = msm_dt_timer_init,
.dt_compat = msm8x60_fluid_match,
MACHINE_END
DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8960_io,
- .init_irq = msm_dt_init_irq,
+ .init_irq = irqchip_init,
- .timer = &msm_dt_timer,
+ .init_time = msm_dt_timer_init,
.init_machine = msm_dt_init,
.dt_compat = msm8960_dt_match,
- .handle_irq = gic_handle_irq,
MACHINE_END
.atag_offset = 0x100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &netx_timer,
+ .init_time = netx_timer_init,
.init_machine = nxdb500_init,
.restart = netx_restart,
MACHINE_END
.atag_offset = 0x100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &netx_timer,
+ .init_time = netx_timer_init,
.init_machine = nxdkn_init,
.restart = netx_restart,
MACHINE_END
.atag_offset = 0x100,
.map_io = netx_map_io,
.init_irq = netx_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &netx_timer,
+ .init_time = netx_timer_init,
.init_machine = nxeb500hmi_init,
.restart = netx_restart,
MACHINE_END
.atag_offset = 0x100,
.map_io = cpu8815_map_io,
.init_irq = cpu8815_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &nomadik_timer,
+ .init_time = nomadik_timer_init,
.init_machine = nhk8815_platform_init,
.restart = cpu8815_restart,
MACHINE_END
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = omap_4430sdp_init,
.init_late = omap4430_init_late,
- .timer = &omap4_timer,
+ .init_time = omap4_local_timer_init,
.restart = omap44xx_restart,
MACHINE_END
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = omap_gic_of_init,
- .handle_irq = gic_handle_irq,
.init_machine = omap_generic_init,
.init_late = omap4430_init_late,
- .timer = &omap4_timer,
+ .init_time = omap4_local_timer_init,
.dt_compat = omap4_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
.map_io = omap5_map_io,
.init_early = omap5_init_early,
.init_irq = omap_gic_of_init,
- .handle_irq = gic_handle_irq,
.init_machine = omap_generic_init,
- .timer = &omap5_timer,
+ .init_time = omap5_realtime_timer_init,
.dt_compat = omap5_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = gic_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = omap4_panda_init,
.init_late = omap4430_init_late,
- .timer = &omap4_timer,
+ .init_time = omap4_local_timer_init,
.restart = omap44xx_restart,
MACHINE_END
DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
.map_io = picoxcell_map_io,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = picoxcell_init_irq,
- .handle_irq = vic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &dw_apb_timer,
+ .init_time = dw_apb_timer_init,
.init_machine = picoxcell_init_machine,
.dt_compat = picoxcell_dt_match,
.restart = picoxcell_wdt_restart,
.map_io = realview_eb_map_io,
.init_early = realview_init_early,
.init_irq = gic_init_irq,
- .timer = &realview_eb_timer,
+ .init_time = realview_eb_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = realview_eb_init,
#ifdef CONFIG_ZONE_DMA
.dma_zone_size = SZ_256M,
.map_io = realview_pb1176_map_io,
.init_early = realview_init_early,
.init_irq = gic_init_irq,
- .timer = &realview_pb1176_timer,
+ .init_time = realview_pb1176_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = realview_pb1176_init,
#ifdef CONFIG_ZONE_DMA
.dma_zone_size = SZ_256M,
.map_io = realview_pb11mp_map_io,
.init_early = realview_init_early,
.init_irq = gic_init_irq,
- .timer = &realview_pb11mp_timer,
+ .init_time = realview_pb11mp_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = realview_pb11mp_init,
#ifdef CONFIG_ZONE_DMA
.dma_zone_size = SZ_256M,
.map_io = realview_pba8_map_io,
.init_early = realview_init_early,
.init_irq = gic_init_irq,
- .timer = &realview_pba8_timer,
+ .init_time = realview_pba8_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = realview_pba8_init,
#ifdef CONFIG_ZONE_DMA
.dma_zone_size = SZ_256M,
.map_io = realview_pbx_map_io,
.init_early = realview_init_early,
.init_irq = gic_init_irq,
- .timer = &realview_pbx_timer,
+ .init_time = realview_pbx_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = realview_pbx_init,
#ifdef CONFIG_ZONE_DMA
.dma_zone_size = SZ_256M,
.atag_offset = 0x100,
.init_irq = s5p6440_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = smdk6440_map_io,
.init_machine = smdk6440_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.restart = s5p64x0_restart,
MACHINE_END
.atag_offset = 0x100,
.init_irq = s5p6450_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = smdk6450_map_io,
.init_machine = smdk6450_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.restart = s5p64x0_restart,
MACHINE_END
/* Maintainer: Byungho Min <bhmin@samsung.com> */
.atag_offset = 0x100,
.init_irq = s5pc100_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = smdkc100_map_io,
.init_machine = smdkc100_machine_init,
- .timer = &s3c24xx_timer,
+ .init_time = s3c24xx_timer_init,
.restart = s5pc100_restart,
MACHINE_END
Kyungmin Park <kyungmin.park@samsung.com> */
.atag_offset = 0x100,
.init_irq = s5pv210_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = aquila_map_io,
.init_machine = aquila_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.restart = s5pv210_restart,
MACHINE_END
/* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
.atag_offset = 0x100,
.init_irq = s5pv210_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = goni_map_io,
.init_machine = goni_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.reserve = &goni_reserve,
.restart = s5pv210_restart,
MACHINE_END
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
.atag_offset = 0x100,
.init_irq = s5pv210_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = smdkc110_map_io,
.init_machine = smdkc110_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.restart = s5pv210_restart,
.reserve = &smdkc110_reserve,
MACHINE_END
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
.atag_offset = 0x100,
.init_irq = s5pv210_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = smdkv210_map_io,
.init_machine = smdkv210_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.restart = s5pv210_restart,
.reserve = &smdkv210_reserve,
MACHINE_END
/* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
.atag_offset = 0x100,
.init_irq = s5pv210_init_irq,
- .handle_irq = vic_handle_irq,
.map_io = torbreck_map_io,
.init_machine = torbreck_machine_init,
- .timer = &s5p_timer,
+ .init_time = s5p_timer_init,
.restart = s5pv210_restart,
MACHINE_END
.init_early = sh73a0_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = ag5evm_init,
.init_late = shmobile_init_late,
- .timer = &shmobile_timer,
+ .init_time = sh73a0_earlytimer_init,
MACHINE_END
.init_early = sh73a0_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = kota2_init,
.init_late = shmobile_init_late,
- .timer = &shmobile_timer,
+ .init_time = sh73a0_earlytimer_init,
MACHINE_END
.init_early = emev2_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = emev2_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = kzm9d_add_standard_devices,
.init_late = shmobile_init_late,
- .timer = &shmobile_timer,
+ .init_time = shmobile_timer_init,
.dt_compat = kzm9d_boards_compat_dt,
MACHINE_END
.init_early = sh73a0_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = kzm_init,
.init_late = shmobile_init_late,
- .timer = &shmobile_timer,
+ .init_time = sh73a0_earlytimer_init,
.restart = kzm9g_restart,
.dt_compat = kzm9g_boards_compat_dt,
MACHINE_END
.init_early = r8a7779_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = r8a7779_init_irq,
- .handle_irq = gic_handle_irq,
.init_machine = marzen_init,
.init_late = marzen_init_late,
- .timer = &shmobile_timer,
+ .init_time = r8a7779_earlytimer_init,
MACHINE_END
.smp = smp_ops(emev2_smp_ops),
.init_early = emev2_init_delay,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = emev2_init_irq_dt,
- .handle_irq = gic_handle_irq,
+ .init_irq = irqchip_init,
.init_machine = emev2_add_standard_devices_dt,
- .timer = &shmobile_timer,
+ .init_time = shmobile_timer_init,
.dt_compat = emev2_boards_compat_dt,
MACHINE_END
DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
.smp = smp_ops(socfpga_smp_ops),
.map_io = socfpga_map_io,
- .init_irq = gic_init_irq,
- .handle_irq = gic_handle_irq,
+ .init_irq = socfpga_init_irq,
- .timer = &dw_apb_timer,
+ .init_time = dw_apb_timer_init,
.init_machine = socfpga_cyclone5_init,
.restart = socfpga_cyclone5_restart,
.dt_compat = altera_dt_match,
DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")
.smp = smp_ops(spear13xx_smp_ops),
.map_io = spear1310_map_io,
- .init_irq = spear13xx_dt_init_irq,
- .handle_irq = gic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &spear13xx_timer,
+ .init_time = spear13xx_timer_init,
.init_machine = spear1310_dt_init,
.restart = spear_restart,
.dt_compat = spear1310_dt_board_compat,
DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree")
.smp = smp_ops(spear13xx_smp_ops),
.map_io = spear13xx_map_io,
- .init_irq = spear13xx_dt_init_irq,
- .handle_irq = gic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &spear13xx_timer,
+ .init_time = spear13xx_timer_init,
.init_machine = spear1340_dt_init,
.restart = spear_restart,
.dt_compat = spear1340_dt_board_compat,
spear_setup_of_timer();
twd_local_timer_of_register();
}
--
- static const struct of_device_id gic_of_match[] __initconst = {
- { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
- { /* Sentinel */ }
-struct sys_timer spear13xx_timer = {
- .init = spear13xx_timer_init,
--};
-
- void __init spear13xx_dt_init_irq(void)
- {
- of_irq_init(gic_of_match);
- }
DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
.map_io = spear300_map_io,
- .init_irq = spear3xx_dt_init_irq,
- .handle_irq = vic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &spear3xx_timer,
+ .init_time = spear3xx_timer_init,
.init_machine = spear300_dt_init,
.restart = spear_restart,
.dt_compat = spear300_dt_board_compat,
DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
.map_io = spear310_map_io,
- .init_irq = spear3xx_dt_init_irq,
- .handle_irq = vic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &spear3xx_timer,
+ .init_time = spear3xx_timer_init,
.init_machine = spear310_dt_init,
.restart = spear_restart,
.dt_compat = spear310_dt_board_compat,
DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
.map_io = spear320_map_io,
- .init_irq = spear3xx_dt_init_irq,
- .handle_irq = vic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &spear3xx_timer,
+ .init_time = spear3xx_timer_init,
.init_machine = spear320_dt_init,
.restart = spear_restart,
.dt_compat = spear320_dt_board_compat,
spear_setup_of_timer();
}
--
- static const struct of_device_id vic_of_match[] __initconst = {
- { .compatible = "arm,pl190-vic", .data = vic_of_init, },
- { .compatible = "st,spear300-shirq", .data = spear300_shirq_of_init, },
- { .compatible = "st,spear310-shirq", .data = spear310_shirq_of_init, },
- { .compatible = "st,spear320-shirq", .data = spear320_shirq_of_init, },
- { /* Sentinel */ }
-struct sys_timer spear3xx_timer = {
- .init = spear3xx_timer_init,
--};
-
- void __init spear3xx_dt_init_irq(void)
- {
- of_irq_init(vic_of_match);
- }
NULL
};
- static const struct of_device_id vic_of_match[] __initconst = {
- { .compatible = "arm,pl190-vic", .data = vic_of_init, },
- { /* Sentinel */ }
- };
-
- static void __init spear6xx_dt_init_irq(void)
- {
- of_irq_init(vic_of_match);
- }
-
DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
.map_io = spear6xx_map_io,
- .init_irq = spear6xx_dt_init_irq,
- .handle_irq = vic_handle_irq,
+ .init_irq = irqchip_init,
- .timer = &spear6xx_timer,
+ .init_time = spear6xx_timer_init,
.init_machine = spear600_dt_init,
.restart = spear_restart,
.dt_compat = spear600_dt_board_compat,
.smp = smp_ops(tegra_smp_ops),
.init_early = tegra20_init_early,
.init_irq = tegra_dt_init_irq,
- .handle_irq = gic_handle_irq,
- .timer = &tegra_sys_timer,
+ .init_time = tegra_init_timer,
.init_machine = tegra_dt_init,
.init_late = tegra_dt_init_late,
.restart = tegra_assert_system_reset,
.map_io = tegra_map_common_io,
.init_early = tegra30_init_early,
.init_irq = tegra_dt_init_irq,
- .handle_irq = gic_handle_irq,
- .timer = &tegra_sys_timer,
+ .init_time = tegra_init_timer,
.init_machine = tegra30_dt_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
.map_io = u300_map_io,
.nr_irqs = 0,
.init_irq = u300_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &u300_timer,
+ .init_time = u300_timer_init,
.init_machine = u300_init_machine,
.restart = u300_restart,
MACHINE_END
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
- .timer = &ux500_timer,
+ .init_time = ux500_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = mop500_init_machine,
.init_late = ux500_init_late,
MACHINE_END
.atag_offset = 0x100,
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
- .timer = &ux500_timer,
+ .init_time = ux500_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = mop500_init_machine,
.init_late = ux500_init_late,
MACHINE_END
.smp = smp_ops(ux500_smp_ops),
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
- .timer = &ux500_timer,
+ .init_time = ux500_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = hrefv60_init_machine,
.init_late = ux500_init_late,
MACHINE_END
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
- .timer = &ux500_timer,
+ .init_time = ux500_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = snowball_init_machine,
.init_late = NULL,
MACHINE_END
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
- .timer = &ux500_timer,
+ .init_time = ux500_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = u8500_init_machine,
.init_late = NULL,
.dt_compat = stericsson_dt_platform_compat,
.map_io = versatile_map_io,
.init_early = versatile_init_early,
.init_irq = versatile_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &versatile_timer,
+ .init_time = versatile_timer_init,
.init_machine = versatile_init,
.restart = versatile_restart,
MACHINE_END
.map_io = versatile_map_io,
.init_early = versatile_init_early,
.init_irq = versatile_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &versatile_timer,
+ .init_time = versatile_timer_init,
.init_machine = versatile_dt_init,
.dt_compat = versatile_dt_match,
.restart = versatile_restart,
.map_io = versatile_map_io,
.init_early = versatile_init_early,
.init_irq = versatile_init_irq,
- .handle_irq = vic_handle_irq,
- .timer = &versatile_timer,
+ .init_time = versatile_timer_init,
.init_machine = versatile_pb_init,
.restart = versatile_restart,
MACHINE_END
.map_io = v2m_map_io,
.init_early = v2m_init_early,
.init_irq = v2m_init_irq,
- .timer = &v2m_timer,
+ .init_time = v2m_timer_init,
- .handle_irq = gic_handle_irq,
.init_machine = v2m_init,
.restart = vexpress_restart,
MACHINE_END
.smp = smp_ops(vexpress_smp_ops),
.map_io = v2m_dt_map_io,
.init_early = v2m_dt_init_early,
- .init_irq = v2m_dt_init_irq,
+ .init_irq = irqchip_init,
- .timer = &v2m_dt_timer,
+ .init_time = v2m_dt_timer_init,
.init_machine = v2m_dt_init,
- .handle_irq = gic_handle_irq,
.restart = vexpress_restart,
MACHINE_END
MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
.map_io = xilinx_map_io,
- .init_irq = xilinx_irq_init,
- .handle_irq = gic_handle_irq,
+ .init_irq = irqchip_init,
.init_machine = xilinx_init_machine,
- .timer = &xttcpss_sys_timer,
+ .init_time = xilinx_zynq_timer_init,
.dt_compat = xilinx_dt_match,
MACHINE_END
#define TRACE_SYSCALLS()
#endif
+#ifdef CONFIG_CLKSRC_OF
+#define CLKSRC_OF_TABLES() . = ALIGN(8); \
+ VMLINUX_SYMBOL(__clksrc_of_table) = .; \
+ *(__clksrc_of_table) \
+ *(__clksrc_of_table_end)
+#else
+#define CLKSRC_OF_TABLES()
+#endif
+
+ #ifdef CONFIG_IRQCHIP
+ #define IRQCHIP_OF_MATCH_TABLE() \
+ . = ALIGN(8); \
+ VMLINUX_SYMBOL(__irqchip_begin) = .; \
+ *(__irqchip_of_table) \
+ *(__irqchip_of_end)
+ #else
+ #define IRQCHIP_OF_MATCH_TABLE()
+ #endif
+
#define KERNEL_DTB() \
STRUCT_ALIGN(); \
VMLINUX_SYMBOL(__dtb_start) = .; \
DEV_DISCARD(init.rodata) \
CPU_DISCARD(init.rodata) \
MEM_DISCARD(init.rodata) \
- KERNEL_DTB()
+ CLKSRC_OF_TABLES() \
+ KERNEL_DTB() \
+ IRQCHIP_OF_MATCH_TABLE()
#define INIT_TEXT \
*(.init.text) \
git.openpandora.org / pandora-kernel.git / commitdiff