staging: comedi: ni_stc.h: tidy up AO_Trigger_Select_Register and bits

Rename the CamelCase. Use the BIT() macro to define the bits.

Tidy up the ni_ao_cmd() by using a local var to mask/set the bits then
programming the register in the common code path.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index 2522bab..0634bab 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -361,7 +361,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
        [NISTC_AI_TRIG_SEL_REG]         = { 0x17e, 2 },
        [NISTC_AI_DIV_LOADA_REG]        = { 0x180, 4 },
        [NISTC_AO_START_SEL_REG]        = { 0x184, 2 },
-       [AO_Trigger_Select_Register]    = { 0x186, 2 },
+       [NISTC_AO_TRIG_SEL_REG]         = { 0x186, 2 },
        [G_Autoincrement_Register(0)]   = { 0x188, 2 },
        [G_Autoincrement_Register(1)]   = { 0x18a, 2 },
        [AO_Mode_3_Register]            = { 0x18c, 2 },
@@ -2902,6 +2902,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
        int bits;
        int i;
        unsigned trigvar;
+       unsigned val;
 
        if (dev->irq == 0) {
                dev_err(dev->class_dev, "cannot run command without an irq\n");
@@ -2936,29 +2937,36 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
                devpriv->ao_mode1 |= NISTC_AO_MODE1_TRIGGER_ONCE;
        }
        ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG);
+
+       val = devpriv->ao_trigger_select;
        switch (cmd->start_src) {
        case TRIG_INT:
        case TRIG_NOW:
-               devpriv->ao_trigger_select &=
-                   ~(AO_START1_Polarity | AO_START1_Select(-1));
-               devpriv->ao_trigger_select |= AO_START1_Edge | AO_START1_Sync;
-               ni_stc_writew(dev, devpriv->ao_trigger_select,
-                             AO_Trigger_Select_Register);
+               val &= ~(NISTC_AO_TRIG_START1_POLARITY |
+                        NISTC_AO_TRIG_START1_SEL_MASK);
+               val |= NISTC_AO_TRIG_START1_EDGE |
+                      NISTC_AO_TRIG_START1_SYNC;
                break;
        case TRIG_EXT:
-               devpriv->ao_trigger_select =
-                   AO_START1_Select(CR_CHAN(cmd->start_arg) + 1);
-               if (cmd->start_arg & CR_INVERT)
-                       devpriv->ao_trigger_select |= AO_START1_Polarity;       /*  0=active high, 1=active low. see daq-stc 3-24 (p186) */
-               if (cmd->start_arg & CR_EDGE)
-                       devpriv->ao_trigger_select |= AO_START1_Edge;   /*  0=edge detection disabled, 1=enabled */
+               val = NISTC_AO_TRIG_START1_SEL(CR_CHAN(cmd->start_arg) + 1);
+               if (cmd->start_arg & CR_INVERT) {
+                       /* 0=active high, 1=active low. see daq-stc 3-24 (p186) */
+                       val |= NISTC_AO_TRIG_START1_POLARITY;
+               }
+               if (cmd->start_arg & CR_EDGE) {
+                       /* 0=edge detection disabled, 1=enabled */
+                       val |= NISTC_AO_TRIG_START1_EDGE;
+               }
                ni_stc_writew(dev, devpriv->ao_trigger_select,
-                             AO_Trigger_Select_Register);
+                             NISTC_AO_TRIG_SEL_REG);
                break;
        default:
                BUG();
                break;
        }
+       devpriv->ao_trigger_select = val;
+       ni_stc_writew(dev, devpriv->ao_trigger_select, NISTC_AO_TRIG_SEL_REG);
+
        devpriv->ao_mode3 &= ~AO_Trigger_Length;
        ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
 
@@ -3211,7 +3219,7 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
        ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
        devpriv->ao_trigger_select = 0;
        ni_stc_writew(dev, devpriv->ao_trigger_select,
-                     AO_Trigger_Select_Register);
+                     NISTC_AO_TRIG_SEL_REG);
        if (devpriv->is_6xxx) {
                unsigned immediate_bits = 0;
                unsigned i;

diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h
index fc80b17..3859504 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_stc.h
+++ b/drivers/staging/comedi/drivers/ni_stc.h
@@ -348,6 +348,17 @@
 #define NISTC_AO_START_EDGE            BIT(5)
 #define NISTC_AO_START_SEL(x)          (((x) & 0x1f) << 0)
 
+#define NISTC_AO_TRIG_SEL_REG          67
+#define NISTC_AO_TRIG_UI2_EXT_GATE_ENA BIT(15)
+#define NISTC_AO_TRIG_DELAYED_START1   BIT(14)
+#define NISTC_AO_TRIG_START1_POLARITY  BIT(13)
+#define NISTC_AO_TRIG_UI2_SRC_POLARITY BIT(12)
+#define NISTC_AO_TRIG_UI2_SRC_SEL(x)   (((x) & 0x1f) << 7)
+#define NISTC_AO_TRIG_START1_SYNC      BIT(6)
+#define NISTC_AO_TRIG_START1_EDGE      BIT(5)
+#define NISTC_AO_TRIG_START1_SEL(x)    (((x) & 0x1f) << 0)
+#define NISTC_AO_TRIG_START1_SEL_MASK  NISTC_AO_TRIG_START1_SEL(0x1f)
+
 #define AI_Status_1_Register           2
 #define Interrupt_A_St                         0x8000
 #define AI_FIFO_Full_St                                0x4000
@@ -406,16 +417,6 @@ enum Joint_Status_2_Bits {
 #define AO_BC_Save_Registers           18
 #define AO_UC_Save_Registers           20
 
-#define AO_Trigger_Select_Register     67
-#define AO_UI2_External_Gate_Enable            _bit15
-#define AO_Delayed_START1                      _bit14
-#define AO_START1_Polarity                     _bit13
-#define AO_UI2_Source_Polarity                 _bit12
-#define AO_UI2_Source_Select(x)                        (((x)&0x1f)<<7)
-#define AO_START1_Sync                         _bit6
-#define AO_START1_Edge                         _bit5
-#define AO_START1_Select(x)                    (((x)&0x1f)<<0)
-
 #define AO_Mode_3_Register             70
 #define AO_UI2_Switch_Load_Next_TC             _bit13
 #define AO_UC_Switch_Load_Every_BC_TC          _bit12