]> git.openpandora.org Git - pandora-kernel.git/commitdiff
pinctrl/ARM: move GPIO and pinctrl deps to device tree
authorLinus Walleij <linus.walleij@linaro.org>
Thu, 23 Jul 2015 07:09:49 +0000 (09:09 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 27 Jul 2015 13:04:40 +0000 (15:04 +0200)
This gets the GPIO ranges out of the driver and into the device
tree where they belong. Standard DT bindings already exist for
this. Since no systems with this are deployed we can just augment
all device trees and the drivers at the same time and simplify
the world.

This also defines the array of GPIO chips related to the pin
controller.

Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-dbx5x0.dtsi
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c
drivers/pinctrl/nomadik/pinctrl-nomadik-db8540.c
drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c
drivers/pinctrl/nomadik/pinctrl-nomadik.c
drivers/pinctrl/nomadik/pinctrl-nomadik.h

index 853684ad777337771b48be2982a7c525f95ef1d6..b8fadb1d861623a0d1d6b0e04908a8ff35d7cee4 100644 (file)
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <0>;
-
+                       gpio-ranges = <&pinctrl 0 0 32>;
                        clocks = <&prcc_pclk 1 9>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <1>;
-
+                       gpio-ranges = <&pinctrl 0 32 5>;
                        clocks = <&prcc_pclk 1 9>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <2>;
-
+                       gpio-ranges = <&pinctrl 0 64 32>;
                        clocks = <&prcc_pclk 3 8>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <3>;
-
+                       gpio-ranges = <&pinctrl 0 96 2>;
                        clocks = <&prcc_pclk 3 8>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <4>;
-
+                       gpio-ranges = <&pinctrl 0 128 32>;
                        clocks = <&prcc_pclk 3 8>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <5>;
-
+                       gpio-ranges = <&pinctrl 0 160 12>;
                        clocks = <&prcc_pclk 3 8>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <6>;
-
+                       gpio-ranges = <&pinctrl 0 192 32>;
                        clocks = <&prcc_pclk 2 11>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <7>;
-
+                       gpio-ranges = <&pinctrl 0 224 7>;
                        clocks = <&prcc_pclk 2 11>;
                };
 
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-bank = <8>;
-
+                       gpio-ranges = <&pinctrl 0 256 12>;
                        clocks = <&prcc_pclk 5 1>;
                };
 
-               pinctrl {
+               pinctrl: pinctrl {
                        compatible = "stericsson,db8500-pinctrl";
+                       nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>,
+                                               <&gpio4>, <&gpio5>, <&gpio6>, <&gpio7>,
+                                               <&gpio8>;
                        prcm = <&prcmu>;
                };
 
index 9a5f2ba139b7376018d8e48a6263e2ad711fa865..6846e3eb027d01980eb29c58a48f3e62832e5254 100644 (file)
@@ -52,6 +52,7 @@
                gpio-controller;
                #gpio-cells = <2>;
                gpio-bank = <0>;
+               gpio-ranges = <&pinctrl 0 0 32>;
                clocks = <&pclk>;
        };
 
@@ -65,6 +66,7 @@
                gpio-controller;
                #gpio-cells = <2>;
                gpio-bank = <1>;
+               gpio-ranges = <&pinctrl 0 32 32>;
                clocks = <&pclk>;
        };
 
                gpio-controller;
                #gpio-cells = <2>;
                gpio-bank = <2>;
+               gpio-ranges = <&pinctrl 0 64 32>;
                clocks = <&pclk>;
        };
 
        gpio3: gpio@101e7000 {
                compatible = "st,nomadik-gpio";
                reg =  <0x101e7000 0x80>;
+               ngpio = <28>;
                interrupt-parent = <&vica>;
                interrupts = <9>;
                interrupt-controller;
                gpio-controller;
                #gpio-cells = <2>;
                gpio-bank = <3>;
+               gpio-ranges = <&pinctrl 0 96 28>;
                clocks = <&pclk>;
        };
 
-       pinctrl {
+       pinctrl: pinctrl {
                compatible = "stericsson,stn8815-pinctrl";
+               nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
                /* Pin configurations */
                uart0 {
                        uart0_default_mux: uart0_mux {
index c74840729648e0fe7f1e8867aaea61cfb3a99005..8392083514fb63242a65927a4e51db0c27e030e3 100644 (file)
@@ -355,25 +355,6 @@ static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
        PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
 };
 
-#define DB8500_GPIO_RANGE(a, b, c) { .name = "DB8500", .id = a, .base = b, \
-                       .pin_base = b, .npins = c }
-
-/*
- * This matches the 32-pin gpio chips registered by the GPIO portion. This
- * cannot be const since we assign the struct gpio_chip * pointer at runtime.
- */
-static struct pinctrl_gpio_range nmk_db8500_ranges[] = {
-       DB8500_GPIO_RANGE(0, 0, 32),
-       DB8500_GPIO_RANGE(1, 32, 5),
-       DB8500_GPIO_RANGE(2, 64, 32),
-       DB8500_GPIO_RANGE(3, 96, 2),
-       DB8500_GPIO_RANGE(4, 128, 32),
-       DB8500_GPIO_RANGE(5, 160, 12),
-       DB8500_GPIO_RANGE(6, 192, 32),
-       DB8500_GPIO_RANGE(7, 224, 7),
-       DB8500_GPIO_RANGE(8, 256, 12),
-};
-
 /*
  * Read the pin group names like this:
  * u0_a_1    = first groups of pins for uart0 on alt function a
@@ -1238,8 +1219,6 @@ static const u16 db8500_prcm_gpiocr_regs[] = {
 };
 
 static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
-       .gpio_ranges = nmk_db8500_ranges,
-       .gpio_num_ranges = ARRAY_SIZE(nmk_db8500_ranges),
        .pins = nmk_db8500_pins,
        .npins = ARRAY_SIZE(nmk_db8500_pins),
        .functions = nmk_db8500_functions,
index d7ba5443bae05593fe71dc5f54e2b9dbc9369c0a..2860eafd1b42005794a840da26518f948d16b149 100644 (file)
@@ -341,28 +341,6 @@ static const struct pinctrl_pin_desc nmk_db8540_pins[] = {
        PINCTRL_PIN(DB8540_PIN_D17, "GPIO267_D17"),
 };
 
-#define DB8540_GPIO_RANGE(a, b, c) { .name = "db8540", .id = a, .base = b, \
-                       .pin_base = b, .npins = c }
-
-/*
- * This matches the 32-pin gpio chips registered by the GPIO portion. This
- * cannot be const since we assign the struct gpio_chip * pointer at runtime.
- */
-static struct pinctrl_gpio_range nmk_db8540_ranges[] = {
-       DB8540_GPIO_RANGE(0, 0, 18),
-       DB8540_GPIO_RANGE(0, 22, 7),
-       DB8540_GPIO_RANGE(1, 33, 6),
-       DB8540_GPIO_RANGE(2, 64, 4),
-       DB8540_GPIO_RANGE(2, 70, 18),
-       DB8540_GPIO_RANGE(3, 116, 12),
-       DB8540_GPIO_RANGE(4, 128, 32),
-       DB8540_GPIO_RANGE(5, 160, 9),
-       DB8540_GPIO_RANGE(6, 192, 23),
-       DB8540_GPIO_RANGE(6, 219, 5),
-       DB8540_GPIO_RANGE(7, 224, 9),
-       DB8540_GPIO_RANGE(8, 256, 12),
-};
-
 /*
  * Read the pin group names like this:
  * u0_a_1    = first groups of pins for uart0 on alt function a
@@ -1247,8 +1225,6 @@ static const u16 db8540_prcm_gpiocr_regs[] = {
 };
 
 static const struct nmk_pinctrl_soc_data nmk_db8540_soc = {
-       .gpio_ranges = nmk_db8540_ranges,
-       .gpio_num_ranges = ARRAY_SIZE(nmk_db8540_ranges),
        .pins = nmk_db8540_pins,
        .npins = ARRAY_SIZE(nmk_db8540_pins),
        .functions = nmk_db8540_functions,
index 2cd71470f270071196edb4e4bb68de4b302fdb9c..a2de3b7a57a07d0abea37c65e5793f29d2a8beff 100644 (file)
@@ -264,20 +264,6 @@ static const struct pinctrl_pin_desc nmk_stn8815_pins[] = {
        PINCTRL_PIN(STN8815_PIN_J22, "GPIO123_J22"),
 };
 
-#define STN8815_GPIO_RANGE(a, b, c) { .name = "STN8815", .id = a, .base = b, \
-                       .pin_base = b, .npins = c }
-
-/*
- * This matches the 32-pin gpio chips registered by the GPIO portion. This
- * cannot be const since we assign the struct gpio_chip * pointer at runtime.
- */
-static struct pinctrl_gpio_range nmk_stn8815_ranges[] = {
-       STN8815_GPIO_RANGE(0, 0, 32),
-       STN8815_GPIO_RANGE(1, 32, 32),
-       STN8815_GPIO_RANGE(2, 64, 32),
-       STN8815_GPIO_RANGE(3, 96, 28),
-};
-
 /*
  * Read the pin group names like this:
  * u0_a_1    = first groups of pins for uart0 on alt function a
@@ -342,8 +328,6 @@ static const struct nmk_function nmk_stn8815_functions[] = {
 };
 
 static const struct nmk_pinctrl_soc_data nmk_stn8815_soc = {
-       .gpio_ranges = nmk_stn8815_ranges,
-       .gpio_num_ranges = ARRAY_SIZE(nmk_stn8815_ranges),
        .pins = nmk_stn8815_pins,
        .npins = ARRAY_SIZE(nmk_stn8815_pins),
        .functions = nmk_stn8815_functions,