rockchip: rk35xx: Remove use of eMMC DDR52 mode
authorJonas Karlman <jonas@kwiboo.se>
Sun, 4 Feb 2024 20:53:05 +0000 (20:53 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Mon, 5 Feb 2024 07:00:51 +0000 (15:00 +0800)
Testing has shown that writing to eMMC using DDR52 mode does not seem to
work on RK356x and RK3588 boards.

A simple test of writing a single block to e.g. sector 0x4000 fails:

  # Rescan using DDR52 mode
  => mmc rescan 4

  # Write a single block to sector 0x4000 fails with ERROR
  => mmc write 20000000 4000 1

With the MMC_SPEED_MODE_SET Kconfig option enabled.

Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes in affected
board u-boot.dtsi files.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
12 files changed:
arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
arch/arm/dts/rk3566-soquartz-u-boot.dtsi
arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi

index 11976fd..930d660 100644 (file)
@@ -8,7 +8,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        pinctrl-names = "default";
        pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
 };
index 8de9d15..c235b43 100644 (file)
@@ -4,7 +4,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        pinctrl-names = "default";
        pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
 };
index 158f652..e0e501d 100644 (file)
@@ -7,5 +7,4 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
 };
index f65f406..5e46a24 100644 (file)
@@ -4,7 +4,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        pinctrl-names = "default";
        pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
 };
index a44ac35..1597473 100644 (file)
@@ -8,7 +8,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs400-1_8v;
        mmc-hs400-enhanced-strobe;
        pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
index 62f572c..64c4337 100644 (file)
@@ -14,7 +14,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        mmc-hs400-enhanced-strobe;
index ecba91a..1fc71fa 100644 (file)
@@ -8,7 +8,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        mmc-hs400-enhanced-strobe;
index caf5244..74755a4 100644 (file)
@@ -16,7 +16,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        mmc-hs400-enhanced-strobe;
index 46ebb77..5b823fc 100644 (file)
@@ -20,7 +20,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        mmc-hs400-enhanced-strobe;
index e99e601..9ee9dd0 100644 (file)
@@ -31,7 +31,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
 };
 
index 471508a..ca2a684 100644 (file)
@@ -8,7 +8,6 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
 };
 
index 9a6a353..efba0c3 100644 (file)
@@ -7,6 +7,5 @@
 
 &sdhci {
        cap-mmc-highspeed;
-       mmc-ddr-1_8v;
        mmc-hs200-1_8v;
 };