OMAP3 SDRC: Add 166MHz, 83MHz SDRC settings for the BeagleBoard

The BeagleBoard u-boot uses DPLL3 settings that result in 83000000 /
166000000 Hz clock rates for the SDRC, rather than the derated DPLL3
settings used by earlier bootloaders.

This patch was posted in January, but was accidentally left out
of the master branch. For the original patch, see:

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08306.html

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>