sandbox64_clang:
TEST_PY_BD: "sandbox64"
OVERRIDE: "-O clang-16"
- sandbox_nolto:
- TEST_PY_BD: "sandbox"
- BUILD_ENV: "NO_LTO=1"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
OVERRIDE: "-O clang-16"
<<: *buildman_and_testpy_dfn
-sandbox without LTO test.py:
- variables:
- TEST_PY_BD: "sandbox"
- BUILD_ENV: "NO_LTO=1"
- <<: *buildman_and_testpy_dfn
-
sandbox64 test.py:
variables:
TEST_PY_BD: "sandbox64"
OVERRIDE: "-O clang-16"
<<: *buildman_and_testpy_dfn
-sandbox64 without LTO test.py:
- variables:
- TEST_PY_BD: "sandbox64"
- BUILD_ENV: "NO_LTO=1"
- <<: *buildman_and_testpy_dfn
-
sandbox_spl test.py:
variables:
TEST_PY_BD: "sandbox_spl"
libs-$(CONFIG_API) += api/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
libs-y += boot/
-libs-y += cmd/
+libs-$(CONFIG_CMDLINE) += cmd/
libs-y += common/
libs-$(CONFIG_OF_EMBED) += dts/
libs-y += env/
@# is enable to tell 'deprecated' that one of these symbols exists
$(call deprecated,CONFIG_TIMER,Timer drivers,v2023.01,$(if $(strip $(CFG_SYS_TIMER_RATE)$(CFG_SYS_TIMER_COUNTER)),x))
$(call deprecated,CONFIG_DM_SERIAL,Serial drivers,v2023.04,$(CONFIG_SERIAL))
- $(call deprecated,CONFIG_DM_SCSI,SCSI drivers,v2023.04,$(CONFIG_SCSI))
@# Check that this build does not override OF_HAS_PRIOR_STAGE by
@# disabling OF_BOARD.
$(call cmd,ofcheck,$(KCONFIG_CONFIG))
Support for a lightweight UBI (fastmap) scanner and
loader
- CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
- CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
- CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
- CFG_SYS_NAND_ECCPOS, CFG_SYS_NAND_ECCSIZE,
- CFG_SYS_NAND_ECCBYTES
+ CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_SIZE,
+ CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE,
+ CONFIG_SYS_NAND_BAD_BLOCK_POS, CFG_SYS_NAND_ECCPOS,
+ CFG_SYS_NAND_ECCSIZE, CFG_SYS_NAND_ECCBYTES
Defines the size and behavior of the NAND that SPL uses
to read U-Boot
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
-#if defined(CONFIG_SCSI)
- specs[ENUM_SCSI].max_dev = SCSI_MAX_DEVICE;
- specs[ENUM_SCSI].enum_started = 0;
- specs[ENUM_SCSI].enum_ended = 0;
- specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
- specs[ENUM_SCSI].name = "scsi";
-#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
select ARCH_SUPPORTS_LTO
select BOARD_LATE_INIT
select BZIP2
- select CMD_POWEROFF
+ select CMD_POWEROFF if CMDLINE
select DM
select DM_EVENT
select DM_FUZZING_ENGINE
select PCI_ENDPOINT
select SPI
select SUPPORT_OF_CONTROL
- select SYSRESET_CMD_POWEROFF
+ select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
select SYS_CACHE_SHIFT_4
select IRQ
- select SUPPORT_EXTENSION_SCAN
+ select SUPPORT_EXTENSION_SCAN if CMDLINE
select SUPPORT_ACPI
imply BITREVERSE
select BLOBLIST
imply BINMAN
imply CMD_MBR
imply CMD_MMC
+ imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
+ imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
+ imply CMD_SYSBOOT if BOOTSTD_FULL
config SH
bool "SuperH architecture"
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
- imply DM_SCSI
+ imply SCSI
imply DM_SERIAL
imply DM_SPI
imply DM_SPI_FLASH
select GPIO_EXTRA_HEADER
select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
select SPL_SEPARATE_BSS if SPL
+ imply SYS_THUMB_BUILD
config ARCH_DAVINCI
bool "TI DaVinci"
select DM_SPI_FLASH if SPI
select DM_KEYBOARD
select DM_MMC if MMC
- select DM_SCSI if SCSI
select DM_SERIAL
select OF_BOARD_SETUP
select OF_CONTROL
select PCI
select DM_RNG
select DM_RTC
- select DM_SCSI
+ select SCSI
select DM_SERIAL
select DM_SPI
select GPIO_EXTRA_HEADER
select REGMAP
select SYSCON
select SYSRESET
- select SYS_THUMB_BUILD
+ select SYS_THUMB_BUILD if !ARM64
imply SPL_SYSRESET
imply CMD_DM
imply CMD_POWEROFF
select PCI
select DM_PCI
select SCSI
- select DM_SCSI
select DM_SERIAL
imply CMD_PCI
help
stm32mp15xx-dhcor-drc-compact.dtb \
stm32mp15xx-dhcor-testbench.dtb
+dtb-$(CONFIG_STM32MP25X) += \
+ stm32mp257f-ev1.dtb
+
dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am654-base-board.dtb \
k3-am654-r5-base-board.dtb \
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include <dt-bindings/pinctrl/stm32-pinfunc.h>
+
+&pinctrl {
+ usart2_pins_a: usart2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+ bias-disable;
+ };
+ };
+
+ usart2_idle_pins_a: usart2-idle-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+ bias-disable;
+ };
+ };
+
+ usart2_sleep_pins_a: usart2-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
+ <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright : STMicroelectronics 2023
+ */
+
+/ {
+ aliases {
+ gpio0 = &gpioa;
+ gpio1 = &gpiob;
+ gpio2 = &gpioc;
+ gpio3 = &gpiod;
+ gpio4 = &gpioe;
+ gpio5 = &gpiof;
+ gpio6 = &gpiog;
+ gpio7 = &gpioh;
+ gpio8 = &gpioi;
+ gpio9 = &gpioj;
+ gpio10 = &gpiok;
+ gpio25 = &gpioz;
+ pinctrl0 = &pinctrl;
+ pinctrl1 = &pinctrl_z;
+ };
+
+ firmware {
+ optee {
+ bootph-all;
+ };
+ };
+
+ /* need PSCI for sysreset during board_f */
+ psci {
+ bootph-all;
+ };
+
+ soc@0 {
+ bootph-all;
+ };
+};
+
+&gpioa {
+ bootph-all;
+};
+
+&gpiob {
+ bootph-all;
+};
+
+&gpioc {
+ bootph-all;
+};
+
+&gpiod {
+ bootph-all;
+};
+
+&gpioe {
+ bootph-all;
+};
+
+&gpiof {
+ bootph-all;
+};
+
+&gpiog {
+ bootph-all;
+};
+
+&gpioh {
+ bootph-all;
+};
+
+&gpioi {
+ bootph-all;
+};
+
+&gpioj {
+ bootph-all;
+};
+
+&gpiok {
+ bootph-all;
+};
+
+&gpioz {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&rifsc {
+ bootph-all;
+};
+
+&scmi_clk {
+ bootph-all;
+};
+
+&syscfg {
+ bootph-all;
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a35";
+ device_type = "cpu";
+ reg = <0>;
+ enable-method = "psci";
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a35-pmu";
+ interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>;
+ interrupt-parent = <&intc>;
+ };
+
+ arm_wdt: watchdog {
+ compatible = "arm,smc-wdt";
+ arm,smc-id = <0xb200005a>;
+ status = "disabled";
+ };
+
+ clocks {
+ ck_flexgen_08: ck-flexgen-08 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
+
+ ck_flexgen_51: ck-flexgen-51 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+
+ ck_icn_ls_mcu: ck-icn-ls-mcu {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+
+ scmi {
+ compatible = "linaro,scmi-optee";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linaro,optee-channel-id = <0>;
+
+ scmi_clk: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+
+ scmi_reset: protocol@16 {
+ reg = <0x16>;
+ #reset-cells = <1>;
+ };
+ };
+ };
+
+ intc: interrupt-controller@4ac00000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <1>;
+ interrupt-controller;
+ reg = <0x0 0x4ac10000 0x0 0x1000>,
+ <0x0 0x4ac20000 0x0 0x2000>,
+ <0x0 0x4ac40000 0x0 0x2000>,
+ <0x0 0x4ac60000 0x0 0x2000>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ always-on;
+ };
+
+ soc@0 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+ ranges = <0x0 0x0 0x0 0x80000000>;
+
+ rifsc: rifsc-bus@42080000 {
+ compatible = "simple-bus";
+ reg = <0x42080000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usart2: serial@400e0000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x400e0000 0x400>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ck_flexgen_08>;
+ status = "disabled";
+ };
+ };
+
+ syscfg: syscon@44230000 {
+ compatible = "st,stm32mp25-syscfg", "syscon";
+ reg = <0x44230000 0x10000>;
+ };
+
+ pinctrl: pinctrl@44240000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,stm32mp257-pinctrl";
+ ranges = <0 0x44240000 0xa0400>;
+ pins-are-numbered;
+
+ gpioa: gpio@44240000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x0 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOA";
+ status = "disabled";
+ };
+
+ gpiob: gpio@44250000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x10000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOB";
+ status = "disabled";
+ };
+
+ gpioc: gpio@44260000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x20000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOC";
+ status = "disabled";
+ };
+
+ gpiod: gpio@44270000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x30000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOD";
+ status = "disabled";
+ };
+
+ gpioe: gpio@44280000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOE";
+ status = "disabled";
+ };
+
+ gpiof: gpio@44290000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x50000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOF";
+ status = "disabled";
+ };
+
+ gpiog: gpio@442a0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x60000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOG";
+ status = "disabled";
+ };
+
+ gpioh: gpio@442b0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x70000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOH";
+ status = "disabled";
+ };
+
+ gpioi: gpio@442c0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x80000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOI";
+ status = "disabled";
+ };
+
+ gpioj: gpio@442d0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x90000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOJ";
+ status = "disabled";
+ };
+
+ gpiok: gpio@442e0000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0xa0000 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOK";
+ status = "disabled";
+ };
+ };
+
+ pinctrl_z: pinctrl@46200000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,stm32mp257-z-pinctrl";
+ ranges = <0 0x46200000 0x400>;
+ pins-are-numbered;
+
+ gpioz: gpio@46200000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0 0x400>;
+ clocks = <&ck_icn_ls_mcu>;
+ st,bank-name = "GPIOZ";
+ st,bank-ioport = <11>;
+ status = "disabled";
+ };
+
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include "stm32mp251.dtsi"
+
+/ {
+ cpus {
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a35";
+ device_type = "cpu";
+ reg = <1>;
+ enable-method = "psci";
+ };
+ };
+
+ arm-pmu {
+ interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include "stm32mp253.dtsi"
+
+/ {
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+#include "stm32mp255.dtsi"
+
+/ {
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ */
+
+#include "stm32mp25-u-boot.dtsi"
+
+&usart2 {
+ bootph-all;
+};
+
+&usart2_pins_a {
+ bootph-all;
+ pins1 {
+ bootph-all;
+ };
+ pins2 {
+ bootph-all;
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/dts-v1/;
+
+#include "stm32mp257.dtsi"
+#include "stm32mp25xf.dtsi"
+#include "stm32mp25-pinctrl.dtsi"
+#include "stm32mp25xxai-pinctrl.dtsi"
+
+/ {
+ model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
+ compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
+
+ aliases {
+ serial0 = &usart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x1 0x0>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ fw@80000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x80000000 0x0 0x4000000>;
+ no-map;
+ };
+ };
+};
+
+&arm_wdt {
+ timeout-sec = <32>;
+ status = "okay";
+};
+
+&usart2 {
+ pinctrl-names = "default", "idle", "sleep";
+ pinctrl-0 = <&usart2_pins_a>;
+ pinctrl-1 = <&usart2_idle_pins_a>;
+ pinctrl-2 = <&usart2_sleep_pins_a>;
+ status = "okay";
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/ {
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/ {
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&pinctrl {
+ st,package = <STM32MP_PKG_AI>;
+
+ gpioa: gpio@44240000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 0 16>;
+ };
+
+ gpiob: gpio@44250000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 16 16>;
+ };
+
+ gpioc: gpio@44260000 {
+ status = "okay";
+ ngpios = <14>;
+ gpio-ranges = <&pinctrl 0 32 14>;
+ };
+
+ gpiod: gpio@44270000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 48 16>;
+ };
+
+ gpioe: gpio@44280000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 64 16>;
+ };
+
+ gpiof: gpio@44290000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 80 16>;
+ };
+
+ gpiog: gpio@442a0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 96 16>;
+ };
+
+ gpioh: gpio@442b0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 2 114 12>;
+ };
+
+ gpioi: gpio@442c0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 128 16>;
+ };
+
+ gpioj: gpio@442d0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 144 16>;
+ };
+
+ gpiok: gpio@442e0000 {
+ status = "okay";
+ ngpios = <8>;
+ gpio-ranges = <&pinctrl 0 160 8>;
+ };
+};
+
+&pinctrl_z {
+ gpioz: gpio@46200000 {
+ status = "okay";
+ ngpios = <10>;
+ gpio-ranges = <&pinctrl_z 0 400 10>;
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&pinctrl {
+ st,package = <STM32MP_PKG_AK>;
+
+ gpioa: gpio@44240000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 0 16>;
+ };
+
+ gpiob: gpio@44250000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 16 16>;
+ };
+
+ gpioc: gpio@44260000 {
+ status = "okay";
+ ngpios = <14>;
+ gpio-ranges = <&pinctrl 0 32 14>;
+ };
+
+ gpiod: gpio@44270000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 48 16>;
+ };
+
+ gpioe: gpio@44280000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 64 16>;
+ };
+
+ gpiof: gpio@44290000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 80 16>;
+ };
+
+ gpiog: gpio@442a0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 96 16>;
+ };
+
+ gpioh: gpio@442b0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 2 114 12>;
+ };
+
+ gpioi: gpio@442c0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 0 128 12>;
+ };
+};
+
+&pinctrl_z {
+ gpioz: gpio@46200000 {
+ status = "okay";
+ ngpios = <10>;
+ gpio-ranges = <&pinctrl_z 0 400 10>;
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&pinctrl {
+ st,package = <STM32MP_PKG_AL>;
+
+ gpioa: gpio@44240000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 0 16>;
+ };
+
+ gpiob: gpio@44250000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 16 16>;
+ };
+
+ gpioc: gpio@44260000 {
+ status = "okay";
+ ngpios = <14>;
+ gpio-ranges = <&pinctrl 0 32 14>;
+ };
+
+ gpiod: gpio@44270000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 48 16>;
+ };
+
+ gpioe: gpio@44280000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 64 16>;
+ };
+
+ gpiof: gpio@44290000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 80 16>;
+ };
+
+ gpiog: gpio@442a0000 {
+ status = "okay";
+ ngpios = <16>;
+ gpio-ranges = <&pinctrl 0 96 16>;
+ };
+
+ gpioh: gpio@442b0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 2 114 12>;
+ };
+
+ gpioi: gpio@442c0000 {
+ status = "okay";
+ ngpios = <12>;
+ gpio-ranges = <&pinctrl 0 128 12>;
+ };
+};
+
+&pinctrl_z {
+ gpioz: gpio@46200000 {
+ status = "okay";
+ ngpios = <10>;
+ gpio-ranges = <&pinctrl_z 0 400 10>;
+ };
+};
#ifndef _CPU_H
#define _CPU_H
+#include <asm/arch/omap.h>
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
};
#endif
-#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-#define DCACHE_DEFAULT_OPTION DCACHE_WRITETHROUGH
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
-#define DCACHE_DEFAULT_OPTION DCACHE_WRITEALLOC
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEBACK)
-#define DCACHE_DEFAULT_OPTION DCACHE_WRITEBACK
-#endif
-
/* Size of an MMU section */
enum {
#ifdef CONFIG_ARMV7_LPAE
#endif /* CONFIG_ARM64 */
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+#define DCACHE_DEFAULT_OPTION DCACHE_WRITETHROUGH
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
+#define DCACHE_DEFAULT_OPTION DCACHE_WRITEALLOC
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEBACK)
+#define DCACHE_DEFAULT_OPTION DCACHE_WRITEBACK
+#endif
+
#ifndef __ASSEMBLY__
/**
* save_boot_params() - Save boot parameters before starting reset sequence
#include <cpu_func.h>
#include <efi_loader.h>
#include <irq_func.h>
+#include <semihosting.h>
#include <asm/global_data.h>
#include <asm/proc-armv/ptrace.h>
#include <asm/ptrace.h>
regs->ARM_pc = pc | (regs->ARM_pc & PCMASK);
}
+/*
+ * Try to "emulate" a semihosting call in the event that we don't have a
+ * debugger attached.
+ */
+static bool smh_emulate_trap(struct pt_regs *regs)
+{
+ if (regs->ARM_cpsr & T_BIT) {
+ u16 *insn = (u16 *)(regs->ARM_pc - 2);
+
+ if (*insn != SMH_T32_SVC)
+ return false;
+ } else {
+ u32 *insn = (u32 *)(regs->ARM_pc - 4);
+
+ if (*insn != SMH_A32_SVC)
+ return false;
+ }
+
+ /* Avoid future semihosting calls */
+ disable_semihosting();
+
+ /* Just pretend the call failed */
+ regs->ARM_r0 = -1;
+ return true;
+}
+
void do_undefined_instruction (struct pt_regs *pt_regs)
{
efi_restore_gd();
void do_software_interrupt (struct pt_regs *pt_regs)
{
+ if (CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) &&
+ smh_emulate_trap(pt_regs))
+ return;
+
efi_restore_gd();
printf ("software interrupt\n");
fixup_pc(pt_regs, -4);
#elif defined(CONFIG_SYS_THUMB_BUILD)
svc #0xab
#else
+#if CONFIG_SYS_ARM_ARCH < 7
+ /* Before the ARMv7 exception model, svc (swi) clobbers lr */
+ mov r2, lr
+#endif
svc #0x123456
#endif
#if defined(CONFIG_ARM64)
ret
+#elif CONFIG_SYS_ARM_ARCH < 7
+ bx r2
#else
bx lr
#endif
movs pc, lr @ jump to next instruction & switch modes.
.endm
+ .macro get_bad_stack_swi
+ sub r13, r13, #4 @ space on current stack for scratch reg.
+ str r0, [r13] @ save R0's value.
+ ldr r0, IRQ_STACK_START_IN @ get data regions start
+ str lr, [r0] @ save caller lr in position 0 of saved stack
+ mrs lr, spsr @ get the spsr
+ str lr, [r0, #4] @ save spsr in position 1 of saved stack
+ ldr lr, [r0] @ restore lr
+ ldr r0, [r13] @ restore r0
+ add r13, r13, #4 @ pop stack entry
+ .endm
+
.macro get_irq_stack @ setup IRQ stack
ldr sp, IRQ_STACK_START
.endm
.align 5
software_interrupt:
- get_bad_stack
+ get_bad_stack_swi
bad_save_user_regs
bl do_software_interrupt
+#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
+ ldmia sp, {r0 - lr}^ @ Calling r0 - lr
+ mov r0, r0
+ ldr lr, [sp, #S_PC] @ Get PC
+ add sp, sp, #S_FRAME_SIZE
+ movs pc, lr @ return & move spsr_svc into cpsr
+#endif
.align 5
prefetch_abort:
#ifndef __DM365_LOWLEVEL_H
#define __DM365_LOWLEVEL_H
-#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
select DM_GPIO
select DM_MMC
select PCI
- select DM_SCSI
+ select SCSI
select VIDEO
select OF_CONTROL
select SUPPORT_SPL
}
static ulong spl_romapi_read_seekable(struct spl_load_info *load,
- ulong sector, ulong count,
+ ulong offset, ulong byte,
void *buf)
{
- u32 pagesize = *(u32 *)load->priv;
- ulong byte = count * pagesize;
- u32 offset;
-
- offset = sector * pagesize;
-
- return spl_romapi_raw_seekable_read(offset, byte, buf) / pagesize;
+ return spl_romapi_raw_seekable_read(offset, byte, buf);
}
static int spl_romapi_load_image_seekable(struct spl_image_info *spl_image,
struct spl_load_info load;
memset(&load, 0, sizeof(load));
- load.bl_len = pagesize;
+ spl_set_bl_len(&load, pagesize);
load.read = spl_romapi_read_seekable;
- load.priv = &pagesize;
- return spl_load_simple_fit(spl_image, &load, offset / pagesize, header);
+ return spl_load_simple_fit(spl_image, &load, offset, header);
} else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
valid_container_hdr((void *)header)) {
struct spl_load_info load;
memset(&load, 0, sizeof(load));
- load.bl_len = pagesize;
+ spl_set_bl_len(&load, pagesize);
load.read = spl_romapi_read_seekable;
- load.priv = &pagesize;
- ret = spl_load_imx_container(spl_image, &load, offset / pagesize);
+ ret = spl_load_imx_container(spl_image, &load, offset);
} else {
/* TODO */
puts("Can't support legacy image\n");
ss.pagesize = pagesize;
memset(&load, 0, sizeof(load));
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_romapi_read_stream;
load.priv = &ss;
printf("ROM download failure %d\n", imagesize);
memset(&load, 0, sizeof(load));
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_ram_load_read;
if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER))
#ifndef _PINCTRL_SNAPDRAGON_H
#define _PINCTRL_SNAPDRAGON_H
-#include <common.h>
-
struct msm_pinctrl_data {
int pin_count;
int functions_count;
*
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/hardware.h>
#include "common.h"
* Dave Gerlach <d-gerlach@ti.com>
*/
-#include <common.h>
#include <fdt_support.h>
#include <spl.h>
#include <asm/io.h>
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <fdt_support.h>
#include <init.h>
#include <asm/global_data.h>
*
*/
-#include <common.h>
#include <asm/system.h>
#include <asm/armv8/mmu.h>
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <image.h>
#include <init.h>
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <init.h>
#include <spl.h>
#include <asm/io.h>
* David Huang <d-huang@ti.com>
*/
-#include <common.h>
#include <init.h>
#include <spl.h>
#include <asm/io.h>
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/kernel.h>
#include "common.h"
*/
#include <asm/io.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <hang.h>
* Andreas Dannenberg <dannenberg@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <image.h>
#include <log.h>
#ifndef __ASM_ARCH_MUX_K2G_H
#define __ASM_ARCH_MUX_K2G_H
-#include <common.h>
#include <asm/io.h>
#define K2G_PADCFG_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
return 0;
}
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void scsi_init(void)
-{
- printf("MVEBU SATA INIT\n");
- board_ahci_enable();
- ahci_init((void __iomem *)MVEBU_SATA0_BASE);
-}
-#endif
-
#ifdef CONFIG_USB_XHCI_MVEBU
#define USB3_MAX_WINDOWS 4
#define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
#ifndef _MVEBU_EFUSE_H
#define _MVEBU_EFUSE_H
-#include <common.h>
-
struct efuse_val {
union {
struct {
obj-y += abb.o
endif
-ifneq ($(CONFIG_OMAP54XX),)
-ifeq ($(CONFIG_DM_SCSI),)
-obj-y += pipe3-phy.o
-obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o
-endif
-endif
-
ifeq ($(CONFIG_$(SPL_TPL_)SYS_DCACHE_OFF),)
obj-y += omap-cache.o
endif
}
#endif
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void arch_preboot_os(void)
-{
- ahci_reset((void __iomem *)DWC_AHSATA_BASE);
-}
-#endif
-
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
(*prcm)->cm_l4per_gpio6_clkctrl,
(*prcm)->cm_l4per_gpio7_clkctrl,
(*prcm)->cm_l4per_gpio8_clkctrl,
-#ifdef CONFIG_SCSI_AHCI_PLAT
- (*prcm)->cm_l3init_ocp2scp3_clkctrl,
-#endif
0
};
#ifdef CONFIG_TI_QSPI
(*prcm)->cm_l4per_qspi_clkctrl,
-#endif
-#ifdef CONFIG_SCSI_AHCI_PLAT
- (*prcm)->cm_l3init_sata_clkctrl,
#endif
0
};
setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
#endif
-#ifdef CONFIG_SCSI_AHCI_PLAT
- /* Enable optional functional clock for SATA */
- setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
- SATA_CLKCTRL_OPTFCLKEN_MASK);
-#endif
-
/* Enable SCRM OPT clocks for PER and CORE dpll */
setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_PER_MASK);
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * TI PIPE3 PHY
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- */
-
-#include <common.h>
-#include <sata.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <linux/bitops.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include "pipe3-phy.h"
-
-/* PLLCTRL Registers */
-#define PLL_STATUS 0x00000004
-#define PLL_GO 0x00000008
-#define PLL_CONFIGURATION1 0x0000000C
-#define PLL_CONFIGURATION2 0x00000010
-#define PLL_CONFIGURATION3 0x00000014
-#define PLL_CONFIGURATION4 0x00000020
-
-#define PLL_REGM_MASK 0x001FFE00
-#define PLL_REGM_SHIFT 9
-#define PLL_REGM_F_MASK 0x0003FFFF
-#define PLL_REGM_F_SHIFT 0
-#define PLL_REGN_MASK 0x000001FE
-#define PLL_REGN_SHIFT 1
-#define PLL_SELFREQDCO_MASK 0x0000000E
-#define PLL_SELFREQDCO_SHIFT 1
-#define PLL_SD_MASK 0x0003FC00
-#define PLL_SD_SHIFT 10
-#define SET_PLL_GO 0x1
-#define PLL_TICOPWDN BIT(16)
-#define PLL_LDOPWDN BIT(15)
-#define PLL_LOCK 0x2
-#define PLL_IDLE 0x1
-
-/* PHY POWER CONTROL Register */
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 0xE
-
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000
-#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT 0x16
-
-#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3
-#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0
-
-
-#define PLL_IDLE_TIME 100 /* in milliseconds */
-#define PLL_LOCK_TIME 100 /* in milliseconds */
-
-static inline u32 omap_pipe3_readl(void __iomem *addr, unsigned offset)
-{
- return __raw_readl(addr + offset);
-}
-
-static inline void omap_pipe3_writel(void __iomem *addr, unsigned offset,
- u32 data)
-{
- __raw_writel(data, addr + offset);
-}
-
-static struct pipe3_dpll_params *omap_pipe3_get_dpll_params(struct omap_pipe3
- *pipe3)
-{
- u32 rate;
- struct pipe3_dpll_map *dpll_map = pipe3->dpll_map;
-
- rate = get_sys_clk_freq();
-
- for (; dpll_map->rate; dpll_map++) {
- if (rate == dpll_map->rate)
- return &dpll_map->params;
- }
-
- printf("%s: No DPLL configuration for %u Hz SYS CLK\n",
- __func__, rate);
- return NULL;
-}
-
-
-static int omap_pipe3_wait_lock(struct omap_pipe3 *phy)
-{
- u32 val;
- int timeout = PLL_LOCK_TIME;
-
- do {
- mdelay(1);
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if (val & PLL_LOCK)
- break;
- } while (--timeout);
-
- if (!(val & PLL_LOCK)) {
- printf("%s: DPLL failed to lock\n", __func__);
- return -EBUSY;
- }
-
- return 0;
-}
-
-static int omap_pipe3_dpll_program(struct omap_pipe3 *phy)
-{
- u32 val;
- struct pipe3_dpll_params *dpll_params;
-
- dpll_params = omap_pipe3_get_dpll_params(phy);
- if (!dpll_params) {
- printf("%s: Invalid DPLL parameters\n", __func__);
- return -EINVAL;
- }
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
- val &= ~PLL_REGN_MASK;
- val |= dpll_params->n << PLL_REGN_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- val &= ~PLL_SELFREQDCO_MASK;
- val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
- val &= ~PLL_REGM_MASK;
- val |= dpll_params->m << PLL_REGM_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
- val &= ~PLL_REGM_F_MASK;
- val |= dpll_params->mf << PLL_REGM_F_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);
-
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
- val &= ~PLL_SD_MASK;
- val |= dpll_params->sd << PLL_SD_SHIFT;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
-
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
-
- return omap_pipe3_wait_lock(phy);
-}
-
-static void omap_control_phy_power(struct omap_pipe3 *phy, int on)
-{
- u32 val, rate;
-
- val = readl(phy->power_reg);
-
- rate = get_sys_clk_freq();
- rate = rate/1000000;
-
- if (on) {
- val &= ~(OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK);
- val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON <<
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
- val |= rate <<
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
- } else {
- val &= ~OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK;
- val |= OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF <<
- OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
- }
-
- writel(val, phy->power_reg);
-}
-
-int phy_pipe3_power_on(struct omap_pipe3 *phy)
-{
- int ret;
- u32 val;
-
- /* Program the DPLL only if not locked */
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if (!(val & PLL_LOCK)) {
- ret = omap_pipe3_dpll_program(phy);
- if (ret)
- return ret;
- } else {
- /* else just bring it out of IDLE mode */
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- if (val & PLL_IDLE) {
- val &= ~PLL_IDLE;
- omap_pipe3_writel(phy->pll_ctrl_base,
- PLL_CONFIGURATION2, val);
- ret = omap_pipe3_wait_lock(phy);
- if (ret)
- return ret;
- }
- }
-
- /* Power up the PHY */
- omap_control_phy_power(phy, 1);
-
- return 0;
-}
-
-int phy_pipe3_power_off(struct omap_pipe3 *phy)
-{
- u32 val;
- int timeout = PLL_IDLE_TIME;
-
- /* Power down the PHY */
- omap_control_phy_power(phy, 0);
-
- /* Put DPLL in IDLE mode */
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
- val |= PLL_IDLE;
- omap_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
-
- /* wait for LDO and Oscillator to power down */
- do {
- mdelay(1);
- val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
- if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN))
- break;
- } while (--timeout);
-
- if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
- printf("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n",
- __func__, val);
- return -EBUSY;
- }
-
- return 0;
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * TI PIPE3 PHY
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- */
-
-#ifndef __OMAP_PIPE3_PHY_H
-#define __OMAP_PIPE3_PHY_H
-
-struct pipe3_dpll_params {
- u16 m;
- u8 n;
- u8 freq:3;
- u8 sd;
- u32 mf;
-};
-
-struct pipe3_dpll_map {
- unsigned long rate;
- struct pipe3_dpll_params params;
-};
-
-struct omap_pipe3 {
- void __iomem *pll_ctrl_base;
- void __iomem *power_reg;
- struct pipe3_dpll_map *dpll_map;
-};
-
-
-int phy_pipe3_power_on(struct omap_pipe3 *phy);
-int phy_pipe3_power_off(struct omap_pipe3 *pipe3);
-
-#endif /* __OMAP_PIPE3_PHY_H */
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * TI SATA platform driver
- *
- * (C) Copyright 2013
- * Texas Instruments, <www.ti.com>
- */
-
-#include <common.h>
-#include <ahci.h>
-#include <scsi.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sata.h>
-#include <sata.h>
-#include <asm/io.h>
-#include <asm/omap_common.h>
-#include "pipe3-phy.h"
-
-static struct pipe3_dpll_map dpll_map_sata[] = {
- {12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */
- {16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
- {19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
- {20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */
- {26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */
- {38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
- { }, /* Terminator */
-};
-
-struct omap_pipe3 sata_phy = {
- .pll_ctrl_base = (void __iomem *)TI_SATA_PLLCTRL_BASE,
- /* .power_reg is updated at runtime */
- .dpll_map = dpll_map_sata,
-};
-
-int init_sata(int dev)
-{
- int ret;
- u32 val;
-
- sata_phy.power_reg = (void __iomem *)(*ctrl)->control_phy_power_sata;
-
- /* Power up the PHY */
- phy_pipe3_power_on(&sata_phy);
-
- /* Enable SATA module, No Idle, No Standby */
- val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
- writel(val, TI_SATA_WRAPPER_BASE + TI_SATA_SYSCONFIG);
-
- ret = ahci_init((void __iomem *)DWC_AHSATA_BASE);
-
- return ret;
-}
-
-int reset_sata(int dev)
-{
- return 0;
-}
-
-/* On OMAP platforms SATA provides the SCSI subsystem */
-void scsi_init(void)
-{
- init_sata(0);
- scsi_scan(1);
-}
-
-int scsi_bus_reset(struct udevice *dev)
-{
- ahci_reset((void __iomem *)DWC_AHSATA_BASE);
- ahci_init((void __iomem *)DWC_AHSATA_BASE);
-
- return 0;
-}
STM32MP157, STM32MP153 or STM32MP151
STMicroelectronics MPU with core ARMv7
dual core A7 for STM32MP157/3, monocore for STM32MP151
+
+config STM32MP25X
+ bool "Support STMicroelectronics STM32MP25x Soc"
+ select ARM64
+ select CLK_STM32MP25
+ select OF_BOARD
+ select PINCTRL_STM32
+ select STM32_RCC
+ select STM32_RESET
+ select STM32_SERIAL
+ select SYS_ARCH_TIMER
+ select TFABOOT
+ imply CLK_SCMI
+ imply CMD_NVEDIT_INFO
+ imply DM_REGULATOR
+ imply DM_REGULATOR_SCMI
+ imply OPTEE
+ imply RESET_SCMI
+ imply SYSRESET_PSCI
+ imply TEE
+ imply VERSION_VARIABLE
+ help
+ Support of STMicroelectronics SOC STM32MP25x family
+ STMicroelectronics MPU with 2 * A53 core and 1 M33 core
endchoice
config NR_DRAM_BANKS
source "arch/arm/mach-stm32mp/Kconfig.13x"
source "arch/arm/mach-stm32mp/Kconfig.15x"
-
+source "arch/arm/mach-stm32mp/Kconfig.25x"
source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
endif
--- /dev/null
+if STM32MP25X
+
+choice
+ prompt "STM32MP25x board select"
+ optional
+
+config TARGET_ST_STM32MP25X
+ bool "STMicroelectronics STM32MP25x boards"
+ imply BOOTSTAGE
+ imply CMD_BOOTSTAGE
+ help
+ target the STMicroelectronics board with SOC STM32MP25x
+ managed by board/st/stm32mp2
+ The difference between board are managed with devicetree
+
+endchoice
+
+config TEXT_BASE
+ default 0x84000000
+
+config PRE_CON_BUF_ADDR
+ default 0x84800000
+
+config PRE_CON_BUF_SZ
+ default 4096
+
+config BOOTSTAGE_STASH_ADDR
+ default 0x87000000
+
+if DEBUG_UART
+
+config DEBUG_UART_BOARD_INIT
+ default y
+
+# debug on USART2 by default
+config DEBUG_UART_BASE
+ default 0x400e0000
+
+endif
+
+source "board/st/stm32mp2/Kconfig"
+
+endif
# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
#
-obj-y += cpu.o
obj-y += dram_init.o
obj-y += syscon.o
obj-y += bsec.o
-obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
-obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
+obj-$(CONFIG_STM32MP15x) += stm32mp1/
+obj-$(CONFIG_STM32MP13x) += stm32mp1/
+obj-$(CONFIG_STM32MP25X) += stm32mp2/
obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
-ifdef CONFIG_SPL_BUILD
-obj-y += spl.o
-obj-y += tzc400.o
-else
+ifndef CONFIG_SPL_BUILD
obj-y += cmd_stm32prog/
obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
-obj-$(CONFIG_ARMV7_PSCI) += psci.o
obj-$(CONFIG_TFABOOT) += boot_params.o
endif
-
-obj-$(CONFIG_$(SPL_)STM32MP15_PWR) += pwr_regulator.o
-obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_lock(u32 address, u32 otp)
+static bool bsec_read_lock(void __iomem *address, u32 otp)
{
u32 bit;
u32 bank;
bit = 1 << (otp & OTP_LOCK_MASK);
bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
- return !!(readl(address + bank) & bit);
+ return !!(readl((address + bank)) & bit);
}
/**
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error, -EAGAIN or -ENOTSUPP
*/
-static u32 bsec_check_error(u32 base, u32 otp)
+static u32 bsec_check_error(void __iomem *base, u32 otp)
{
u32 bit;
u32 bank;
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_SR_lock(u32 base, u32 otp)
+static bool bsec_read_SR_lock(void __iomem *base, u32 otp)
{
return bsec_read_lock(base + BSEC_SRLOCK_OFF, otp);
}
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_SP_lock(u32 base, u32 otp)
+static bool bsec_read_SP_lock(void __iomem *base, u32 otp)
{
return bsec_read_lock(base + BSEC_SPLOCK_OFF, otp);
}
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: true if locked else false
*/
-static bool bsec_read_SW_lock(u32 base, u32 otp)
+static bool bsec_read_SW_lock(void __iomem *base, u32 otp)
{
return bsec_read_lock(base + BSEC_SWLOCK_OFF, otp);
}
* @power: true to power up , false to power down
* Return: 0 if succeed
*/
-static int bsec_power_safmem(u32 base, bool power)
+static int bsec_power_safmem(void __iomem *base, bool power)
{
u32 val;
u32 mask;
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_shadow_register(struct udevice *dev, u32 base, u32 otp)
+static int bsec_shadow_register(struct udevice *dev, void __iomem *base, u32 otp)
{
u32 val;
int ret;
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_read_shadow(struct udevice *dev, u32 base, u32 *val, u32 otp)
+static int bsec_read_shadow(struct udevice *dev, void __iomem *base, u32 *val,
+ u32 otp)
{
*val = readl(base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_write_shadow(struct udevice *dev, u32 base, u32 val, u32 otp)
+static int bsec_write_shadow(struct udevice *dev, void __iomem *base, u32 val, u32 otp)
{
/* check if programming of otp is locked */
if (bsec_read_SW_lock(base, otp))
* after the function the otp data is not refreshed in shadow
* Return: 0 if no error
*/
-static int bsec_program_otp(struct udevice *dev, long base, u32 val, u32 otp)
+static int bsec_program_otp(struct udevice *dev, void __iomem *base, u32 val, u32 otp)
{
u32 ret;
bool power_up = false;
* @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
* Return: 0 if no error
*/
-static int bsec_permanent_lock_otp(struct udevice *dev, long base, uint32_t otp)
+static int bsec_permanent_lock_otp(struct udevice *dev, void __iomem *base, uint32_t otp)
{
int ret;
bool power_up = false;
/* BSEC MISC driver *******************************************************/
struct stm32mp_bsec_plat {
- u32 base;
+ void __iomem *base;
};
struct stm32mp_bsec_priv {
{
struct stm32mp_bsec_plat *plat = dev_get_plat(dev);
- plat->base = (u32)dev_read_addr_ptr(dev);
+ plat->base = dev_read_addr_ptr(dev);
return 0;
}
int ret;
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
- log_debug("RAM init failed: %d\n", ret);
+ /* in case there is no RAM driver, retrieve DDR size from DT */
+ if (ret == -ENODEV) {
+ return fdtdec_setup_mem_size_base();
+ } else if (ret) {
+ log_err("RAM init failed: %d\n", ret);
return ret;
}
ret = ram_get_info(dev, &ram);
log_debug("Cannot get RAM size: %d\n", ret);
return ret;
}
- log_debug("RAM init base=%lx, size=%x\n", ram.base, ram.size);
+ log_debug("RAM init base=%p, size=%zx\n", (void *)ram.base, ram.size);
gd->ram_size = ram.size;
if (!total_size)
return gd->ram_top;
+ /*
+ * make sure U-Boot uses address space below 4GB boundaries even
+ * if the effective available memory is bigger
+ */
+ gd->ram_top = clamp_val(gd->ram_top, 0, SZ_4G - 1);
+
/* found enough not-reserved memory to relocated U-Boot */
lmb_init(&lmb);
- lmb_add(&lmb, gd->ram_base, get_effective_memsize());
+ lmb_add(&lmb, gd->ram_base, gd->ram_top - gd->ram_base);
boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
/* add 8M for reserved memory for display, fdt, gd,... */
size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
#ifndef _MACH_STM32_H_
#define _MACH_STM32_H_
+#include <linux/sizes.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
+
+enum boot_device {
+ BOOT_FLASH_SD = 0x10,
+ BOOT_FLASH_SD_1 = 0x11,
+ BOOT_FLASH_SD_2 = 0x12,
+ BOOT_FLASH_SD_3 = 0x13,
+
+ BOOT_FLASH_EMMC = 0x20,
+ BOOT_FLASH_EMMC_1 = 0x21,
+ BOOT_FLASH_EMMC_2 = 0x22,
+ BOOT_FLASH_EMMC_3 = 0x23,
+
+ BOOT_FLASH_NAND = 0x30,
+ BOOT_FLASH_NAND_FMC = 0x31,
+
+ BOOT_FLASH_NOR = 0x40,
+ BOOT_FLASH_NOR_QSPI = 0x41,
+
+ BOOT_SERIAL_UART = 0x50,
+ BOOT_SERIAL_UART_1 = 0x51,
+ BOOT_SERIAL_UART_2 = 0x52,
+ BOOT_SERIAL_UART_3 = 0x53,
+ BOOT_SERIAL_UART_4 = 0x54,
+ BOOT_SERIAL_UART_5 = 0x55,
+ BOOT_SERIAL_UART_6 = 0x56,
+ BOOT_SERIAL_UART_7 = 0x57,
+ BOOT_SERIAL_UART_8 = 0x58,
+
+ BOOT_SERIAL_USB = 0x60,
+ BOOT_SERIAL_USB_OTG = 0x62,
+
+ BOOT_FLASH_SPINAND = 0x70,
+ BOOT_FLASH_SPINAND_1 = 0x71,
+};
+
+#define TAMP_BOOT_MODE_MASK GENMASK(15, 8)
+#define TAMP_BOOT_MODE_SHIFT 8
+#define TAMP_BOOT_AUTH_MASK GENMASK(23, 16)
+#define TAMP_BOOT_AUTH_SHIFT 16
+#define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
+#define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
+#define TAMP_BOOT_AUTH_ST_MASK GENMASK(7, 4)
+#define TAMP_BOOT_PARTITION_MASK GENMASK(3, 0)
+#define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
+
+enum forced_boot_mode {
+ BOOT_NORMAL = 0x00,
+ BOOT_FASTBOOT = 0x01,
+ BOOT_RECOVERY = 0x02,
+ BOOT_STM32PROG = 0x03,
+ BOOT_UMS_MMC0 = 0x10,
+ BOOT_UMS_MMC1 = 0x11,
+ BOOT_UMS_MMC2 = 0x12,
+};
+
#endif
/*
* Peripheral memory map
* only address used before device tree parsing
*/
+
+#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13x)
#define STM32_RCC_BASE 0x50000000
#define STM32_PWR_BASE 0x50001000
#define STM32_SYSCFG_BASE 0x50020000
#define STM32_DDR_SIZE SZ_1G
#ifndef __ASSEMBLY__
-/* enumerated used to identify the SYSCON driver instance */
-enum {
- STM32MP_SYSCON_UNKNOWN,
- STM32MP_SYSCON_SYSCFG,
-};
-
/*
* enumerated for boot interface from Bootrom, used in TAMP_BOOT_CONTEXT
* - boot device = bit 8:4
#define BOOT_INSTANCE_MASK 0x0F
#define BOOT_INSTANCE_SHIFT 0
-enum boot_device {
- BOOT_FLASH_SD = 0x10,
- BOOT_FLASH_SD_1 = 0x11,
- BOOT_FLASH_SD_2 = 0x12,
- BOOT_FLASH_SD_3 = 0x13,
-
- BOOT_FLASH_EMMC = 0x20,
- BOOT_FLASH_EMMC_1 = 0x21,
- BOOT_FLASH_EMMC_2 = 0x22,
- BOOT_FLASH_EMMC_3 = 0x23,
-
- BOOT_FLASH_NAND = 0x30,
- BOOT_FLASH_NAND_FMC = 0x31,
-
- BOOT_FLASH_NOR = 0x40,
- BOOT_FLASH_NOR_QSPI = 0x41,
-
- BOOT_SERIAL_UART = 0x50,
- BOOT_SERIAL_UART_1 = 0x51,
- BOOT_SERIAL_UART_2 = 0x52,
- BOOT_SERIAL_UART_3 = 0x53,
- BOOT_SERIAL_UART_4 = 0x54,
- BOOT_SERIAL_UART_5 = 0x55,
- BOOT_SERIAL_UART_6 = 0x56,
- BOOT_SERIAL_UART_7 = 0x57,
- BOOT_SERIAL_UART_8 = 0x58,
-
- BOOT_SERIAL_USB = 0x60,
- BOOT_SERIAL_USB_OTG = 0x62,
-
- BOOT_FLASH_SPINAND = 0x70,
- BOOT_FLASH_SPINAND_1 = 0x71,
-};
-
/* TAMP registers */
#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
#define TAMP_FWU_BOOT_IDX_MASK GENMASK(3, 0)
#define TAMP_FWU_BOOT_IDX_OFFSET 0
-
#define TAMP_COPRO_STATE_OFF 0
#define TAMP_COPRO_STATE_INIT 1
#define TAMP_COPRO_STATE_CRUN 2
#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30)
#endif
-#define TAMP_BOOT_MODE_MASK GENMASK(15, 8)
-#define TAMP_BOOT_MODE_SHIFT 8
-#define TAMP_BOOT_AUTH_MASK GENMASK(23, 16)
-#define TAMP_BOOT_AUTH_SHIFT 16
-#define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
-#define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
-#define TAMP_BOOT_AUTH_ST_MASK GENMASK(7, 4)
-#define TAMP_BOOT_PARTITION_MASK GENMASK(3, 0)
-#define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_STM32MP15X || CONFIG_STM32MP13X */
-enum forced_boot_mode {
- BOOT_NORMAL = 0x00,
- BOOT_FASTBOOT = 0x01,
- BOOT_RECOVERY = 0x02,
- BOOT_STM32PROG = 0x03,
- BOOT_UMS_MMC0 = 0x10,
- BOOT_UMS_MMC1 = 0x11,
- BOOT_UMS_MMC2 = 0x12,
-};
+#if CONFIG_STM32MP25X
+#define STM32_RCC_BASE 0x44200000
+#define STM32_TAMP_BASE 0x46010000
+
+#define STM32_DDR_BASE 0x80000000
+
+#define STM32_DDR_SIZE SZ_4G
+
+/* TAMP registers x = 0 to 127 : hardcoded description, waiting NVMEM node in DT */
+#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * (x))
+
+/* TAMP registers zone 3 RIF 1 (RW) at 96*/
+#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(96)
+#endif /* STM32MP25X */
/* offset used for BSEC driver: misc_read and misc_write */
#define STM32_BSEC_SHADOW_OFFSET 0x0
#define BSEC_OTP_MAC 57
#define BSEC_OTP_BOARD 60
#endif
+#ifdef CONFIG_STM32MP25X
+#define BSEC_OTP_SERIAL 5
+#define BSEC_OTP_RPN 9
+#define BSEC_OTP_PKG 246
+#endif
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+
+/* enumerated used to identify the SYSCON driver instance */
+enum {
+ STM32MP_SYSCON_UNKNOWN,
+ STM32MP_SYSCON_SYSCFG,
+};
+#endif /* __ASSEMBLY__*/
-#endif /* __ASSEMBLY__ */
#endif /* _MACH_STM32_H_ */
#define CPU_STM32MP131Fxx 0x05010EC8
#define CPU_STM32MP131Dxx 0x05010EC9
+/* ID for STM32MP25x = Device Part Number (RPN) (bit31:0) */
+#define CPU_STM32MP257Cxx 0x00002000
+#define CPU_STM32MP255Cxx 0x00082000
+#define CPU_STM32MP253Cxx 0x000B2004
+#define CPU_STM32MP251Cxx 0x000B3065
+#define CPU_STM32MP257Axx 0x40002E00
+#define CPU_STM32MP255Axx 0x40082E00
+#define CPU_STM32MP253Axx 0x400B2E04
+#define CPU_STM32MP251Axx 0x400B3E65
+#define CPU_STM32MP257Fxx 0x80002000
+#define CPU_STM32MP255Fxx 0x80082000
+#define CPU_STM32MP253Fxx 0x800B2004
+#define CPU_STM32MP251Fxx 0x800B3065
+#define CPU_STM32MP257Dxx 0xC0002E00
+#define CPU_STM32MP255Dxx 0xC0082E00
+#define CPU_STM32MP253Dxx 0xC00B2E04
+#define CPU_STM32MP251Dxx 0xC00B3E65
+
/* return CPU_STMP32MP...Xxx constants */
u32 get_cpu_type(void);
#define CPU_DEV_STM32MP15 0x500
#define CPU_DEV_STM32MP13 0x501
+#define CPU_DEV_STM32MP25 0x505
/* return CPU_DEV constants */
u32 get_cpu_dev(void);
#define STM32MP15_PKG_AD_TFBGA257 1
#define STM32MP15_PKG_UNKNOWN 0
+/* package used for STM32MP25x */
+#define STM32MP25_PKG_CUSTOM 0
+#define STM32MP25_PKG_AL_TBGA361 3
+#define STM32MP25_PKG_AK_TBGA424 4
+#define STM32MP25_PKG_AI_TBGA436 5
+#define STM32MP25_PKG_UNKNOWN 7
+
/* Get SOC name */
#define SOC_NAME_SIZE 20
void get_soc_name(char name[SOC_NAME_SIZE]);
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += cpu.o
+
+obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
+obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
+
+obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-y += tzc400.o
+else
+obj-$(CONFIG_ARMV7_PSCI) += psci.o
+endif
+
+obj-$(CONFIG_$(SPL_)STM32MP15_PWR) += pwr_regulator.o
+obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+#
+# Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += cpu.o
+obj-y += arm64-mmu.o
+obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o
+obj-$(CONFIG_STM32MP25X) += stm32mp25x.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+#include <mach/stm32.h>
+
+#define MP2_MEM_MAP_MAX 10
+
+#if (CONFIG_TEXT_BASE < STM32_DDR_BASE) || \
+ (CONFIG_TEXT_BASE > (STM32_DDR_BASE + STM32_DDR_SIZE))
+#error "invalid CONFIG_TEXT_BASE value"
+#endif
+
+struct mm_region stm32mp2_mem_map[MP2_MEM_MAP_MAX] = {
+ {
+ /* PCIe */
+ .virt = 0x10000000UL,
+ .phys = 0x10000000UL,
+ .size = 0x10000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* LPSRAMs, VDERAM, RETRAM, SRAMs, SYSRAM: alias1 */
+ .virt = 0x20000000UL,
+ .phys = 0x20000000UL,
+ .size = 0x00200000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* Peripherals: alias1 */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0x10000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* OSPI and FMC: memory-map area */
+ .virt = 0x60000000UL,
+ .phys = 0x60000000UL,
+ .size = 0x20000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /*
+ * DDR = STM32_DDR_BASE / STM32_DDR_SIZE
+ * the beginning of DDR (before CONFIG_TEXT_BASE) is not
+ * mapped, protected by RIF and reserved for other firmware
+ * (OP-TEE / TF-M / Cube M33)
+ */
+ .virt = CONFIG_TEXT_BASE,
+ .phys = CONFIG_TEXT_BASE,
+ .size = STM32_DDR_SIZE - (CONFIG_TEXT_BASE - STM32_DDR_BASE),
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = stm32mp2_mem_map;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_ARCH
+
+#include <clk.h>
+#include <cpu_func.h>
+#include <debug_uart.h>
+#include <env_internal.h>
+#include <init.h>
+#include <misc.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/system.h>
+#include <dm/device.h>
+#include <dm/lists.h>
+#include <dm/uclass.h>
+
+/*
+ * early TLB into the .data section so that it not get cleared
+ * with 16kB alignment
+ */
+#define EARLY_TLB_SIZE 0xA000
+u8 early_tlb[EARLY_TLB_SIZE] __section(".data") __aligned(0x4000);
+
+/*
+ * initialize the MMU and activate cache in U-Boot pre-reloc stage
+ * MMU/TLB is updated in enable_caches() for U-Boot after relocation
+ */
+static void early_enable_caches(void)
+{
+ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ return;
+
+ if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) {
+ gd->arch.tlb_size = EARLY_TLB_SIZE;
+ gd->arch.tlb_addr = (unsigned long)&early_tlb;
+ }
+ /* enable MMU (default configuration) */
+ dcache_enable();
+}
+
+/*
+ * Early system init
+ */
+int arch_cpu_init(void)
+{
+ icache_enable();
+ early_enable_caches();
+
+ return 0;
+}
+
+void enable_caches(void)
+{
+ /* deactivate the data cache, early enabled in arch_cpu_init() */
+ dcache_disable();
+ /*
+ * Force the call of setup_all_pgtables() in mmu_setup() by clearing tlb_fillptr
+ * to update the TLB location udpated in board_f.c::reserve_mmu
+ */
+ gd->arch.tlb_fillptr = 0;
+ dcache_enable();
+}
+
+/* used when CONFIG_DISPLAY_CPUINFO is activated */
+int print_cpuinfo(void)
+{
+ char name[SOC_NAME_SIZE];
+
+ get_soc_name(name);
+ printf("CPU: %s\n", name);
+
+ return 0;
+}
+
+int arch_misc_init(void)
+{
+ return 0;
+}
+
+/*
+ * Force data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+static uintptr_t nt_fw_dtb __section(".data");
+
+uintptr_t get_stm32mp_bl2_dtb(void)
+{
+ return nt_fw_dtb;
+}
+
+/*
+ * Save the FDT address provided by TF-A in r2 at boot time
+ * This function is called from start.S
+ */
+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
+ unsigned long r3)
+{
+ nt_fw_dtb = r2;
+
+ save_boot_params_ret();
+}
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#include <asm/u-boot.h>
+
+/*
+ * This function is called right before the kernel is booted. "blob" is the
+ * device tree that will be passed to the kernel.
+ */
+int ft_system_setup(void *blob, struct bd_info *bd)
+{
+ return 0;
+}
+
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_ARCH
+
+#include <log.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
+
+/* SYSCFG register */
+#define SYSCFG_DEVICEID_OFFSET 0x6400
+#define SYSCFG_DEVICEID_DEV_ID_MASK GENMASK(11, 0)
+#define SYSCFG_DEVICEID_DEV_ID_SHIFT 0
+#define SYSCFG_DEVICEID_REV_ID_MASK GENMASK(31, 16)
+#define SYSCFG_DEVICEID_REV_ID_SHIFT 16
+
+/* Device Part Number (RPN) = OTP9 */
+#define RPN_SHIFT 0
+#define RPN_MASK GENMASK(31, 0)
+
+/* Package = bit 0:2 of OTP122 => STM32MP25_PKG defines
+ * - 000: Custom package
+ * - 011: TFBGA361 => AL = 10x10, 361 balls pith 0.5mm
+ * - 100: TFBGA424 => AK = 14x14, 424 balls pith 0.5mm
+ * - 101: TFBGA436 => AI = 18x18, 436 balls pith 0.5mm
+ * - others: Reserved
+ */
+#define PKG_SHIFT 0
+#define PKG_MASK GENMASK(2, 0)
+
+static u32 read_deviceid(void)
+{
+ void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+ return readl(syscfg + SYSCFG_DEVICEID_OFFSET);
+}
+
+u32 get_cpu_dev(void)
+{
+ return (read_deviceid() & SYSCFG_DEVICEID_DEV_ID_MASK) >> SYSCFG_DEVICEID_DEV_ID_SHIFT;
+}
+
+u32 get_cpu_rev(void)
+{
+ return (read_deviceid() & SYSCFG_DEVICEID_REV_ID_MASK) >> SYSCFG_DEVICEID_REV_ID_SHIFT;
+}
+
+/* Get Device Part Number (RPN) from OTP */
+u32 get_cpu_type(void)
+{
+ return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
+}
+
+/* Get Package options from OTP */
+u32 get_cpu_package(void)
+{
+ return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
+}
+
+int get_eth_nb(void)
+{
+ int nb_eth;
+
+ switch (get_cpu_type()) {
+ case CPU_STM32MP257Fxx:
+ fallthrough;
+ case CPU_STM32MP257Dxx:
+ fallthrough;
+ case CPU_STM32MP257Cxx:
+ fallthrough;
+ case CPU_STM32MP257Axx:
+ nb_eth = 5; /* dual ETH with TSN support */
+ break;
+ case CPU_STM32MP253Fxx:
+ fallthrough;
+ case CPU_STM32MP253Dxx:
+ fallthrough;
+ case CPU_STM32MP253Cxx:
+ fallthrough;
+ case CPU_STM32MP253Axx:
+ nb_eth = 2; /* dual ETH */
+ break;
+ case CPU_STM32MP251Fxx:
+ fallthrough;
+ case CPU_STM32MP251Dxx:
+ fallthrough;
+ case CPU_STM32MP251Cxx:
+ fallthrough;
+ case CPU_STM32MP251Axx:
+ nb_eth = 1; /* single ETH */
+ break;
+ default:
+ nb_eth = 0;
+ break;
+ }
+
+ return nb_eth;
+}
+
+void get_soc_name(char name[SOC_NAME_SIZE])
+{
+ char *cpu_s, *cpu_r, *package;
+
+ cpu_s = "????";
+ cpu_r = "?";
+ package = "??";
+ if (get_cpu_dev() == CPU_DEV_STM32MP25) {
+ switch (get_cpu_type()) {
+ case CPU_STM32MP257Fxx:
+ cpu_s = "257F";
+ break;
+ case CPU_STM32MP257Dxx:
+ cpu_s = "257D";
+ break;
+ case CPU_STM32MP257Cxx:
+ cpu_s = "257C";
+ break;
+ case CPU_STM32MP257Axx:
+ cpu_s = "257A";
+ break;
+ case CPU_STM32MP255Fxx:
+ cpu_s = "255F";
+ break;
+ case CPU_STM32MP255Dxx:
+ cpu_s = "255D";
+ break;
+ case CPU_STM32MP255Cxx:
+ cpu_s = "255C";
+ break;
+ case CPU_STM32MP255Axx:
+ cpu_s = "255A";
+ break;
+ case CPU_STM32MP253Fxx:
+ cpu_s = "253F";
+ break;
+ case CPU_STM32MP253Dxx:
+ cpu_s = "253D";
+ break;
+ case CPU_STM32MP253Cxx:
+ cpu_s = "253C";
+ break;
+ case CPU_STM32MP253Axx:
+ cpu_s = "253A";
+ break;
+ case CPU_STM32MP251Fxx:
+ cpu_s = "251F";
+ break;
+ case CPU_STM32MP251Dxx:
+ cpu_s = "251D";
+ break;
+ case CPU_STM32MP251Cxx:
+ cpu_s = "251C";
+ break;
+ case CPU_STM32MP251Axx:
+ cpu_s = "251A";
+ break;
+ default:
+ cpu_s = "25??";
+ break;
+ }
+ /* REVISION */
+ switch (get_cpu_rev()) {
+ case CPU_REV1:
+ cpu_r = "A";
+ break;
+ default:
+ break;
+ }
+ /* PACKAGE */
+ switch (get_cpu_package()) {
+ case STM32MP25_PKG_CUSTOM:
+ package = "XX";
+ break;
+ case STM32MP25_PKG_AL_TBGA361:
+ package = "AL";
+ break;
+ case STM32MP25_PKG_AK_TBGA424:
+ package = "AK";
+ break;
+ case STM32MP25_PKG_AI_TBGA436:
+ package = "AI";
+ break;
+ default:
+ break;
+ }
+ }
+
+ snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", cpu_s, package, cpu_r);
+}
#include <asm/arch/stm32.h>
static const struct udevice_id stm32mp_syscon_ids[] = {
- { .compatible = "st,stm32mp157-syscfg",
- .data = STM32MP_SYSCON_SYSCFG },
+ { .compatible = "st,stm32mp157-syscfg", .data = STM32MP_SYSCON_SYSCFG },
+ { .compatible = "st,stm32mp25-syscfg", .data = STM32MP_SYSCON_SYSCFG},
{ }
};
struct spl_load_info load;
debug("Found FIT image\n");
- load.dev = NULL;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spi_load_read;
ret = spl_load_simple_fit(spl_image, &load,
load_offset, header);
#ifndef _TEGRA_XUSB_PADCTL_COMMON_H_
#define _TEGRA_XUSB_PADCTL_COMMON_H_
-#include <common.h>
#include <fdtdec.h>
#include <dm/ofnode.h>
#define _PSU_INIT_GPL_H_
#include <asm/io.h>
-#include <common.h>
int mask_pollonvalue(unsigned long add, u32 mask, u32 value);
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * fsl_mcdmafec.h -- Multi-channel DMA Fast Ethernet Controller definitions
- *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#ifndef fsl_mcdmafec_h
-#define fsl_mcdmafec_h
-
-/* Re-use of the definitions */
-#include <asm/fec.h>
-
-typedef struct fecdma {
- u32 rsvd0; /* 0x000 */
- u32 eir; /* 0x004 */
- u32 eimr; /* 0x008 */
- u32 rsvd1[6]; /* 0x00C - 0x023 */
- u32 ecr; /* 0x024 */
- u32 rsvd2[6]; /* 0x028 - 0x03F */
- u32 mmfr; /* 0x040 */
- u32 mscr; /* 0x044 */
- u32 rsvd3[7]; /* 0x048 - 0x063 */
- u32 mibc; /* 0x064 */
- u32 rsvd4[7]; /* 0x068 - 0x083 */
- u32 rcr; /* 0x084 */
- u32 rhr; /* 0x088 */
- u32 rsvd5[14]; /* 0x08C - 0x0C3 */
- u32 tcr; /* 0x0C4 */
- u32 rsvd6[7]; /* 0x0C8 - 0x0E3 */
- u32 palr; /* 0x0E4 */
- u32 paur; /* 0x0E8 */
- u32 opd; /* 0x0EC */
- u32 rsvd7[10]; /* 0x0F0 - 0x117 */
- u32 iaur; /* 0x118 */
- u32 ialr; /* 0x11C */
- u32 gaur; /* 0x120 */
- u32 galr; /* 0x124 */
- u32 rsvd8[7]; /* 0x128 - 0x143 */
- u32 tfwr; /* 0x144 */
- u32 rsvd9[14]; /* 0x148 - 0x17F */
- u32 fmc; /* 0x180 */
- u32 rfdr; /* 0x184 */
- u32 rfsr; /* 0x188 */
- u32 rfcr; /* 0x18C */
- u32 rlrfp; /* 0x190 */
- u32 rlwfp; /* 0x194 */
- u32 rfar; /* 0x198 */
- u32 rfrp; /* 0x19C */
- u32 rfwp; /* 0x1A0 */
- u32 tfdr; /* 0x1A4 */
- u32 tfsr; /* 0x1A8 */
- u32 tfcr; /* 0x1AC */
- u32 tlrfp; /* 0x1B0 */
- u32 tlwfp; /* 0x1B4 */
- u32 tfar; /* 0x1B8 */
- u32 tfrp; /* 0x1BC */
- u32 tfwp; /* 0x1C0 */
- u32 frst; /* 0x1C4 */
- u32 ctcwr; /* 0x1C8 */
-} fecdma_t;
-
-struct fec_info_dma {
- int index;
- u32 iobase;
- u32 pinmux;
- u32 miibase;
- int phy_addr;
- int dup_spd;
- char *phy_name;
- int phyname_init;
- cbd_t *rxbd; /* Rx BD */
- cbd_t *txbd; /* Tx BD */
- uint rx_idx;
- uint tx_idx;
- char *txbuf;
- int initialized;
- struct fec_info_dma *next;
- u16 rx_task; /* DMA receive Task Number */
- u16 tx_task; /* DMA Transmit Task Number */
- u16 rx_pri; /* DMA Receive Priority */
- u16 tx_pri; /* DMA Transmit Priority */
- u16 rx_init; /* DMA Receive Initiator */
- u16 tx_init; /* DMA Transmit Initiator */
- u16 used_tbd_idx; /* next transmit BD to clean */
- u16 clean_tbd_num; /* the number of available transmit BDs */
- int to_loop;
- struct mii_dev *bus;
-};
-
-/* Bit definitions and macros for IEVENT */
-#define FEC_EIR_TXERR (0x00040000)
-#define FEC_EIR_RXERR (0x00020000)
-#undef FEC_EIR_CLEAR_ALL
-#define FEC_EIR_CLEAR_ALL (0xFFFE0000)
-
-/* Bit definitions and macros for R_HASH */
-#define FEC_RHASH_FCE_DC (0x80000000)
-#define FEC_RHASH_MULTCAST (0x40000000)
-#define FEC_RHASH_HASH(x) (((x)&0x0000003F)<<24)
-
-/* Bit definitions and macros for FEC_TFWR */
-#undef FEC_TFWR_X_WMRK
-#undef FEC_TFWR_X_WMRK_64
-#undef FEC_TFWR_X_WMRK_128
-#undef FEC_TFWR_X_WMRK_192
-
-#define FEC_TFWR_X_WMRK(x) ((x)&0x0F)
-#define FEC_TFWR_X_WMRK_64 (0x00)
-#define FEC_TFWR_X_WMRK_128 (0x01)
-#define FEC_TFWR_X_WMRK_192 (0x02)
-#define FEC_TFWR_X_WMRK_256 (0x03)
-#define FEC_TFWR_X_WMRK_320 (0x04)
-#define FEC_TFWR_X_WMRK_384 (0x05)
-#define FEC_TFWR_X_WMRK_448 (0x06)
-#define FEC_TFWR_X_WMRK_512 (0x07)
-#define FEC_TFWR_X_WMRK_576 (0x08)
-#define FEC_TFWR_X_WMRK_640 (0x09)
-#define FEC_TFWR_X_WMRK_704 (0x0A)
-#define FEC_TFWR_X_WMRK_768 (0x0B)
-#define FEC_TFWR_X_WMRK_832 (0x0C)
-#define FEC_TFWR_X_WMRK_896 (0x0D)
-#define FEC_TFWR_X_WMRK_960 (0x0E)
-#define FEC_TFWR_X_WMRK_1024 (0x0F)
-
-/* FIFO definitions */
-/* Bit definitions and macros for FSTAT */
-#define FIFO_STAT_IP (0x80000000)
-#define FIFO_STAT_FRAME(x) (((x)&0x0000000F)<<24)
-#define FIFO_STAT_FAE (0x00800000)
-#define FIFO_STAT_RXW (0x00400000)
-#define FIFO_STAT_UF (0x00200000)
-#define FIFO_STAT_OF (0x00100000)
-#define FIFO_STAT_FR (0x00080000)
-#define FIFO_STAT_FULL (0x00040000)
-#define FIFO_STAT_ALARM (0x00020000)
-#define FIFO_STAT_EMPTY (0x00010000)
-
-/* Bit definitions and macros for FCTRL */
-#define FIFO_CTRL_WCTL (0x40000000)
-#define FIFO_CTRL_WFR (0x20000000)
-#define FIFO_CTRL_FRAME (0x08000000)
-#define FIFO_CTRL_GR(x) (((x)&0x00000007)<<24)
-#define FIFO_CTRL_IPMASK (0x00800000)
-#define FIFO_CTRL_FAEMASK (0x00400000)
-#define FIFO_CTRL_RXWMASK (0x00200000)
-#define FIFO_CTRL_UFMASK (0x00100000)
-#define FIFO_CTRL_OFMASK (0x00080000)
-
-#endif /* fsl_mcdmafec_h */
#include <asm/immap_547x_8x.h>
#include <asm/m547x_8x.h>
-#ifdef CONFIG_FSLDMAFEC
-#define FEC0_RX_TASK 0
-#define FEC0_TX_TASK 1
-#define FEC0_RX_PRIORITY 6
-#define FEC0_TX_PRIORITY 7
-#define FEC0_RX_INIT 16
-#define FEC0_TX_INIT 17
-#define FEC1_RX_TASK 2
-#define FEC1_TX_TASK 3
-#define FEC1_RX_PRIORITY 6
-#define FEC1_TX_PRIORITY 7
-#define FEC1_RX_INIT 30
-#define FEC1_TX_INIT 31
-#endif
-
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x100))
#ifdef CONFIG_SLTTMR
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_MCFFEC) || defined(CONFIG_FSLDMAFEC)
+#if defined(CONFIG_MCFFEC)
static int fec_get_node(int fec_idx)
{
char fec_alias[5] = {"fec"};
return fec_get_fdt_prop(fec_idx, "mii-base", mii_base);
}
-#endif //CONFIG_MCFFEC || CONFIG_FSLDMAFEC
+#endif //CONFIG_MCFFEC
* Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm-offsets.h>
#include <mpc83xx.h>
#include <system-constants.h>
#ifdef CONFIG_QE
#include <fsl_qe.h>
#endif
+#include <asm/ppc.h>
+#include <asm/fsl_lbc.h>
#include "lblaw/lblaw.h"
#include "elbc/elbc.h"
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/fsl_lbc.h>
#include <asm/u-boot.h>
#include "hrcw/hrcw.h"
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <display_options.h>
#include <env.h>
#include <init.h>
* Christophe Leroy, CS Systemes d'Information, christophe.leroy@c-s.fr
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/processor.h>
#include <asm/ppc.h>
* Wolfgang Denk <wd@denx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <display_options.h>
#include <net.h>
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <init.h>
#include <watchdog.h>
* Code copied & edited from Freescale mpc85xx stuff.
*/
-#include <common.h>
#include <time.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
* MPC8xx Internal Memory Map Functions
*/
-#include <common.h>
#include <command.h>
#include <asm/global_data.h>
#include <asm/cpm_8xx.h>
#include <asm/iopin_8xx.h>
#include <asm/io.h>
+#include <asm/ppc.h>
DECLARE_GLOBAL_DATA_PTR;
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <stdio.h>
#include <irq_func.h>
#include <mpc8xx.h>
#include <mpc8xx_irq.h>
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <mpc8xx.h>
#include <asm/global_data.h>
#include <asm/processor.h>
#include <asm/io.h>
+#include <asm/immap_8xx.h>
DECLARE_GLOBAL_DATA_PTR;
* This file handles the architecture-dependent parts of hardware exceptions
*/
-#include <common.h>
+#include <vsprintf.h>
#include <asm/ptrace.h>
#include <command.h>
#include <asm/processor.h>
#ifndef __ASM_PPC_FSL_LBC_H
#define __ASM_PPC_FSL_LBC_H
-#include <config.h>
-#include <common.h>
-
#ifdef CONFIG_MPC85xx
void lbc_sdram_init(void);
#endif
#define __ASM_GBL_DATA_H
#include <config.h>
-#include "asm/types.h"
+#include <linux/types.h>
/* Architecture-specific global data */
struct arch_global_data {
return 0;
}
+int os_mktemp(char *fname, off_t size)
+{
+ int fd;
+
+ fd = mkostemp(fname, O_CLOEXEC);
+ if (fd < 0)
+ return -errno;
+
+ if (unlink(fname) < 0)
+ return -errno;
+
+ if (ftruncate(fd, size))
+ return -errno;
+
+ return fd;
+}
+
/* Restore tty state when we exit */
static struct termios orig_term;
static bool term_setup;
compatible = "sandbox,arm-ffa";
};
};
+
+ nand-controller {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "sandbox,nand";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "soft";
+ sandbox,id = [00 e3];
+ sandbox,erasesize = <(8 * 1024)>;
+ sandbox,oobsize = <16>;
+ sandbox,pagesize = <512>;
+ sandbox,pages = <0x2000>;
+ sandbox,err-count = <1>;
+ sandbox,err-step-size = <512>;
+ };
+
+ /* MT29F64G08AKABA */
+ nand@1 {
+ reg = <1>;
+ nand-ecc-mode = "soft_bch";
+ sandbox,id = [2C 48 00 26 89 00 00 00];
+ sandbox,onfi = [
+ 4f 4e 46 49 0e 00 5a 00
+ ff 01 00 00 00 00 03 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 4d 49 43 52 4f 4e 20 20
+ 20 20 20 20 4d 54 32 39
+ 46 36 34 47 30 38 41 4b
+ 41 42 41 43 35 20 20 20
+ 2c 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 10 00 00 e0 00 00 02
+ 00 00 1c 00 80 00 00 00
+ 00 10 00 00 02 23 01 50
+ 00 01 05 01 00 00 04 00
+ 04 01 1e 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 0e 1f 00 1f 00 f4 01 ac
+ 0d 19 00 c8 00 00 00 00
+ 00 00 00 00 00 00 0a 07
+ 19 00 00 00 00 00 00 00
+ 00 00 00 00 01 00 01 00
+ 00 00 04 10 01 81 04 02
+ 02 01 1e 90 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 03 20 7d
+ ];
+ sandbox,erasesize = <(512 * 1024)>;
+ sandbox,oobsize = <224>;
+ sandbox,pagesize = <4096>;
+ sandbox,pages = <0x200000>;
+ sandbox,err-count = <3>;
+ sandbox,err-step-size = <512>;
+ };
+ };
};
#include "sandbox_pmic.dtsi"
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#define nop()
#ifndef __SANDBOX_CLK_H
#define __SANDBOX_CLK_H
-#include <common.h>
#include <clk.h>
#include <dt-structs.h>
#include <linux/clk-provider.h>
#ifndef __SANDBOX_MBOX_H
#define __SANDBOX_MBOX_H
-#include <common.h>
-
#define SANDBOX_MBOX_PING_XOR 0x12345678
struct udevice;
#ifndef __SANDBOX_POWER_DOMAIN_H
#define __SANDBOX_POWER_DOMAIN_H
-#include <common.h>
-
struct udevice;
int sandbox_power_domain_query(struct udevice *dev, unsigned long id);
#ifndef __SANDBOX_RESET_H
#define __SANDBOX_RESET_H
-#include <common.h>
-
struct udevice;
int sandbox_reset_query(struct udevice *dev, unsigned long id);
BOOT_DEVICE_CPGMAC,
BOOT_DEVICE_NOR,
BOOT_DEVICE_SPI,
+ BOOT_DEVICE_NAND,
};
/**
#ifndef __SLIMBOOTLOADER_ARCH_H__
#define __SLIMBOOTLOADER_ARCH_H__
-#include <common.h>
#include <asm/hob.h>
/**
#ifndef __ASM_X86_DMA_MAPPING_H
#define __ASM_X86_DMA_MAPPING_H
-#include <common.h>
#include <asm/cache.h>
#include <cpu_func.h>
#include <linux/dma-direction.h>
*/
#include <env.h>
-#include <common.h>
#include <mpc8xx.h>
#include <asm/cpm_8xx.h>
#include <asm/io.h>
*/
#include <config.h>
-#include <common.h>
#include <nand.h>
#include <linux/bitops.h>
#include <linux/mtd/rawnand.h>
* Charles Frey <charles.frey@c-s.fr>
*/
-#include <common.h>
#include <linux/sizes.h>
#include <linux/delay.h>
#include <init.h>
#include <asm/io.h>
#include <mpc8xx.h>
#include <watchdog.h>
+#include <asm/ppc.h>
+#include <asm/immap_8xx.h>
DECLARE_GLOBAL_DATA_PTR;
*/
#include <command.h>
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
* Board specific routines for the MCR3000 board
*/
-#include <common.h>
#include <env.h>
#include <hwconfig.h>
#include <init.h>
*/
#include <config.h>
-#include <common.h>
#include <nand.h>
#include <linux/mtd/rawnand.h>
#include <asm/io.h>
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select CMD_QFW
- select QFW_MMIO
+ select QFW_MMIO if CMD_QFW
imply VIRTIO_MMIO
imply VIRTIO_PCI
imply VIRTIO_NET
imply PCIE_ECAM_GENERIC
imply DM_RNG
imply SCSI
- imply DM_SCSI
imply SYS_NS16550
imply SIFIVE_SERIAL
imply HTIF_CONSOLE if 64BIT
def_bool y
select X86_RESET_VECTOR
select QEMU
- select QFW_PIO
+ select QFW_PIO if CMD_QFW
select BOARD_ROMSIZE_KB_1024
imply VIRTIO_PCI
imply VIRTIO_NET
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
+#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/immap_85xx.h>
#include "sleep.h"
* Copyright 2019, 2021 NXP
*/
-#include <common.h>
#include <clock_legacy.h>
#include <fdt_support.h>
#include <i2c.h>
// SPDX-License-Identifier: GPL-2.0
/* Copyright 2016-2019, 2021 NXP
*/
-#include <common.h>
#include <clock_legacy.h>
#include <fdt_support.h>
#include <init.h>
* Copyright 2019, 2021-2022 NXP
*/
-#include <common.h>
#include <clock_legacy.h>
#include <command.h>
#include <fdt_support.h>
* Copyright 2021-2022 NXP
*/
-#include <common.h>
#include <i2c.h>
#include <init.h>
#include <asm/global_data.h>
* Copyright 2017 NXP
*/
+#include <vsprintf.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/fsl_serdes.h>
#include <fsl-mc/fsl_mc.h>
* Copyright 2015 Freescale Semiconductor, Inc.
*/
+#include <vsprintf.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/fsl_serdes.h>
#include <fsl-mc/fsl_mc.h>
#include <asm/arch/clk.h>
#include <asm/arch/pwm.h>
#include <i2c.h>
+#include <linux/time.h>
#include <irq_func.h>
#include <asm/arch/nexell.h>
#include <asm/arch/nx_gpio.h>
-#ifndef NSEC_PER_SEC
-#define NSEC_PER_SEC 1000000000L
-#endif
-
#define SAMPLE_BPS 9600
#define SAMPLE_IN_US 101 /* (1000000 / BPS) */
return 0;
}
-#ifdef CONFIG_SCSI_AHCI_PLAT
-void scsi_init(void)
-{
- u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
-
- cphy_disable_overrides();
- if (reg & PWRDOM_STAT_SATA) {
- ahci_init((void __iomem *)HB_AHCI_BASE);
- scsi_scan(true);
- }
-}
-#endif
-
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
* Copyright 2020 Hitachi Power Grids. All rights reserved.
*/
-#include <common.h>
+#include <config.h>
#include <event.h>
#include <i2c.h>
#include <asm/io.h>
--- /dev/null
+if TARGET_ST_STM32MP25X
+
+config SYS_BOARD
+ default "stm32mp2"
+
+config SYS_VENDOR
+ default "st"
+
+config SYS_CONFIG_NAME
+ default "stm32mp25_common"
+
+source "board/st/common/Kconfig"
+endif
--- /dev/null
+STM32MP2 BOARD
+M: Patrice Chotard <patrice.chotard@st.com>
+M: Patrick Delaunay <patrick.delaunay@st.com>
+L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
+S: Maintained
+F: arch/arm/dts/stm32mp25*
+F: board/st/stm32mp2/
+F: configs/stm32mp25_defconfig
+F: include/configs/stm32mp25_common.h
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+#
+# Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += stm32mp2.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ */
+
+#define LOG_CATEGORY LOGC_BOARD
+
+#include <config.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <asm/global_data.h>
+#include <asm/arch/sys_proto.h>
+
+/*
+ * Get a global data pointer
+ */
+DECLARE_GLOBAL_DATA_PTR;
+
+/* board dependent setup after realloc */
+int board_init(void)
+{
+ return 0;
+}
+
+int board_late_init(void)
+{
+ const void *fdt_compat;
+ int fdt_compat_len;
+ char dtb_name[256];
+ int buf_len;
+
+ if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
+ fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
+ &fdt_compat_len);
+ if (fdt_compat && fdt_compat_len) {
+ if (strncmp(fdt_compat, "st,", 3) != 0) {
+ env_set("board_name", fdt_compat);
+ } else {
+ env_set("board_name", fdt_compat + 3);
+
+ buf_len = sizeof(dtb_name);
+ strlcpy(dtb_name, fdt_compat + 3, buf_len);
+ buf_len -= strlen(fdt_compat + 3);
+ strlcat(dtb_name, ".dtb", buf_len);
+ env_set("fdtfile", dtb_name);
+ }
+ }
+ }
+
+ return 0;
+}
#include <asm/arch/hardware.h>
#include <asm/io.h>
-#include <common.h>
#include <dm/uclass.h>
#include <env.h>
#include <fdt_support.h>
*
*/
-#include <common.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <k3-ddrss.h>
*
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <image.h>
*
*/
-#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <generic-phy.h>
*
*/
-#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <generic-phy.h>
help
Utilities for parsing PXE file formats.
-config BOOT_DEFAULTS
- bool # Common defaults for standard boot and distroboot
+config BOOT_DEFAULTS_FEATURES
+ bool
+ select SUPPORT_RAW_INITRD
+ select ENV_VARS_UBOOT_CONFIG
+ imply USB_STORAGE
+ imply EFI_PARTITION
+ imply ISO_PARTITION
+
+config BOOT_DEFAULTS_CMDS
+ bool
imply USE_BOOTCOMMAND
select CMD_ENV_EXISTS
select CMD_EXT2
select CMD_DHCP if CMD_NET
select CMD_PING if CMD_NET
select CMD_PXE if CMD_NET
- select SUPPORT_RAW_INITRD
- select ENV_VARS_UBOOT_CONFIG
select CMD_BOOTI if ARM64
select CMD_BOOTZ if ARM && !ARM64
imply CMD_MII if NET
- imply USB_STORAGE
- imply EFI_PARTITION
- imply ISO_PARTITION
+
+config BOOT_DEFAULTS
+ bool # Common defaults for standard boot and distroboot
+ select BOOT_DEFAULTS_FEATURES
+ select BOOT_DEFAULTS_CMDS if CMDLINE
help
These are not required but are commonly needed to support a good
selection of booting methods. Enable this to improve the capability
config BOOTSTD_DEFAULTS
bool "Select some common defaults for standard boot"
depends on BOOTSTD
- imply USE_BOOTCOMMAND
select BOOT_DEFAULTS
select BOOTMETH_DISTRO
help
config BOOTMETH_EFILOADER
bool "Bootdev support for EFI boot"
- depends on EFI_LOADER
+ depends on CMD_BOOTEFI
default y
help
Enables support for EFI boot using bootdevs. This makes the
config BOOTMETH_DISTRO
bool # Options needed to boot any distro
- select BOOTMETH_SCRIPT # E.g. Armbian uses scripts
+ select BOOTMETH_SCRIPT if CMDLINE # E.g. Armbian uses scripts
select BOOTMETH_EXTLINUX # E.g. Debian uses these
select BOOTMETH_EXTLINUX_PXE if CMD_PXE && CMD_NET && DM_ETH
- select BOOTMETH_EFILOADER if EFI_LOADER # E.g. Ubuntu uses this
+ select BOOTMETH_EFILOADER if CMD_BOOTEFI # E.g. Ubuntu uses this
config SPL_BOOTMETH_VBE
bool "Bootdev support for Verified Boot for Embedded (SPL)"
config BOOTMETH_SCRIPT
bool "Bootdev support for U-Boot scripts"
default y if BOOTSTD_FULL
+ depends on CMDLINE
select HUSH_PARSER
help
Enables support for booting a distro via a U-Boot script. This makes
event log memory region.
endif # MEASURED_BOOT
+config SYS_BOOTM_LEN
+ hex "Maximum size of a decompresed OS image"
+ depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ || \
+ LEGACY_IMAGE_FORMAT || SPL_LEGACY_IMAGE_FORMAT
+ default 0x4000000 if PPC || ARM64
+ default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7
+ default 0x800000
+ help
+ This is the maximum size of the buffer that is used to decompress the OS
+ image in to if attempting to boot a compressed image.
+
config SUPPORT_RAW_INITRD
bool "Enable raw initrd images"
help
config DISTRO_DEFAULTS
bool "(deprecated) Script-based booting of Linux distributions"
+ select CMDLINE
select BOOT_DEFAULTS
select AUTO_COMPLETE
select CMDLINE_EDITING
config AUTOBOOT
bool "Autoboot"
+ depends on CMDLINE
default y
help
This enables the autoboot. See doc/README.autoboot for detail.
+if AUTOBOOT
+
config BOOTDELAY
int "delay in seconds before automatically booting"
default 2
- depends on AUTOBOOT
help
Delay before automatically running bootcmd;
set to 0 to autoboot with no delay, but you can stop it by key input.
U-Boot automatic booting process and bring the device
to the U-Boot prompt for user input.
+if AUTOBOOT_KEYED
+
config AUTOBOOT_FLUSH_STDIN
bool "Enable flushing stdin before starting to read the password"
- depends on AUTOBOOT_KEYED && !SANDBOX
+ depends on !SANDBOX
help
When this option is enabled stdin buffer will be flushed before
starting to read the password.
config AUTOBOOT_PROMPT
string "Autoboot stop prompt"
- depends on AUTOBOOT_KEYED
default "Autoboot in %d seconds\\n"
help
This string is displayed before the boot delay selected by
config AUTOBOOT_ENCRYPTION
bool "Enable encryption in autoboot stopping"
- depends on AUTOBOOT_KEYED
help
This option allows a string to be entered into U-Boot to stop the
autoboot.
config AUTOBOOT_DELAY_STR
string "Delay autobooting via specific input key / string"
- depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ depends on !AUTOBOOT_ENCRYPTION
help
This option delays the automatic boot feature by issuing
a specific input key or string. If CONFIG_AUTOBOOT_DELAY_STR
config AUTOBOOT_STOP_STR
string "Stop autobooting via specific input key / string"
- depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ depends on !AUTOBOOT_ENCRYPTION
help
This option enables stopping (aborting) of the automatic
boot feature only by issuing a specific input key or
config AUTOBOOT_KEYED_CTRLC
bool "Enable Ctrl-C autoboot interruption"
- depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ depends on !AUTOBOOT_ENCRYPTION
help
This option allows for the boot sequence to be interrupted
by ctrl-c, in addition to the "bootdelaykey" and "bootstopkey".
config AUTOBOOT_NEVER_TIMEOUT
bool "Make the password entry never time-out"
- depends on AUTOBOOT_KEYED && AUTOBOOT_ENCRYPTION && CRYPT_PW
+ depends on AUTOBOOT_ENCRYPTION && CRYPT_PW
help
This option removes the timeout from the password entry
when the user first presses the <Enter> key before entering
config AUTOBOOT_STOP_STR_ENABLE
bool "Enable fixed string to stop autobooting"
- depends on AUTOBOOT_KEYED && AUTOBOOT_ENCRYPTION
+ depends on AUTOBOOT_ENCRYPTION
help
This option enables the feature to add a fixed stop
string that is defined at compile time.
includes a ":", the portion prior to the ":" will be treated
as a salt value.
+endif # AUTOBOOT_KEYED
+
+if !AUTOBOOT_KEYED
+
config AUTOBOOT_USE_MENUKEY
bool "Allow a specify key to run a menu from the environment"
- depends on !AUTOBOOT_KEYED
help
If a specific key is pressed to stop autoboot, then the commands in
the environment variable 'menucmd' are executed before boot starts.
For example, 33 means "!" in ASCII, so pressing ! at boot would take
this action.
+endif
+
+endif # AUTOBOOT
+
config AUTOBOOT_MENU_SHOW
bool "Show a menu on boot"
depends on CMD_BOOTMENU
config USE_BOOTCOMMAND
bool "Enable a default value for bootcmd"
+ depends on CMDLINE
help
Provide a default value for the bootcmd entry in the environment. If
autoboot is enabled this is what will be run automatically. Enable
config USE_PREBOOT
bool "Enable preboot"
+ depends on CMDLINE
help
When this option is enabled, the existence of the environment
variable "preboot" will be checked immediately before starting the
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EXTLINUX) += bootmeth_extlinux.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EXTLINUX_PXE) += bootmeth_pxe.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EFILOADER) += bootmeth_efi.o
-obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_CROS) += bootmeth_cros.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_CROS) += bootm.o bootm_os.o bootmeth_cros.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o
ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL
if (flag != BOOTM_STATE_OS_GO)
return 0;
-#if defined(CONFIG_FIT)
- if (!images->legacy_hdr_valid) {
- fit_unsupported_reset("VxWorks");
- return 1;
- }
-#endif
-
do_bootvx_fdt(images);
return 1;
-menu "Command line interface"
-
-config CMDLINE
- bool "Support U-Boot commands"
+menuconfig CMDLINE
+ bool "Command line interface"
default y
help
Enable U-Boot's command-line functions. This provides a means
Depending on the number of commands enabled, this can add
substantially to the size of U-Boot.
+if CMDLINE
+
config HUSH_PARSER
bool "Use hush shell"
- depends on CMDLINE
help
This option enables the "hush" shell (from Busybox) as command line
interpreter, thus enabling powerful command line syntax like
config CMDLINE_EDITING
bool "Enable command line editing"
- depends on CMDLINE
default y
help
Enable editing and History functions for interactive command line
config AUTO_COMPLETE
bool "Enable auto complete using TAB"
- depends on CMDLINE
default y
help
Enable auto completion of commands using TAB.
config SYS_LONGHELP
bool "Enable long help messages"
- depends on CMDLINE
- default y if CMDLINE
+ default y
help
Defined when you want long help messages included
Do not set this option when short of memory.
int "Maximum number arguments accepted by commands"
default 16
-config SYS_CBSIZE
- int "Console input buffer size"
- default 2048 if ARCH_TEGRA || ARCH_VERSAL || ARCH_ZYNQ || ARCH_ZYNQMP || \
- RCAR_GEN3 || TARGET_SOCFPGA_SOC64
- default 512 if ARCH_MX5 || ARCH_MX6 || ARCH_MX7 || FSL_LSCH2 || \
- FSL_LSCH3 || X86
- default 256 if M68K || PPC
- default 1024
-
-config SYS_PBSIZE
- int "Buffer size for console output"
- default 1024 if ARCH_SUNXI
- default 1044
-
config SYS_XTRACE
bool "Command execution tracer"
- depends on CMDLINE
- default y if CMDLINE
+ default y
help
This option enables the possiblity to print all commands before
executing them and after all variables are evaluated (similar
help
Support booting VxWorks images via the bootm command.
-config SYS_BOOTM_LEN
- hex "Maximum size of a decompresed OS image"
- depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ || \
- LEGACY_IMAGE_FORMAT || SPL_LEGACY_IMAGE_FORMAT
- default 0x4000000 if PPC || ARM64
- default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7
- default 0x800000
- help
- This is the maximum size of the buffer that is used to decompress the OS
- image in to, if passing a compressed image to bootm/booti/bootz.
-
config CMD_BOOTEFI
bool "bootefi"
depends on EFI_LOADER
help
Boot an EFI image from memory.
+config CMD_BOOTEFI_BOOTMGR
+ bool "UEFI Boot Manager command"
+ depends on BOOTEFI_BOOTMGR && CMD_BOOTEFI
+ default y
+ help
+ Select this option to enable the 'bootmgr' subcommand of 'bootefi'.
+ This subcommand will allow you to select the UEFI binary to be booted
+ via UEFI variables Boot####, BootOrder, and BootNext.
+
config CMD_BOOTEFI_HELLO_COMPILE
bool "Compile a standard EFI hello world binary for testing"
depends on CMD_BOOTEFI && !CPU_V7M
config CMD_BCB
bool "bcb"
- depends on MMC
depends on PARTITIONS
help
Read/modify/write the fields of Bootloader Control Block, usually
Enable the 'gpt' command to ready and write GPT style partition
tables.
-config RANDOM_UUID
- bool "GPT Random UUID generation"
- select LIB_UUID
- help
- Enable the generation of partitions with random UUIDs if none
- are provided.
-
config CMD_GPT_RENAME
bool "GPT partition renaming commands"
depends on CMD_GPT
config CMD_EFICONFIG
bool "eficonfig - provide menu-driven uefi variables maintenance interface"
default y if !HAS_BOARD_SIZE_LIMIT
- depends on CMD_BOOTEFI_BOOTMGR
+ depends on BOOTEFI_BOOTMGR
select MENU
help
Enable the 'eficonfig' command which provides the menu-driven UEFI
config CMD_QFW
bool "qfw"
select QFW
+ default y if TARGET_QEMU_ARM_32BIT || TARGET_QEMU_ARM_64BIT || \
+ TARGET_QEMU_X86 || TARGET_QEMU_X86_64
help
This provides access to the QEMU firmware interface. The main
feature is to allow easy loading of files passed to qemu-system
config CMD_SELECT_FONT
bool "select font size"
depends on VIDEO
+ default y if CONSOLE_TRUETYPE
help
Enabling this will provide 'font' command.
Allows font selection at runtime.
default y
help
Enable useful commands for the Meson Soc family developed by Amlogic Inc.
-endmenu
+
+endif
obj-$(CONFIG_CMD_MUX) += mux.o
obj-$(CONFIG_CMD_NAND) += nand.o
obj-$(CONFIG_CMD_NET) += net.o
+obj-$(CONFIG_ENV_SUPPORT) += nvedit.o
obj-$(CONFIG_CMD_NVEDIT_EFI) += nvedit_efi.o
obj-$(CONFIG_CMD_ONENAND) += onenand.o
obj-$(CONFIG_CMD_OSD) += osd.o
obj-$(CONFIG_$(SPL_)CMD_TLV_EEPROM) += tlv_eeprom.o
-# core command
-obj-y += nvedit.o
-
obj-$(CONFIG_CMD_BCM_EXT_UTILS) += broadcom/
filechk_data_gz = (echo "static const char data_gz[] ="; cat $< | scripts/bin2c; echo ";")
BCB_CMD_STORE,
};
-static int bcb_dev = -1;
-static int bcb_part = -1;
+static const char * const fields[] = {
+ "command",
+ "status",
+ "recovery",
+ "stage"
+};
+
static struct bootloader_message bcb __aligned(ARCH_DMA_MINALIGN) = { { 0 } };
+static struct disk_partition partition_data;
+
+static struct blk_desc *block;
+static struct disk_partition *partition = &partition_data;
static int bcb_cmd_get(char *cmd)
{
switch (cmd) {
case BCB_CMD_LOAD:
+ if (argc != 3 && argc != 4)
+ goto err;
+ break;
case BCB_CMD_FIELD_SET:
if (argc != 3)
goto err;
return -1;
}
- if (cmd != BCB_CMD_LOAD && (bcb_dev < 0 || bcb_part < 0)) {
+ if (cmd != BCB_CMD_LOAD && !block) {
printf("Error: Please, load BCB first!\n");
return -1;
}
return -1;
}
-static int bcb_field_get(char *name, char **fieldp, int *sizep)
+static int bcb_field_get(const char *name, char **fieldp, int *sizep)
{
if (!strcmp(name, "command")) {
*fieldp = bcb.command;
return 0;
}
-static int __bcb_load(int devnum, const char *partp)
+static void __bcb_reset(void)
+{
+ block = NULL;
+ partition = &partition_data;
+ memset(&partition_data, 0, sizeof(struct disk_partition));
+ memset(&bcb, 0, sizeof(struct bootloader_message));
+}
+
+static int __bcb_initialize(const char *iface, int devnum, const char *partp)
{
- struct blk_desc *desc;
- struct disk_partition info;
- u64 cnt;
char *endp;
int part, ret;
- desc = blk_get_devnum_by_uclass_id(UCLASS_MMC, devnum);
- if (!desc) {
+ block = blk_get_dev(iface, devnum);
+ if (!block) {
ret = -ENODEV;
goto err_read_fail;
}
/*
- * always select the USER mmc hwpart in case another
+ * always select the first hwpart in case another
* blk operation selected a different hwpart
*/
- ret = blk_dselect_hwpart(desc, 0);
+ ret = blk_dselect_hwpart(block, 0);
if (IS_ERR_VALUE(ret)) {
ret = -ENODEV;
goto err_read_fail;
part = simple_strtoul(partp, &endp, 0);
if (*endp == '\0') {
- ret = part_get_info(desc, part, &info);
+ ret = part_get_info(block, part, partition);
if (ret)
goto err_read_fail;
} else {
- part = part_get_info_by_name(desc, partp, &info);
+ part = part_get_info_by_name(block, partp, partition);
if (part < 0) {
ret = part;
goto err_read_fail;
}
}
- cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), info.blksz);
- if (cnt > info.size)
+ return CMD_RET_SUCCESS;
+
+err_read_fail:
+ printf("Error: %d %d:%s read failed (%d)\n", block->uclass_id,
+ block->devnum, partition->name, ret);
+ __bcb_reset();
+ return CMD_RET_FAILURE;
+}
+
+static int __bcb_load(void)
+{
+ u64 cnt;
+ int ret;
+
+ cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), partition->blksz);
+ if (cnt > partition->size)
goto err_too_small;
- if (blk_dread(desc, info.start, cnt, &bcb) != cnt) {
+ if (blk_dread(block, partition->start, cnt, &bcb) != cnt) {
ret = -EIO;
goto err_read_fail;
}
- bcb_dev = desc->devnum;
- bcb_part = part;
- debug("%s: Loaded from mmc %d:%d\n", __func__, bcb_dev, bcb_part);
+ debug("%s: Loaded from %d %d:%s\n", __func__, block->uclass_id,
+ block->devnum, partition->name);
return CMD_RET_SUCCESS;
err_read_fail:
- printf("Error: mmc %d:%s read failed (%d)\n", devnum, partp, ret);
+ printf("Error: %d %d:%s read failed (%d)\n", block->uclass_id,
+ block->devnum, partition->name, ret);
goto err;
err_too_small:
- printf("Error: mmc %d:%s too small!", devnum, partp);
- goto err;
+ printf("Error: %d %d:%s too small!", block->uclass_id,
+ block->devnum, partition->name);
err:
- bcb_dev = -1;
- bcb_part = -1;
-
+ __bcb_reset();
return CMD_RET_FAILURE;
}
static int do_bcb_load(struct cmd_tbl *cmdtp, int flag, int argc,
char * const argv[])
{
+ int ret;
+ int devnum;
char *endp;
- int devnum = simple_strtoul(argv[1], &endp, 0);
+ char *iface = "mmc";
+
+ if (argc == 4) {
+ iface = argv[1];
+ argc--;
+ argv++;
+ }
+ devnum = simple_strtoul(argv[1], &endp, 0);
if (*endp != '\0') {
printf("Error: Device id '%s' not a number\n", argv[1]);
return CMD_RET_FAILURE;
}
- return __bcb_load(devnum, argv[2]);
+ ret = __bcb_initialize(iface, devnum, argv[2]);
+ if (ret != CMD_RET_SUCCESS)
+ return ret;
+
+ return __bcb_load();
}
-static int __bcb_set(char *fieldp, const char *valp)
+static int __bcb_set(const char *fieldp, const char *valp)
{
int size, len;
char *field, *str, *found, *tmp;
static int __bcb_store(void)
{
- struct blk_desc *desc;
- struct disk_partition info;
u64 cnt;
int ret;
- desc = blk_get_devnum_by_uclass_id(UCLASS_MMC, bcb_dev);
- if (!desc) {
- ret = -ENODEV;
- goto err;
- }
-
- ret = part_get_info(desc, bcb_part, &info);
- if (ret)
- goto err;
+ cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), partition->blksz);
- cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), info.blksz);
-
- if (blk_dwrite(desc, info.start, cnt, &bcb) != cnt) {
+ if (blk_dwrite(block, partition->start, cnt, &bcb) != cnt) {
ret = -EIO;
goto err;
}
return CMD_RET_SUCCESS;
err:
- printf("Error: mmc %d:%d write failed (%d)\n", bcb_dev, bcb_part, ret);
+ printf("Error: %d %d:%s write failed (%d)\n", block->uclass_id,
+ block->devnum, partition->name, ret);
return CMD_RET_FAILURE;
}
return __bcb_store();
}
-int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp)
+int bcb_find_partition_and_load(const char *iface, int devnum, char *partp)
{
int ret;
- ret = __bcb_load(devnum, partp);
- if (ret != CMD_RET_SUCCESS)
- return ret;
+ __bcb_reset();
- ret = __bcb_set("command", reasonp);
+ ret = __bcb_initialize(iface, devnum, partp);
if (ret != CMD_RET_SUCCESS)
return ret;
- ret = __bcb_store();
- if (ret != CMD_RET_SUCCESS)
- return ret;
+ return __bcb_load();
+}
- return 0;
+int bcb_load(struct blk_desc *block_description, struct disk_partition *disk_partition)
+{
+ __bcb_reset();
+
+ block = block_description;
+ partition = disk_partition;
+
+ return __bcb_load();
+}
+
+int bcb_set(enum bcb_field field, const char *value)
+{
+ if (field > BCB_FIELD_STAGE)
+ return CMD_RET_FAILURE;
+ return __bcb_set(fields[field], value);
+}
+
+int bcb_get(enum bcb_field field, char *value_out, size_t value_size)
+{
+ int size;
+ char *field_value;
+
+ if (field > BCB_FIELD_STAGE)
+ return CMD_RET_FAILURE;
+ if (bcb_field_get(fields[field], &field_value, &size))
+ return CMD_RET_FAILURE;
+
+ strlcpy(value_out, field_value, value_size);
+
+ return CMD_RET_SUCCESS;
+}
+
+int bcb_store(void)
+{
+ return __bcb_store();
+}
+
+void bcb_reset(void)
+{
+ __bcb_reset();
}
static struct cmd_tbl cmd_bcb_sub[] = {
U_BOOT_CMD(
bcb, CONFIG_SYS_MAXARGS, 1, do_bcb,
"Load/set/clear/test/dump/store Android BCB fields",
- "load <dev> <part> - load BCB from mmc <dev>:<part>\n"
- "bcb set <field> <val> - set BCB <field> to <val>\n"
- "bcb clear [<field>] - clear BCB <field> or all fields\n"
- "bcb test <field> <op> <val> - test BCB <field> against <val>\n"
- "bcb dump <field> - dump BCB <field>\n"
- "bcb store - store BCB back to mmc\n"
+ "load <interface> <dev> <part> - load BCB from <interface> <dev>:<part>\n"
+ "load <dev> <part> - load BCB from mmc <dev>:<part>\n"
+ "bcb set <field> <val> - set BCB <field> to <val>\n"
+ "bcb clear [<field>] - clear BCB <field> or all fields\n"
+ "bcb test <field> <op> <val> - test BCB <field> against <val>\n"
+ "bcb dump <field> - dump BCB <field>\n"
+ "bcb store - store BCB back to <interface>\n"
"\n"
"Legend:\n"
- "<dev> - MMC device index containing the BCB partition\n"
- "<part> - MMC partition index or name containing the BCB\n"
- "<field> - one of {command,status,recovery,stage,reserved}\n"
- "<op> - the binary operator used in 'bcb test':\n"
- " '=' returns true if <val> matches the string stored in <field>\n"
- " '~' returns true if <val> matches a subset of <field>'s string\n"
- "<val> - string/text provided as input to bcb {set,test}\n"
- " NOTE: any ':' character in <val> will be replaced by line feed\n"
- " during 'bcb set' and used as separator by upper layers\n"
+ "<interface> - storage device interface (virtio, mmc, etc)\n"
+ "<dev> - storage device index containing the BCB partition\n"
+ "<part> - partition index or name containing the BCB\n"
+ "<field> - one of {command,status,recovery,stage,reserved}\n"
+ "<op> - the binary operator used in 'bcb test':\n"
+ " '=' returns true if <val> matches the string stored in <field>\n"
+ " '~' returns true if <val> matches a subset of <field>'s string\n"
+ "<val> - string/text provided as input to bcb {set,test}\n"
+ " NOTE: any ':' character in <val> will be replaced by line feed\n"
+ " during 'bcb set' and used as separator by upper layers\n"
);
efi_status_t ret;
efi_uintn_t exit_data_size = 0;
u16 *exit_data = NULL;
+ struct efi_event *evt;
/* On ARM switch from EL3 or secure mode to EL2 or non-secure mode */
switch_to_non_secure_mode();
log_err("Failed to remove loadfile2 for initrd\n");
}
+ /* Notify EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR event group. */
+ list_for_each_entry(evt, &efi_events, link) {
+ if (evt->group &&
+ !guidcmp(evt->group,
+ &efi_guid_event_group_return_to_efibootmgr)) {
+ efi_signal_event(evt);
+ EFI_CALL(systab.boottime->close_event(evt));
+ break;
+ }
+ }
+
/* Control is returned to U-Boot, disable EFI watchdog */
efi_set_watchdog(0);
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
+#include <net.h>
#include <part.h>
#include <search.h>
#include <linux/ctype.h>
return initrd_dp;
}
+/**
+ * efi_boot_add_uri() - set URI load option
+ *
+ * @argc: Number of arguments
+ * @argv: Argument array
+ * @var_name16: variable name buffer
+ * @var_name16_size: variable name buffer size
+ * @lo: pointer to the load option
+ * @file_path: buffer to set the generated device path pointer
+ * @fp_size: file_path size
+ * Return: CMD_RET_SUCCESS on success,
+ * CMD_RET_USAGE or CMD_RET_RET_FAILURE on failure
+ */
+static int efi_boot_add_uri(int argc, char *const argv[], u16 *var_name16,
+ size_t var_name16_size, struct efi_load_option *lo,
+ struct efi_device_path **file_path,
+ efi_uintn_t *fp_size)
+{
+ int id;
+ char *pos;
+ char *endp;
+ u16 *label;
+ efi_uintn_t uridp_len;
+ struct efi_device_path_uri *uridp;
+
+ if (argc < 3 || lo->label)
+ return CMD_RET_USAGE;
+
+ id = (int)hextoul(argv[1], &endp);
+ if (*endp != '\0' || id > 0xffff)
+ return CMD_RET_USAGE;
+
+ label = efi_convert_string(argv[2]);
+ if (!label)
+ return CMD_RET_FAILURE;
+
+ if (!wget_validate_uri(argv[3])) {
+ printf("ERROR: invalid URI\n");
+ return CMD_RET_FAILURE;
+ }
+
+ efi_create_indexed_name(var_name16, var_name16_size, "Boot", id);
+ lo->label = label;
+
+ uridp_len = sizeof(struct efi_device_path) + strlen(argv[3]) + 1;
+ uridp = efi_alloc(uridp_len + sizeof(END));
+ uridp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+ uridp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_URI;
+ uridp->dp.length = uridp_len;
+ strcpy(uridp->uri, argv[3]);
+ pos = (char *)uridp + uridp_len;
+ memcpy(pos, &END, sizeof(END));
+
+ *file_path = &uridp->dp;
+ *fp_size += uridp_len + sizeof(END);
+
+ return CMD_RET_SUCCESS;
+}
+
/**
* do_efi_boot_add() - set UEFI load option
*
argc -= 1;
argv += 1;
break;
+ case 'u':
+ if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT)) {
+ r = efi_boot_add_uri(argc, argv, var_name16,
+ sizeof(var_name16), &lo,
+ &file_path, &fp_size);
+ if (r != CMD_RET_SUCCESS)
+ goto out;
+ fp_free = file_path;
+ argc -= 3;
+ argv += 3;
+ } else{
+ r = CMD_RET_USAGE;
+ goto out;
+ }
+ break;
default:
r = CMD_RET_USAGE;
goto out;
" -b|-B <bootid> <label> <interface> <devnum>[:<part>] <file path>\n"
" -i|-I <interface> <devnum>[:<part>] <initrd file path>\n"
" (-b, -i for short form device path)\n"
+#if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
+ " -u <bootid> <label> <uri>\n"
+#endif
" -s '<optional data>'\n"
"efidebug boot rm <bootid#1> [<bootid#2> [<bootid#3> [...]]]\n"
" - delete UEFI BootXXXX variables\n"
#include <env.h>
#include <watchdog.h>
#include <malloc.h>
+#include <mapmem.h>
#include <asm/byteorder.h>
#include <jffs2/jffs2.h>
#include <nand.h>
env_set_hex("nand_erasesize", mtd->erasesize);
}
-static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off,
+static int raw_access(struct mtd_info *mtd, void *buf, loff_t off,
ulong count, int read, int no_verify)
{
int ret = 0;
while (count--) {
/* Raw access */
mtd_oob_ops_t ops = {
- .datbuf = (u8 *)addr,
- .oobbuf = ((u8 *)addr) + mtd->writesize,
+ .datbuf = buf,
+ .oobbuf = buf + mtd->writesize,
.len = mtd->writesize,
.ooblen = mtd->oobsize,
.mode = MTD_OPS_RAW
break;
}
- addr += mtd->writesize + mtd->oobsize;
+ buf += mtd->writesize + mtd->oobsize;
off += mtd->writesize;
}
int read;
int raw = 0;
int no_verify = 0;
+ void *buf;
if (argc < 4)
goto usage;
}
mtd = get_nand_dev_by_index(dev);
+ buf = map_sysmem(addr, maxsize);
if (!s || !strcmp(s, ".jffs2") ||
!strcmp(s, ".e") || !strcmp(s, ".i")) {
if (read)
ret = nand_read_skip_bad(mtd, off, &rwsize,
- NULL, maxsize,
- (u_char *)addr);
+ NULL, maxsize, buf);
else
ret = nand_write_skip_bad(mtd, off, &rwsize,
- NULL, maxsize,
- (u_char *)addr,
+ NULL, maxsize, buf,
WITH_WR_VERIFY);
#ifdef CONFIG_CMD_NAND_TRIMFFS
} else if (!strcmp(s, ".trimffs")) {
if (read) {
printf("Unknown nand command suffix '%s'\n", s);
+ unmap_sysmem(buf);
return 1;
}
ret = nand_write_skip_bad(mtd, off, &rwsize, NULL,
- maxsize, (u_char *)addr,
+ maxsize, buf,
WITH_DROP_FFS | WITH_WR_VERIFY);
#endif
} else if (!strcmp(s, ".oob")) {
/* out-of-band data */
mtd_oob_ops_t ops = {
- .oobbuf = (u8 *)addr,
+ .oobbuf = buf,
.ooblen = rwsize,
.mode = MTD_OPS_RAW
};
else
ret = mtd_write_oob(mtd, off, &ops);
} else if (raw) {
- ret = raw_access(mtd, addr, off, pagecount, read,
+ ret = raw_access(mtd, buf, off, pagecount, read,
no_verify);
} else {
printf("Unknown nand command suffix '%s'.\n", s);
+ unmap_sysmem(buf);
return 1;
}
+ unmap_sysmem(buf);
printf(" %zu bytes %s: %s\n", rwsize,
read ? "read" : "written", ret ? "ERROR" : "OK");
*/
#define MAX_ENV_SIZE (1 << 20) /* 1 MiB */
-/*
- * This variable is incremented on each do_env_set(), so it can
- * be used via env_get_id() as an indication, if the environment
- * has changed or not. So it is possible to reread an environment
- * variable only if the environment was changed ... done so for
- * example in NetInitLoop()
- */
-static int env_id = 1;
-
-int env_get_id(void)
-{
- return env_id;
-}
-
#ifndef CONFIG_SPL_BUILD
/*
* Command interface: print one or all environment variables
#endif
#endif /* CONFIG_SPL_BUILD */
-/*
- * Set a new environment variable,
- * or replace or delete an existing one.
- */
-static int _do_env_set(int flag, int argc, char *const argv[], int env_flag)
-{
- int i, len;
- char *name, *value, *s;
- struct env_entry e, *ep;
-
- debug("Initial value for argc=%d\n", argc);
-
-#if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_CMD_NVEDIT_EFI)
- if (argc > 1 && argv[1][0] == '-' && argv[1][1] == 'e')
- return do_env_set_efi(NULL, flag, --argc, ++argv);
-#endif
-
- while (argc > 1 && **(argv + 1) == '-') {
- char *arg = *++argv;
-
- --argc;
- while (*++arg) {
- switch (*arg) {
- case 'f': /* force */
- env_flag |= H_FORCE;
- break;
- default:
- return CMD_RET_USAGE;
- }
- }
- }
- debug("Final value for argc=%d\n", argc);
- name = argv[1];
-
- if (strchr(name, '=')) {
- printf("## Error: illegal character '='"
- "in variable name \"%s\"\n", name);
- return 1;
- }
-
- env_id++;
-
- /* Delete only ? */
- if (argc < 3 || argv[2] == NULL) {
- int rc = hdelete_r(name, &env_htab, env_flag);
-
- /* If the variable didn't exist, don't report an error */
- return rc && rc != -ENOENT ? 1 : 0;
- }
-
- /*
- * Insert / replace new value
- */
- for (i = 2, len = 0; i < argc; ++i)
- len += strlen(argv[i]) + 1;
-
- value = malloc(len);
- if (value == NULL) {
- printf("## Can't malloc %d bytes\n", len);
- return 1;
- }
- for (i = 2, s = value; i < argc; ++i) {
- char *v = argv[i];
-
- while ((*s++ = *v++) != '\0')
- ;
- *(s - 1) = ' ';
- }
- if (s != value)
- *--s = '\0';
-
- e.key = name;
- e.data = value;
- hsearch_r(e, ENV_ENTER, &ep, &env_htab, env_flag);
- free(value);
- if (!ep) {
- printf("## Error inserting \"%s\" variable, errno=%d\n",
- name, errno);
- return 1;
- }
-
- return 0;
-}
-
-int env_set(const char *varname, const char *varvalue)
-{
- const char * const argv[4] = { "setenv", varname, varvalue, NULL };
-
- /* before import into hashtable */
- if (!(gd->flags & GD_FLG_ENV_READY))
- return 1;
-
- if (varvalue == NULL || varvalue[0] == '\0')
- return _do_env_set(0, 2, (char * const *)argv, H_PROGRAMMATIC);
- else
- return _do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
-}
-
#ifndef CONFIG_SPL_BUILD
static int do_env_set(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
if (argc < 2)
return CMD_RET_USAGE;
- return _do_env_set(flag, argc, argv, H_INTERACTIVE);
+ return env_do_env_set(flag, argc, argv, H_INTERACTIVE);
}
/*
}
/* Continue calling setenv code */
- return _do_env_set(flag, len, local_args, H_INTERACTIVE);
+ return env_do_env_set(flag, len, local_args, H_INTERACTIVE);
}
#endif
if (buffer[0] == '\0') {
const char * const _argv[3] = { "setenv", argv[1], NULL };
- return _do_env_set(0, 2, (char * const *)_argv, H_INTERACTIVE);
+ return env_do_env_set(0, 2, (char * const *)_argv, H_INTERACTIVE);
} else {
const char * const _argv[4] = { "setenv", argv[1], buffer,
NULL };
- return _do_env_set(0, 3, (char * const *)_argv, H_INTERACTIVE);
+ return env_do_env_set(0, 3, (char * const *)_argv, H_INTERACTIVE);
}
}
#endif /* CONFIG_CMD_EDITENV */
}
debug("Final value for argc=%d\n", argc);
- env_id++;
+ env_inc_id();
while (--argc > 0) {
char *name = *++argv;
if (argc == 2) {
if (strncmp(argv[1], "res", 3) == 0) {
printf("\nReset SCSI\n");
-#ifndef CONFIG_DM_SCSI
- scsi_bus_reset(NULL);
-#endif
ret = scsi_scan(true);
if (ret)
return CMD_RET_FAILURE;
#include <common.h>
#include <command.h>
#include <display_options.h>
-#include <timestamp.h>
-#include <version.h>
#include <version_string.h>
#include <linux/compiler.h>
#ifdef CONFIG_SYS_COREBOOT
#include <asm/cb_sysinfo.h>
#endif
-#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
- U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
-
-const char version_string[] = U_BOOT_VERSION_STRING;
-const unsigned short version_num = U_BOOT_VERSION_NUM;
-const unsigned char version_num_patch = U_BOOT_VERSION_NUM_PATCH;
-
static int do_version(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
The buffer is allocated immediately after the malloc() region is
ready.
+config SYS_CBSIZE
+ int "Console input buffer size"
+ default 2048 if ARCH_TEGRA || ARCH_VERSAL || ARCH_ZYNQ || ARCH_ZYNQMP || \
+ RCAR_GEN3 || TARGET_SOCFPGA_SOC64
+ default 512 if ARCH_MX5 || ARCH_MX6 || ARCH_MX7 || FSL_LSCH2 || \
+ FSL_LSCH3 || X86
+ default 256 if M68K || PPC
+ default 1024
+ help
+ Set the size of the console input buffer. This is used both in the
+ case of reading input literally from the user in some manner as well
+ as when we need to construct or modify that type of input, for
+ example when constructing "bootargs" for the OS.
+
+config SYS_PBSIZE
+ int "Console output buffer size"
+ default 1024 if ARCH_SUNXI
+ default 1044
+ help
+ Set the size of the console output buffer. This is used when we need
+ to work with some form of a buffer while providing output in some
+ form to the user.
+
config DISABLE_CONSOLE
bool "Add functionality to disable console completely"
help
obj-y += init/
obj-y += main.o
obj-y += exports.o
+obj-y += cli_getch.o cli_simple.o cli_readline.o
obj-$(CONFIG_HUSH_PARSER) += cli_hush.o
obj-$(CONFIG_AUTOBOOT) += autoboot.o
+obj-y += version.o
# # boards
obj-y += board_f.o
obj-$(CONFIG_MENU) += menu.o
obj-$(CONFIG_UPDATE_COMMON) += update.o
obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
-obj-$(CONFIG_CMDLINE) += cli_getch.o cli_readline.o cli_simple.o
endif # !CONFIG_SPL_BUILD
}
#endif
-#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
-static int initr_scsi(void)
-{
- puts("SCSI: ");
- scsi_init();
- puts("\n");
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_CMD_NET
static int initr_net(void)
{
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
#endif
-#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
- INIT_FUNC_WATCHDOG_RESET
- initr_scsi,
-#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init,
#endif
#define debug_parser(fmt, args...) \
debug_cond(DEBUG_PARSER, fmt, ##args)
-
-int cli_simple_parse_line(char *line, char *argv[])
-{
- int nargs = 0;
-
- debug_parser("%s: \"%s\"\n", __func__, line);
- while (nargs < CONFIG_SYS_MAXARGS) {
- /* skip any white space */
- while (isblank(*line))
- ++line;
-
- if (*line == '\0') { /* end of line, no more args */
- argv[nargs] = NULL;
- debug_parser("%s: nargs=%d\n", __func__, nargs);
- return nargs;
- }
-
- argv[nargs++] = line; /* begin of argument string */
-
- /* find end of string */
- while (*line && !isblank(*line))
- ++line;
-
- if (*line == '\0') { /* end of line, no more args */
- argv[nargs] = NULL;
- debug_parser("parse_line: nargs=%d\n", nargs);
- return nargs;
- }
-
- *line++ = '\0'; /* terminate current arg */
- }
-
- printf("** Too many args (max. %d) **\n", CONFIG_SYS_MAXARGS);
-
- debug_parser("%s: nargs=%d\n", __func__, nargs);
- return nargs;
-}
-
int cli_simple_process_macros(const char *input, char *output, int max_size)
{
char c, prev;
return ret;
}
+#ifdef CONFIG_CMDLINE
+int cli_simple_parse_line(char *line, char *argv[])
+{
+ int nargs = 0;
+
+ debug_parser("%s: \"%s\"\n", __func__, line);
+ while (nargs < CONFIG_SYS_MAXARGS) {
+ /* skip any white space */
+ while (isblank(*line))
+ ++line;
+
+ if (*line == '\0') { /* end of line, no more args */
+ argv[nargs] = NULL;
+ debug_parser("%s: nargs=%d\n", __func__, nargs);
+ return nargs;
+ }
+
+ argv[nargs++] = line; /* begin of argument string */
+
+ /* find end of string */
+ while (*line && !isblank(*line))
+ ++line;
+
+ if (*line == '\0') { /* end of line, no more args */
+ argv[nargs] = NULL;
+ debug_parser("parse_line: nargs=%d\n", nargs);
+ return nargs;
+ }
+
+ *line++ = '\0'; /* terminate current arg */
+ }
+
+ printf("** Too many args (max. %d) **\n", CONFIG_SYS_MAXARGS);
+
+ debug_parser("%s: nargs=%d\n", __func__, nargs);
+ return nargs;
+}
+
/*
* WARNING:
*
return rcode;
}
+#endif
config SPL_SHOW_ERRORS
bool "Show more information when something goes wrong"
+ depends on SPL_LIBCOMMON_SUPPORT
help
This enabled more verbose error messages and checking when something
goes wrong in SPL. For example, it shows the error code when U-Boot
spl_board_init() from board_init_r(). This function should be
provided by the board.
+config SPL_LOAD_BLOCK
+ bool
+ help
+ Support loading images from block devices. This adds a bl_len member
+ to struct spl_load_info.
+
config SPL_BOOTROM_SUPPORT
bool "Support returning to the BOOTROM"
+ select SPL_LOAD_BLOCK if MACH_IMX
help
Some platforms (e.g. the Rockchip RK3368) provide support in their
ROM for loading the next boot-stage after performing basic setup
banner ("U-Boot SPL ..."). This function should be provided by
the board.
+config SPL_SYS_MMCSD_RAW_MODE
+ bool
+ help
+ Support booting from an MMC without a filesystem.
+
config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
bool "MMC raw mode: by sector"
default y if ARCH_SUNXI || ARCH_DAVINCI || ARCH_UNIPHIER || \
ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
OMAP44XX || OMAP54XX || AM33XX || AM43XX || \
TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED
+ select SPL_LOAD_BLOCK if SPL_MMC
+ select SPL_SYS_MMCSD_RAW_MODE if SPL_MMC
help
Use sector number for specifying U-Boot location on MMC/SD in
raw mode.
config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
bool "MMC Raw mode: by partition"
+ select SPL_LOAD_BLOCK if SPL_MMC
+ select SPL_SYS_MMCSD_RAW_MODE if SPL_MMC
help
Use a partition for loading U-Boot when using MMC/SD in raw mode.
filesystem from within SPL. Support for the underlying block
device (e.g. MMC or USB) must be enabled separately.
+config SPL_FS_FAT_DMA_ALIGN
+ bool "Use DMA-aligned buffers with FAT"
+ depends on SPL_FS_FAT
+ select SPL_LOAD_BLOCK
+ default y if SPL_LOAD_FIT
+ help
+ The FAT filesystem driver tries to ensure that the reads it issues to
+ the block subsystem use DMA-aligned buffers. If the supplied buffer is
+ not DMA-aligned, the FAT driver will use a bounce-buffer and read
+ block-by-block. This is separate from the bounce-buffer used by the
+ block subsystem (CONFIG_BOUNCE_BUFFER).
+
+ Enable this config to align buffers passed to the FAT filesystem
+ driver. This will speed up reads, but will increase the size of U-Boot
+ by around 60 bytes.
+
config SPL_FS_LOAD_PAYLOAD_NAME
string "File to load for U-Boot from the filesystem"
depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS || SPL_SEMIHOSTING
allows DRAM to be set up before loading U-Boot into that DRAM,
where it can run.
-config SPL_MTD_SUPPORT
+config SPL_MTD
bool "Support MTD drivers"
help
Enable support for MTD (Memory Technology Device) within SPL. MTD
config SPL_NAND_SUPPORT
bool "Support NAND flash"
+ select SPL_LOAD_BLOCK
help
Enable support for NAND (Negative AND) flash in SPL. NAND flash
can be used to allow SPL to load U-Boot from supported devices.
config SPL_FALCON_BOOT_MMCSD
bool "Enable Falcon boot from MMC or SD media"
depends on SPL_OS_BOOT && SPL_MMC
+ select SPL_LOAD_BLOCK
+ select SPL_SYS_MMCSD_RAW_MODE
help
Select this if the Falcon mode OS image mode is on MMC or SD media.
config SPL_NVME
bool "NVM Express device support"
depends on BLK
- select HAVE_BLOCK_DEVICE
select FS_LOADER
select SPL_BLK_FS
help
#include <mapmem.h>
#include <serial.h>
#include <spl.h>
+#include <spl_load.h>
#include <system-constants.h>
#include <asm/global_data.h>
#include <asm-generic/gpio.h>
return 0;
}
+#if SPL_LOAD_USERS > 1
+int spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev, struct spl_load_info *info,
+ size_t size, size_t offset)
+{
+ return _spl_load(spl_image, bootdev, info, size, offset);
+}
+#endif
+
__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
typedef void __noreturn (*image_entry_noargs_t)(void);
ret = boot_from_devices(&spl_image, spl_boot_list,
ARRAY_SIZE(spl_boot_list));
if (ret) {
- if (CONFIG_IS_ENABLED(SHOW_ERRORS) &&
- CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT))
+ if (CONFIG_IS_ENABLED(SHOW_ERRORS))
printf(SPL_TPL_PROMPT "failed to boot from all boot devices (err=%d)\n",
ret);
else
#include <common.h>
#include <spl.h>
+#include <spl_load.h>
#include <image.h>
#include <fs.h>
+#include <asm/cache.h>
#include <asm/io.h>
struct blk_dev {
const char *ifname;
+ const char *filename;
char dev_part_str[8];
};
return ret;
}
- ret = fs_read(load->filename, virt_to_phys(buf), file_offset, size,
+ ret = fs_read(dev->filename, virt_to_phys(buf), file_offset, size,
&actlen);
if (ret < 0) {
printf("spl: error reading image %s. Err - %d\n",
- load->filename, ret);
+ dev->filename, ret);
return ret;
}
enum uclass_id uclass_id, int devnum, int partnum)
{
const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
- struct legacy_img_hdr *header;
struct blk_desc *blk_desc;
- loff_t actlen, filesize;
+ loff_t filesize;
struct blk_dev dev;
+ struct spl_load_info load;
int ret;
blk_desc = blk_get_devnum_by_uclass_id(uclass_id, devnum);
}
blk_show_device(uclass_id, devnum);
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ dev.filename = filename;
dev.ifname = blk_get_uclass_name(uclass_id);
snprintf(dev.dev_part_str, sizeof(dev.dev_part_str) - 1, "%x:%x",
devnum, partnum);
if (ret) {
printf("spl: unable to set blk_dev %s %s. Err - %d\n",
dev.ifname, dev.dev_part_str, ret);
- goto out;
- }
-
- ret = fs_read(filename, virt_to_phys(header), 0,
- sizeof(struct legacy_img_hdr), &actlen);
- if (ret) {
- printf("spl: unable to read file %s. Err - %d\n", filename,
- ret);
- goto out;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.read = spl_fit_read;
- load.bl_len = 1;
- load.filename = (void *)filename;
- load.priv = &dev;
-
- return spl_load_simple_fit(spl_image, &load, 0, header);
- }
-
- ret = spl_parse_image_header(spl_image, bootdev, header);
- if (ret) {
- printf("spl: unable to parse image header. Err - %d\n",
- ret);
- goto out;
- }
-
- ret = fs_set_blk_dev(dev.ifname, dev.dev_part_str, FS_TYPE_ANY);
- if (ret) {
- printf("spl: unable to set blk_dev %s %s. Err - %d\n",
- dev.ifname, dev.dev_part_str, ret);
- goto out;
+ return ret;
}
ret = fs_size(filename, &filesize);
if (ret) {
printf("spl: unable to get file size: %s. Err - %d\n",
filename, ret);
- goto out;
- }
-
- ret = fs_set_blk_dev(dev.ifname, dev.dev_part_str, FS_TYPE_ANY);
- if (ret) {
- printf("spl: unable to set blk_dev %s %s. Err - %d\n",
- dev.ifname, dev.dev_part_str, ret);
- goto out;
+ return ret;
}
- ret = fs_read(filename, (ulong)spl_image->load_addr, 0, filesize,
- &actlen);
- if (ret)
- printf("spl: unable to read file %s. Err - %d\n",
- filename, ret);
-out:
- return ret;
+ load.read = spl_fit_read;
+ if (IS_ENABLED(CONFIG_SPL_FS_FAT_DMA_ALIGN))
+ spl_set_bl_len(&load, ARCH_DMA_MINALIGN);
+ else
+ spl_set_bl_len(&load, 1);
+ load.priv = &dev;
+ return spl_load(spl_image, bootdev, &load, filesize, 0);
}
#include <common.h>
#include <env.h>
-#include <mapmem.h>
#include <part.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/u-boot.h>
#include <ext4fs.h>
#include <errno.h>
#include <image.h>
+static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
+ ulong size, void *buf)
+{
+ int ret;
+ loff_t actlen;
+
+ ret = ext4fs_read(buf, file_offset, size, &actlen);
+ if (ret)
+ return ret;
+ return actlen;
+}
+
int spl_load_image_ext(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct blk_desc *block_dev, int partition,
const char *filename)
{
s32 err;
- struct legacy_img_hdr *header;
- loff_t filelen, actlen;
+ loff_t filelen;
struct disk_partition part_info = {};
-
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ struct spl_load_info load;
if (part_get_info(block_dev, partition, &part_info)) {
printf("spl: no partition table found\n");
ext4fs_set_blk_dev(block_dev, &part_info);
- err = ext4fs_mount(part_info.size);
+ err = ext4fs_mount();
if (!err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("%s: ext4fs mount err - %d\n", __func__, err);
puts("spl: ext4fs_open failed\n");
goto end;
}
- err = ext4fs_read((char *)header, 0, sizeof(struct legacy_img_hdr), &actlen);
- if (err < 0) {
- puts("spl: ext4fs_read failed\n");
- goto end;
- }
-
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err < 0) {
- puts("spl: ext: failed to parse image header\n");
- goto end;
- }
- err = ext4fs_read(map_sysmem(spl_image->load_addr, filelen), 0, filelen,
- &actlen);
+ spl_set_bl_len(&load, 1);
+ load.read = spl_fit_read;
+ err = spl_load(spl_image, bootdev, &load, filelen, 0);
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
ext4fs_set_blk_dev(block_dev, &part_info);
- err = ext4fs_mount(part_info.size);
+ err = ext4fs_mount();
if (!err) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
printf("%s: ext4fs mount err - %d\n", __func__, err);
#include <common.h>
#include <env.h>
#include <log.h>
-#include <mapmem.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/u-boot.h>
#include <fat.h>
#include <errno.h>
{
loff_t actread;
int ret;
- char *filename = (char *)load->filename;
+ char *filename = load->priv;
ret = fat_read_file(filename, buf, file_offset, size, &actread);
if (ret)
const char *filename)
{
int err;
- struct legacy_img_hdr *header;
+ loff_t size;
+ struct spl_load_info load;
err = spl_register_fat_device(block_dev, partition);
if (err)
goto end;
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
-
- err = file_fat_read(filename, header, sizeof(struct legacy_img_hdr));
- if (err <= 0)
- goto end;
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
- image_get_magic(header) == FDT_MAGIC) {
- err = file_fat_read(filename,
- map_sysmem(CONFIG_SYS_LOAD_ADDR, 0), 0);
- if (err <= 0)
- goto end;
- err = spl_parse_image_header(spl_image, bootdev,
- map_sysmem(CONFIG_SYS_LOAD_ADDR,
- err));
- if (err == -EAGAIN)
- return err;
- if (err == 0)
- err = 1;
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.read = spl_fit_read;
- load.bl_len = 1;
- load.filename = (void *)filename;
- load.priv = NULL;
-
- return spl_load_simple_fit(spl_image, &load, 0, header);
- } else {
- err = spl_parse_image_header(spl_image, bootdev, header);
+ /*
+ * Avoid pulling in this function for other image types since we are
+ * very short on space on some boards.
+ */
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)) {
+ err = fat_size(filename, &size);
if (err)
goto end;
-
- err = file_fat_read(filename, map_sysmem(spl_image->load_addr,
- spl_image->size), 0);
+ } else {
+ size = 0;
}
+ load.read = spl_fit_read;
+ if (IS_ENABLED(CONFIG_SPL_FS_FAT_DMA_ALIGN))
+ spl_set_bl_len(&load, ARCH_DMA_MINALIGN);
+ else
+ spl_set_bl_len(&load, 1);
+ load.priv = (void *)filename;
+ err = spl_load(spl_image, bootdev, &load, size, 0);
+
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
- if (err <= 0)
+ if (err < 0)
printf("%s: error reading image %s, err - %d\n",
__func__, filename, err);
#endif
- return (err <= 0);
+ return err;
}
#if CONFIG_IS_ENABLED(OS_BOOT)
#include <mapmem.h>
#include <spl.h>
#include <sysinfo.h>
-#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/libfdt.h>
static int get_aligned_image_offset(struct spl_load_info *info, int offset)
{
- /*
- * If it is a FS read, get the first address before offset which is
- * aligned to ARCH_DMA_MINALIGN. If it is raw read return the
- * block number to which offset belongs.
- */
- if (info->filename)
- return offset & ~(ARCH_DMA_MINALIGN - 1);
-
- return offset / info->bl_len;
+ return ALIGN_DOWN(offset, spl_get_bl_len(info));
}
static int get_aligned_image_overhead(struct spl_load_info *info, int offset)
{
- /*
- * If it is a FS read, get the difference between the offset and
- * the first address before offset which is aligned to
- * ARCH_DMA_MINALIGN. If it is raw read return the offset within the
- * block.
- */
- if (info->filename)
- return offset & (ARCH_DMA_MINALIGN - 1);
-
- return offset % info->bl_len;
+ return offset & (spl_get_bl_len(info) - 1);
}
static int get_aligned_image_size(struct spl_load_info *info, int data_size,
{
data_size = data_size + get_aligned_image_overhead(info, offset);
- if (info->filename)
- return data_size;
-
- return (data_size + info->bl_len - 1) / info->bl_len;
+ return ALIGN(data_size, spl_get_bl_len(info));
}
/**
*
* Return: 0 on success or a negative error number.
*/
-static int load_simple_fit(struct spl_load_info *info, ulong sector,
+static int load_simple_fit(struct spl_load_info *info, ulong fit_offset,
const struct spl_fit_info *ctx, int node,
struct spl_image_info *image_info)
{
void *load_ptr;
void *src;
ulong overhead;
- int nr_sectors;
uint8_t image_comp = -1, type = -1;
const void *data;
const void *fit = ctx->fit;
length = len;
overhead = get_aligned_image_overhead(info, offset);
- nr_sectors = get_aligned_image_size(info, length, offset);
+ size = get_aligned_image_size(info, length, offset);
if (info->read(info,
- sector + get_aligned_image_offset(info, offset),
- nr_sectors, src_ptr) != nr_sectors)
+ fit_offset +
+ get_aligned_image_offset(info, offset), size,
+ src_ptr) < length)
return -EIO;
debug("External data: dst=%p, offset=%x, size=%lx\n",
}
static int spl_fit_append_fdt(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector,
+ struct spl_load_info *info, ulong offset,
const struct spl_fit_info *ctx)
{
struct spl_image_info image_info;
spl_image->fdt_addr = map_sysmem(image_info.load_addr, size);
memcpy(spl_image->fdt_addr, gd->fdt_blob, size);
} else {
- ret = load_simple_fit(info, sector, ctx, node, &image_info);
+ ret = load_simple_fit(info, offset, ctx, node, &image_info);
if (ret < 0)
return ret;
__func__);
}
image_info.load_addr = (ulong)tmpbuffer;
- ret = load_simple_fit(info, sector, ctx, node,
+ ret = load_simple_fit(info, offset, ctx, node,
&image_info);
if (ret < 0)
break;
}
static int spl_fit_load_fpga(struct spl_fit_info *ctx,
- struct spl_load_info *info, ulong sector)
+ struct spl_load_info *info, ulong offset)
{
int node, ret;
warn_deprecated("'fpga' property in config node. Use 'loadables'");
/* Load the image and set up the fpga_image structure */
- ret = load_simple_fit(info, sector, ctx, node, &fpga_image);
+ ret = load_simple_fit(info, offset, ctx, node, &fpga_image);
if (ret) {
printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
return ret;
}
static int spl_simple_fit_read(struct spl_fit_info *ctx,
- struct spl_load_info *info, ulong sector,
+ struct spl_load_info *info, ulong offset,
const void *fit_header)
{
unsigned long count, size;
- int sectors;
void *buf;
/*
* For FIT with data embedded, data is loaded as part of FIT image.
* For FIT with external data, data is not loaded in this step.
*/
- sectors = get_aligned_image_size(info, size, 0);
- buf = board_spl_fit_buffer_addr(size, sectors, info->bl_len);
+ size = get_aligned_image_size(info, size, 0);
+ buf = board_spl_fit_buffer_addr(size, size, 1);
- count = info->read(info, sector, sectors, buf);
+ count = info->read(info, offset, size, buf);
ctx->fit = buf;
- debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
- sector, sectors, buf, count, size);
+ debug("fit read offset %lx, size=%lu, dst=%p, count=%lu\n",
+ offset, size, buf, count);
return (count == 0) ? -EIO : 0;
}
}
int spl_load_simple_fit(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector, void *fit)
+ struct spl_load_info *info, ulong offset, void *fit)
{
struct spl_image_info image_info;
struct spl_fit_info ctx;
int index = 0;
int firmware_node;
- ret = spl_simple_fit_read(&ctx, info, sector, fit);
+ ret = spl_simple_fit_read(&ctx, info, offset, fit);
if (ret < 0)
return ret;
return ret;
if (IS_ENABLED(CONFIG_SPL_FPGA))
- spl_fit_load_fpga(&ctx, info, sector);
+ spl_fit_load_fpga(&ctx, info, offset);
/*
* Find the U-Boot image using the following search order:
}
/* Load the image and set up the spl_image structure */
- ret = load_simple_fit(info, sector, &ctx, node, spl_image);
+ ret = load_simple_fit(info, offset, &ctx, node, spl_image);
if (ret)
return ret;
* We allow this to fail, as the U-Boot image might embed its FDT.
*/
if (os_takes_devicetree(spl_image->os)) {
- ret = spl_fit_append_fdt(spl_image, info, sector, &ctx);
+ ret = spl_fit_append_fdt(spl_image, info, offset, &ctx);
if (ret < 0 && spl_image->os != IH_OS_U_BOOT)
return ret;
}
continue;
image_info.load_addr = 0;
- ret = load_simple_fit(info, sector, &ctx, node, &image_info);
+ ret = load_simple_fit(info, offset, &ctx, node, &image_info);
if (ret < 0) {
printf("%s: can't load image loadables index %d (ret = %d)\n",
__func__, index, ret);
debug("Loadable is %s\n", genimg_get_os_name(os_type));
if (os_takes_devicetree(os_type)) {
- spl_fit_append_fdt(&image_info, info, sector, &ctx);
+ spl_fit_append_fdt(&image_info, info, offset, &ctx);
spl_image->fdt_addr = image_info.fdt_addr;
}
struct spl_load_info *info,
struct container_hdr *container,
int image_index,
- u32 container_sector)
+ ulong container_offset)
{
struct boot_img_t *images;
- ulong sector;
- u32 sectors;
+ ulong offset, overhead, size;
if (image_index > container->num_images) {
debug("Invalid image number\n");
images = (struct boot_img_t *)((u8 *)container +
sizeof(struct container_hdr));
- if (images[image_index].offset % info->bl_len) {
+ if (!IS_ALIGNED(images[image_index].offset, spl_get_bl_len(info))) {
printf("%s: image%d offset not aligned to %u\n",
- __func__, image_index, info->bl_len);
+ __func__, image_index, spl_get_bl_len(info));
return NULL;
}
- sectors = roundup(images[image_index].size, info->bl_len) /
- info->bl_len;
- sector = images[image_index].offset / info->bl_len +
- container_sector;
+ size = ALIGN(images[image_index].size, spl_get_bl_len(info));
+ offset = images[image_index].offset + container_offset;
- debug("%s: container: %p sector: %lu sectors: %u\n", __func__,
- container, sector, sectors);
- if (info->read(info, sector, sectors,
- map_sysmem(images[image_index].dst,
- images[image_index].size)) != sectors) {
+ debug("%s: container: %p offset: %lu size: %lu\n", __func__,
+ container, offset, size);
+ if (info->read(info, offset, size,
+ map_sysmem(images[image_index].dst - overhead,
+ images[image_index].size)) <
+ images[image_index].size) {
printf("%s wrong\n", __func__);
return NULL;
}
}
static int read_auth_container(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector)
+ struct spl_load_info *info, ulong offset)
{
struct container_hdr *container = NULL;
u16 length;
- u32 sectors;
int i, size, ret = 0;
- size = roundup(CONTAINER_HDR_ALIGNMENT, info->bl_len);
- sectors = size / info->bl_len;
+ size = ALIGN(CONTAINER_HDR_ALIGNMENT, spl_get_bl_len(info));
/*
* It will not override the ATF code, so safe to use it here,
if (!container)
return -ENOMEM;
- debug("%s: container: %p sector: %lu sectors: %u\n", __func__,
- container, sector, sectors);
- if (info->read(info, sector, sectors, container) != sectors) {
+ debug("%s: container: %p offset: %lu size: %u\n", __func__,
+ container, offset, size);
+ if (info->read(info, offset, size, container) <
+ CONTAINER_HDR_ALIGNMENT) {
ret = -EIO;
goto end;
}
debug("Container length %u\n", length);
if (length > CONTAINER_HDR_ALIGNMENT) {
- size = roundup(length, info->bl_len);
- sectors = size / info->bl_len;
+ size = ALIGN(length, spl_get_bl_len(info));
free(container);
container = malloc(size);
if (!container)
return -ENOMEM;
- debug("%s: container: %p sector: %lu sectors: %u\n",
- __func__, container, sector, sectors);
- if (info->read(info, sector, sectors, container) !=
- sectors) {
+ debug("%s: container: %p offset: %lu size: %u\n",
+ __func__, container, offset, size);
+ if (info->read(info, offset, size, container) < length) {
ret = -EIO;
goto end;
}
for (i = 0; i < container->num_images; i++) {
struct boot_img_t *image = read_auth_image(spl_image, info,
container, i,
- sector);
+ offset);
if (!image) {
ret = -EINVAL;
}
int spl_load_imx_container(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector)
+ struct spl_load_info *info, ulong offset)
{
- return read_auth_container(spl_image, info, sector);
+ return read_auth_container(spl_image, info, offset);
}
return 0;
}
-/*
- * This function is added explicitly to avoid code size increase, when
- * no compression method is enabled. The compiler will optimize the
- * following switch/case statement in spl_load_legacy_img() away due to
- * Dead Code Elimination.
- */
-static inline int spl_image_get_comp(const struct legacy_img_hdr *hdr)
-{
- if (IS_ENABLED(CONFIG_SPL_LZMA))
- return image_get_comp(hdr);
-
- return IH_COMP_NONE;
-}
-
-int spl_load_legacy_img(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct spl_load_info *load, ulong offset,
- struct legacy_img_hdr *hdr)
+int spl_load_legacy_lzma(struct spl_image_info *spl_image,
+ struct spl_load_info *load, ulong offset)
{
- __maybe_unused SizeT lzma_len;
- __maybe_unused void *src;
- ulong dataptr;
+ SizeT lzma_len = LZMA_LEN;
+ void *src;
+ ulong dataptr, overhead, size;
int ret;
- /*
- * If the payload is compressed, the decompressed data should be
- * directly write to its load address.
- */
- if (spl_image_get_comp(hdr) != IH_COMP_NONE)
- spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
+ /* dataptr points to compressed payload */
+ dataptr = ALIGN_DOWN(sizeof(struct legacy_img_hdr),
+ spl_get_bl_len(load));
+ overhead = sizeof(struct legacy_img_hdr) - dataptr;
+ size = ALIGN(spl_image->size + overhead, spl_get_bl_len(load));
+ dataptr += offset;
+
+ debug("LZMA: Decompressing %08lx to %08lx\n",
+ dataptr, spl_image->load_addr);
+ src = malloc(size);
+ if (!src) {
+ printf("Unable to allocate %d bytes for LZMA\n",
+ spl_image->size);
+ return -ENOMEM;
+ }
- ret = spl_parse_image_header(spl_image, bootdev, hdr);
- if (ret)
+ load->read(load, dataptr, size, src);
+ ret = lzmaBuffToBuffDecompress(map_sysmem(spl_image->load_addr,
+ spl_image->size), &lzma_len,
+ src + overhead, spl_image->size);
+ if (ret) {
+ printf("LZMA decompression error: %d\n", ret);
return ret;
-
- /* Read image */
- switch (spl_image_get_comp(hdr)) {
- case IH_COMP_NONE:
- dataptr = offset;
-
- /*
- * Image header will be skipped only if SPL_COPY_PAYLOAD_ONLY
- * is set
- */
- if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY)
- dataptr += sizeof(*hdr);
-
- load->read(load, dataptr, spl_image->size,
- map_sysmem(spl_image->load_addr, spl_image->size));
- break;
-
- case IH_COMP_LZMA:
- lzma_len = LZMA_LEN;
-
- /* dataptr points to compressed payload */
- dataptr = offset + sizeof(*hdr);
-
- debug("LZMA: Decompressing %08lx to %08lx\n",
- dataptr, spl_image->load_addr);
- src = malloc(spl_image->size);
- if (!src) {
- printf("Unable to allocate %d bytes for LZMA\n",
- spl_image->size);
- return -ENOMEM;
- }
-
- load->read(load, dataptr, spl_image->size, src);
- ret = lzmaBuffToBuffDecompress(map_sysmem(spl_image->load_addr,
- spl_image->size),
- &lzma_len, src, spl_image->size);
- if (ret) {
- printf("LZMA decompression error: %d\n", ret);
- return ret;
- }
-
- spl_image->size = lzma_len;
- break;
-
- default:
- debug("Compression method %s is not supported\n",
- genimg_get_comp_short_name(image_get_comp(hdr)));
- return -EINVAL;
}
+ spl_image->size = lzma_len;
return 0;
}
#include <common.h>
#include <dm.h>
#include <log.h>
-#include <mapmem.h>
#include <part.h>
#include <spl.h>
+#include <spl_load.h>
#include <linux/compiler.h>
#include <errno.h>
#include <asm/u-boot.h>
#include <image.h>
#include <imx_container.h>
-static int mmc_load_legacy(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct mmc *mmc,
- ulong sector, struct legacy_img_hdr *header)
+static ulong h_spl_load_read(struct spl_load_info *load, ulong off,
+ ulong size, void *buf)
{
- u32 image_offset_sectors;
- u32 image_size_sectors;
- unsigned long count;
- u32 image_offset;
- int ret;
-
- ret = spl_parse_image_header(spl_image, bootdev, header);
- if (ret)
- return ret;
-
- /* convert offset to sectors - round down */
- image_offset_sectors = spl_image->offset / mmc->read_bl_len;
- /* calculate remaining offset */
- image_offset = spl_image->offset % mmc->read_bl_len;
+ struct blk_desc *bd = load->priv;
+ lbaint_t sector = off >> bd->log2blksz;
+ lbaint_t count = size >> bd->log2blksz;
- /* convert size to sectors - round up */
- image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
- mmc->read_bl_len;
-
- /* Read the header too to avoid extra memcpy */
- count = blk_dread(mmc_get_blk_desc(mmc),
- sector + image_offset_sectors,
- image_size_sectors,
- map_sysmem(spl_image->load_addr,
- image_size_sectors * mmc->read_bl_len));
- debug("read %x sectors to %lx\n", image_size_sectors,
- spl_image->load_addr);
- if (count != image_size_sectors)
- return -EIO;
-
- if (image_offset)
- memmove((void *)(ulong)spl_image->load_addr,
- (void *)(ulong)spl_image->load_addr + image_offset,
- spl_image->size);
-
- return 0;
-}
-
-static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
- ulong count, void *buf)
-{
- struct mmc *mmc = load->dev;
-
- return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
+ return blk_dread(bd, sector, count, buf) << bd->log2blksz;
}
static __maybe_unused unsigned long spl_mmc_raw_uboot_offset(int part)
struct spl_boot_device *bootdev,
struct mmc *mmc, unsigned long sector)
{
- unsigned long count;
- struct legacy_img_hdr *header;
+ int ret;
struct blk_desc *bd = mmc_get_blk_desc(mmc);
- int ret = 0;
-
- header = spl_get_load_buffer(-sizeof(*header), bd->blksz);
-
- /* read image header to find the image size & load address */
- count = blk_dread(bd, sector, 1, header);
- debug("hdr read sector %lx, count=%lu\n", sector, count);
- if (count == 0) {
- ret = -EIO;
- goto end;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = mmc;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = mmc->read_bl_len;
- load.read = h_spl_load_read;
- ret = spl_load_simple_fit(spl_image, &load, sector, header);
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- struct spl_load_info load;
-
- load.dev = mmc;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = mmc->read_bl_len;
- load.read = h_spl_load_read;
-
- ret = spl_load_imx_container(spl_image, &load, sector);
- } else {
- ret = mmc_load_legacy(spl_image, bootdev, mmc, sector, header);
- }
+ struct spl_load_info load;
-end:
+ load.priv = bd;
+ spl_set_bl_len(&load, bd->blksz);
+ load.read = h_spl_load_read;
+ ret = spl_load(spl_image, bootdev, &load, 0, sector << bd->log2blksz);
if (ret) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
puts("mmc_load_image_raw_sector: mmc block read error\n");
#include <imx_container.h>
#include <log.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/io.h>
+#include <mapmem.h>
#include <nand.h>
#include <linux/libfdt_env.h>
#include <fdt.h>
nand_spl_load_image(spl_nand_get_uboot_raw_page(),
CFG_SYS_NAND_U_BOOT_SIZE,
- (void *)CFG_SYS_NAND_U_BOOT_DST);
+ map_sysmem(CFG_SYS_NAND_U_BOOT_DST,
+ CFG_SYS_NAND_U_BOOT_SIZE));
spl_set_header_raw_uboot(spl_image);
nand_deselect();
}
#else
-static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,
- ulong size, void *dst)
+__weak u32 nand_spl_adjust_offset(u32 sector, u32 offs)
{
- int err;
- ulong sector;
-
- sector = *(int *)load->priv;
- offs *= load->bl_len;
- size *= load->bl_len;
- offs = sector + nand_spl_adjust_offset(sector, offs - sector);
- err = nand_spl_load_image(offs, size, dst);
- if (err)
- return 0;
-
- return size / load->bl_len;
+ return offs;
}
-static ulong spl_nand_legacy_read(struct spl_load_info *load, ulong offs,
- ulong size, void *dst)
+static ulong spl_nand_read(struct spl_load_info *load, ulong offs, ulong size,
+ void *dst)
{
int err;
+ ulong sector;
debug("%s: offs %lx, size %lx, dst %p\n",
__func__, offs, size, dst);
+ sector = *(int *)load->priv;
+ offs = sector + nand_spl_adjust_offset(sector, offs - sector);
err = nand_spl_load_image(offs, size, dst);
+ spl_set_bl_len(load, nand_page_size());
if (err)
return 0;
return size;
}
-struct mtd_info * __weak nand_get_mtd(void)
-{
- return NULL;
-}
-
static int spl_nand_load_element(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- int offset, struct legacy_img_hdr *header)
+ struct spl_boot_device *bootdev, int offset)
{
- struct mtd_info *mtd = nand_get_mtd();
- int bl_len = mtd ? mtd->writesize : 1;
- int err;
+ struct spl_load_info load;
- err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
- if (err)
- return err;
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = NULL;
- load.priv = &offset;
- load.filename = NULL;
- load.bl_len = bl_len;
- load.read = spl_nand_fit_read;
- return spl_load_simple_fit(spl_image, &load, offset / bl_len, header);
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- struct spl_load_info load;
-
- load.dev = NULL;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = bl_len;
- load.read = spl_nand_fit_read;
- return spl_load_imx_container(spl_image, &load, offset / bl_len);
- } else if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_FORMAT) &&
- image_get_magic(header) == IH_MAGIC) {
- struct spl_load_info load;
-
- debug("Found legacy image\n");
- load.dev = NULL;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_nand_legacy_read;
-
- return spl_load_legacy_img(spl_image, bootdev, &load, offset, header);
- } else {
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err)
- return err;
- return nand_spl_load_image(offset, spl_image->size,
- (void *)(ulong)spl_image->load_addr);
- }
+ load.priv = &offset;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_nand_read;
+ return spl_load(spl_image, bootdev, &load, 0, offset);
}
static int spl_nand_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
int err;
- struct legacy_img_hdr *header;
- int *src __attribute__((unused));
- int *dst __attribute__((unused));
#ifdef CONFIG_SPL_NAND_SOFTECC
debug("spl: nand - using sw ecc\n");
#endif
nand_init();
- header = spl_get_load_buffer(0, sizeof(*header));
-
#if CONFIG_IS_ENABLED(OS_BOOT)
if (!spl_start_uboot()) {
+ int *src, *dst;
+ struct legacy_img_hdr *header =
+ spl_get_load_buffer(0, sizeof(*header));
+
/*
* load parameter image
* load to temp position since nand_spl_load_image reads
}
#endif
#ifdef CONFIG_NAND_ENV_DST
- spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET, header);
+ spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET);
#ifdef CONFIG_ENV_OFFSET_REDUND
- spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET_REDUND, header);
+ spl_nand_load_element(spl_image, bootdev, CONFIG_ENV_OFFSET_REDUND);
#endif
#endif
/* Load u-boot */
- err = spl_nand_load_element(spl_image, bootdev, spl_nand_get_uboot_raw_page(),
- header);
+ err = spl_nand_load_element(spl_image, bootdev, spl_nand_get_uboot_raw_page());
#ifdef CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
#if CONFIG_SYS_NAND_U_BOOT_OFFS != CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
if (err)
err = spl_nand_load_element(spl_image, bootdev,
- CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND,
- header);
+ CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND);
#endif
#endif
nand_deselect();
#include <errno.h>
#include <image.h>
#include <log.h>
-#include <mapmem.h>
#include <spl.h>
+#include <spl_load.h>
#include <net.h>
#include <linux/libfdt.h>
static int spl_net_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
- struct legacy_img_hdr *header = map_sysmem(image_load_addr,
- sizeof(*header));
+ struct spl_load_info load;
int rv;
env_init();
return rv;
}
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.bl_len = 1;
- load.read = spl_net_load_read;
- rv = spl_load_simple_fit(spl_image, &load, 0, header);
- } else {
- debug("Legacy image\n");
-
- rv = spl_parse_image_header(spl_image, bootdev, header);
- if (rv)
- return rv;
-
- memcpy(map_sysmem(spl_image->load_addr, spl_image->size),
- map_sysmem(image_load_addr, spl_image->size),
- spl_image->size);
- }
-
- return rv;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_net_load_read;
+ return spl_load(spl_image, bootdev, &load, 0, 0);
}
#endif
#include <image.h>
#include <imx_container.h>
#include <log.h>
-#include <mapmem.h>
#include <spl.h>
+#include <spl_load.h>
static ulong spl_nor_load_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
static int spl_nor_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
- struct legacy_img_hdr *header;
- __maybe_unused struct spl_load_info load;
+ struct spl_load_info load;
/*
* Loading of the payload to SDRAM is done with skipping of
* Load Linux from its location in NOR flash to its defined
* location in SDRAM
*/
- header = (void *)CONFIG_SYS_OS_BASE;
+ const struct legacy_img_hdr *header =
+ (const struct legacy_img_hdr *)CONFIG_SYS_OS_BASE;
#ifdef CONFIG_SPL_LOAD_FIT
if (image_get_magic(header) == FDT_MAGIC) {
int ret;
debug("Found FIT\n");
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_nor_load_read;
ret = spl_load_simple_fit(spl_image, &load,
* Load real U-Boot from its location in NOR flash to its
* defined location in SDRAM
*/
- header = map_sysmem(spl_nor_get_uboot_base(), sizeof(*header));
-#ifdef CONFIG_SPL_LOAD_FIT
- if (image_get_magic(header) == FDT_MAGIC) {
- debug("Found FIT format U-Boot\n");
- load.bl_len = 1;
- load.read = spl_nor_load_read;
- return spl_load_simple_fit(spl_image, &load,
- spl_nor_get_uboot_base(),
- (void *)header);
- }
-#endif
- if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- load.bl_len = 1;
- load.read = spl_nor_load_read;
- return spl_load_imx_container(spl_image, &load,
- spl_nor_get_uboot_base());
- }
-
- /* Legacy image handling */
- if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_FORMAT)) {
- load.bl_len = 1;
- load.read = spl_nor_load_read;
- return spl_load_legacy_img(spl_image, bootdev, &load,
- spl_nor_get_uboot_base(),
- header);
- }
-
- return -EINVAL;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_nor_load_read;
+ return spl_load(spl_image, bootdev, &load, 0, spl_nor_get_uboot_base());
}
SPL_LOAD_IMAGE_METHOD("NOR", 0, BOOT_DEVICE_NOR, spl_nor_load_image);
struct spl_load_info load;
debug("Found FIT\n");
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
load.read = spl_ram_load_read;
ret = spl_load_simple_fit(spl_image, &load, 0, header);
} else {
#include <log.h>
#include <semihosting.h>
#include <spl.h>
-
-static int smh_read_full(long fd, void *memp, size_t len)
-{
- long read;
-
- read = smh_read(fd, memp, len);
- if (read < 0)
- return read;
- if (read != len)
- return -EIO;
- return 0;
-}
+#include <spl_load.h>
static ulong smh_fit_read(struct spl_load_info *load, ulong file_offset,
ulong size, void *buf)
{
- long fd;
+ long fd = *(long *)load->priv;
ulong ret;
- fd = smh_open(load->filename, MODE_READ | MODE_BINARY);
- if (fd < 0) {
- log_debug("could not open %s: %ld\n", load->filename, fd);
+ if (smh_seek(fd, file_offset))
return 0;
- }
- ret = smh_read(fd, buf, size);
- smh_close(fd);
- return ret;
+ ret = smh_read(fd, buf, size);
+ return ret < 0 ? 0 : ret;
}
static int spl_smh_load_image(struct spl_image_info *spl_image,
const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
int ret;
long fd, len;
- struct legacy_img_hdr *header =
- spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ struct spl_load_info load;
fd = smh_open(filename, MODE_READ | MODE_BINARY);
if (fd < 0) {
}
len = ret;
- ret = smh_read_full(fd, header, sizeof(struct legacy_img_hdr));
- if (ret) {
- log_debug("could not read image header: %d\n", ret);
- goto out;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.read = smh_fit_read;
- load.bl_len = 1;
- load.filename = filename;
- load.priv = NULL;
- smh_close(fd);
-
- return spl_load_simple_fit(spl_image, &load, 0, header);
- }
-
- ret = spl_parse_image_header(spl_image, bootdev, header);
- if (ret) {
- log_debug("failed to parse image header: %d\n", ret);
- goto out;
- }
-
- ret = smh_seek(fd, 0);
- if (ret) {
- log_debug("could not seek to start of image: %d\n", ret);
- goto out;
- }
-
- ret = smh_read_full(fd, (void *)spl_image->load_addr, len);
+ load.read = smh_fit_read;
+ spl_set_bl_len(&load, 1);
+ load.priv = &fd;
+ ret = spl_load(spl_image, bootdev, &load, len, 0);
if (ret)
log_debug("could not read %s: %d\n", filename, ret);
out:
#include <image.h>
#include <imx_container.h>
#include <log.h>
-#include <mapmem.h>
#include <spi.h>
#include <spi_flash.h>
#include <errno.h>
#include <spl.h>
+#include <spl_load.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm/ofnode.h>
-#if CONFIG_IS_ENABLED(OS_BOOT)
-/*
- * Load the kernel, check for a valid header we can parse, and if found load
- * the kernel and then device tree.
- */
-static int spi_load_image_os(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct spi_flash *flash,
- struct legacy_img_hdr *header)
-{
- int err;
-
- /* Read for a header, parse or error out. */
- spi_flash_read(flash, CFG_SYS_SPI_KERNEL_OFFS, sizeof(*header),
- (void *)header);
-
- if (image_get_magic(header) != IH_MAGIC)
- return -1;
-
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err)
- return err;
-
- spi_flash_read(flash, CFG_SYS_SPI_KERNEL_OFFS,
- spl_image->size, (void *)spl_image->load_addr);
-
- /* Read device tree. */
- spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS,
- CFG_SYS_SPI_ARGS_SIZE,
- (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
-
- return 0;
-}
-#endif
-
static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
{
- struct spi_flash *flash = load->dev;
+ struct spi_flash *flash = load->priv;
ulong ret;
ret = spi_flash_read(flash, sector, count, buf);
int err = 0;
unsigned int payload_offs;
struct spi_flash *flash;
- struct legacy_img_hdr *header;
unsigned int sf_bus = spl_spi_boot_bus();
unsigned int sf_cs = spl_spi_boot_cs();
+ struct spl_load_info load;
/*
* Load U-Boot image from SPI flash into RAM
return -ENODEV;
}
- payload_offs = spl_spi_get_uboot_offs(flash);
+ load.priv = flash;
+ spl_set_bl_len(&load, 1);
+ load.read = spl_spi_fit_read;
- header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+#if CONFIG_IS_ENABLED(OS_BOOT)
+ if (spl_start_uboot()) {
+ int err = spl_load(spl_image, bootdev, &load, 0,
+ CFG_SYS_SPI_KERNEL_OFFS);
+
+ if (!err)
+ /* Read device tree. */
+ return spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS,
+ CFG_SYS_SPI_ARGS_SIZE,
+ (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR);
+ }
+#endif
+ payload_offs = spl_spi_get_uboot_offs(flash);
if (CONFIG_IS_ENABLED(OF_REAL)) {
payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
payload_offs);
}
-#if CONFIG_IS_ENABLED(OS_BOOT)
- if (spl_start_uboot() || spi_load_image_os(spl_image, bootdev, flash, header))
-#endif
- {
- /* Load u-boot, mkimage header is 64 bytes. */
- err = spi_flash_read(flash, payload_offs, sizeof(*header),
- (void *)header);
- if (err) {
- debug("%s: Failed to read from SPI flash (err=%d)\n",
- __func__, err);
- return err;
- }
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
- image_get_magic(header) == FDT_MAGIC) {
- u32 size = roundup(fdt_totalsize(header), 4);
-
- err = spi_flash_read(flash, payload_offs,
- size,
- map_sysmem(CONFIG_SYS_LOAD_ADDR,
- size));
- if (err)
- return err;
- err = spl_parse_image_header(spl_image, bootdev,
- phys_to_virt(CONFIG_SYS_LOAD_ADDR));
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
- image_get_magic(header) == FDT_MAGIC) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = flash;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_spi_fit_read;
- err = spl_load_simple_fit(spl_image, &load,
- payload_offs,
- header);
- } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
- valid_container_hdr((void *)header)) {
- struct spl_load_info load;
-
- load.dev = flash;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_spi_fit_read;
-
- err = spl_load_imx_container(spl_image, &load,
- payload_offs);
- } else {
- err = spl_parse_image_header(spl_image, bootdev, header);
- if (err)
- return err;
- err = spi_flash_read(flash, payload_offs + spl_image->offset,
- spl_image->size,
- map_sysmem(spl_image->load_addr,
- spl_image->size));
- }
- if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET)) {
- err = spi_nor_remove(flash);
- if (err)
- return err;
- }
- }
-
+ err = spl_load(spl_image, bootdev, &load, 0, payload_offs);
+ if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET))
+ err = spi_nor_remove(flash);
return err;
}
/* Use priorty 1 so that boards can override this */
struct ymodem_fit_info info;
debug("Found FIT\n");
- load.dev = NULL;
load.priv = (void *)&info;
- load.filename = NULL;
- load.bl_len = 1;
+ spl_set_bl_len(&load, 1);
info.buf = buf;
info.image_read = BUF_SIZE;
load.read = ymodem_read_fit;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2000-2009
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ */
+
+#include <timestamp.h>
+#include <version.h>
+#include <version_string.h>
+
+#define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \
+ U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING
+
+const char version_string[] = U_BOOT_VERSION_STRING;
+const unsigned short version_num = U_BOOT_VERSION_NUM;
+const unsigned char version_num_patch = U_BOOT_VERSION_NUM_PATCH;
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_ETH=y
# CONFIG_SPL_FS_EXT4 is not set
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_MUSB_NEW=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
# CONFIG_OF_LIBFDT_OVERLAY is not set
# CONFIG_SPL_MMC is not set
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_TIMESTAMP=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FIT_IMAGE_TINY=y
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
# CONFIG_SPL_ENV_SUPPORT is not set
# CONFIG_SPL_FS_EXT4 is not set
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_FIT_IMAGE_TINY=y
# CONFIG_SPL_ENV_SUPPORT is not set
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_ETH=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_ETH=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_DMA=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SIZE_LIMIT=0x7ec00
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
-CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_LPC32XX_SLC=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
# CONFIG_SYS_NAND_5_ADDR_CYCLE is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_WDT=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_TIMER=y
CONFIG_CMD_HASH=y
CONFIG_CMD_EXT4=y
CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x80
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_BSS_START_ADDR=0x84100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_DMA=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_NAND_IDENT=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_NAND_MXC=y
CONFIG_MXC_NAND_HWECC=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_SPL_FS_EXT4 is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_I2C is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x20000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_TEXT_BASE=0
+CONFIG_SYS_MALLOC_LEN=0x6000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
CONFIG_CMD_LOADM=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SANDBOX=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_NAND_SANDBOX=y
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x200
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_BOOTDEV_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_TEXT_BASE=0
+CONFIG_SYS_MALLOC_LEN=0x6000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_MEASURED_BOOT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_LOADM=y
CONFIG_CMD_LSBLK=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_MUX=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_MMC_SANDBOX=y
CONFIG_MMC_SDHCI=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_NAND_SANDBOX=y
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x200
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_BOOTDEV_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_MTD=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_NAND_DRIVERS=y
+CONFIG_SPL_NAND_ECC=y
+CONFIG_SPL_NAND_SOFTECC=y
+CONFIG_SPL_NAND_BASE=y
+CONFIG_SPL_NAND_IDENT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NET=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_CMD_GPT=y
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_SPL_PWRSEQ=y
CONFIG_FS_LOADER=y
CONFIG_MMC_SANDBOX=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_NAND_SANDBOX=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x2000
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x200
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_BOOTSTAGE_FDT=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_XIP_SUPPORT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x81c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER=y
CONFIG_SPL_RAM_SUPPORT=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_STM32MP=y
+CONFIG_SYS_MALLOC_F_LEN=0x400000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x90000000
+CONFIG_DEFAULT_DEVICE_TREE="stm32mp257f-ev1"
+CONFIG_STM32MP25X=y
+CONFIG_DDR_CACHEABLE_SIZE=0x10000000
+CONFIG_TARGET_ST_STM32MP25X=y
+CONFIG_SYS_LOAD_ADDR=0x84000000
+CONFIG_SYS_MEMTEST_START=0x84000000
+CONFIG_SYS_MEMTEST_END=0x88000000
+CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_BOOTDELAY=1
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_SYS_PROMPT="STM32MP> "
+# CONFIG_CMD_BDI is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_ADTIMG=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_LOG=y
+CONFIG_OF_LIVE=y
+CONFIG_GPIO_HOG=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_STM32F7=y
+# CONFIG_MMC is not set
+CONFIG_PINCONF=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_RAM=y
+# CONFIG_STM32MP1_DDR is not set
+CONFIG_DM_RNG=y
+CONFIG_SERIAL_RX_BUFFER=y
+# CONFIG_OPTEE_TA_AVB is not set
+CONFIG_WDT=y
+CONFIG_WDT_STM32MP=y
+CONFIG_WDT_ARM_SMC=y
+CONFIG_ERRNO_STR=y
+# CONFIG_LMB_USE_MAX_REGIONS is not set
+CONFIG_LMB_MEMORY_REGIONS=2
+CONFIG_LMB_RESERVED_REGIONS=32
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_COUNT=0x40
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_USB=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
+# CONFIG_CMD_SCSI is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
CONFIG_RTC_MAX313XX=y
-CONFIG_DM_SCSI=y
+CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi"
CONFIG_SPL_STACK=0xfffffffc
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_ZYNQMP_NO_DDR=y
# CONFIG_PSCI_RESET is not set
CONFIG_ARM_DCC=y
CONFIG_SPI=y
CONFIG_ZYNQMP_GQSPI=y
-# CONFIG_FAT_WRITE is not set
CONFIG_PANIC_HANG=y
# CONFIG_GZIP is not set
# CONFIG_LMB is not set
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
CONFIG_SPL=y
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x0
CONFIG_DEBUG_UART_CLOCK=0
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
# CONFIG_ZYNQ_DDRC_INIT is not set
# CONFIG_CMD_ZYNQ is not set
CONFIG_SYS_LOAD_ADDR=0x0
bcb - Load/set/clear/test/dump/store Android BCB fields
Usage:
- bcb load <dev> <part> - load BCB from mmc <dev>:<part>
- bcb set <field> <val> - set BCB <field> to <val>
- bcb clear [<field>] - clear BCB <field> or all fields
- bcb test <field> <op> <val> - test BCB <field> against <val>
- bcb dump <field> - dump BCB <field>
- bcb store - store BCB back to mmc
+ bcb load <interface> <dev> <part> - load BCB from <interface> <dev>:<part>
+ load <dev> <part> - load BCB from mmc <dev>:<part>
+ bcb set <field> <val> - set BCB <field> to <val>
+ bcb clear [<field>] - clear BCB <field> or all fields
+ bcb test <field> <op> <val> - test BCB <field> against <val>
+ bcb dump <field> - dump BCB <field>
+ bcb store - store BCB back to <interface>
Legend:
- <dev> - MMC device index containing the BCB partition
- <part> - MMC partition index or name containing the BCB
- <field> - one of {command,status,recovery,stage,reserved}
- <op> - the binary operator used in 'bcb test':
- '=' returns true if <val> matches the string stored in <field>
- '~' returns true if <val> matches a subset of <field>'s string
- <val> - string/text provided as input to bcb {set,test}
- NOTE: any ':' character in <val> will be replaced by line feed
- during 'bcb set' and used as separator by upper layers
+ <interface> - storage device interface (virtio, mmc, etc)
+ <dev> - storage device index containing the BCB partition
+ <part> - partition index or name containing the BCB
+ <field> - one of {command,status,recovery,stage,reserved}
+ <op> - the binary operator used in 'bcb test':
+ '=' returns true if <val> matches the string stored in <field>
+ '~' returns true if <val> matches a subset of <field>'s string
+ <val> - string/text provided as input to bcb {set,test}
+ NOTE: any ':' character in <val> will be replaced by line feed
+ during 'bcb set' and used as separator by upper layers
'bcb'. Example of getting reboot reason
CONFIG_PARTITIONS=y
CONFIG_MMC=y
- CONFIG_BCB=y
+ CONFIG_CMD_BCB=y
.. [1] https://android.googlesource.com/platform/bootable/recovery
.. [2] https://source.android.com/devices/bootloader
As of U-Boot v2020.10 UEFI variables cannot be set at runtime. The U-Boot
command 'efidebug' can be used to set the variables.
+UEFI HTTP Boot
+~~~~~~~~~~~~~~
+
+HTTP Boot provides the capability for system deployment and configuration
+over the network. HTTP Boot can be activated by specifying::
+
+ CONFIG_EFI_HTTP_BOOT
+
+Enabling that will automatically select::
+
+ CONFIG_CMD_DNS
+ CONFIG_CMD_WGET
+ CONFIG_BLKMAP
+
+Set up the load option specifying the target URI::
+
+ efidebug boot add -u 1 netinst http://foo/bar
+
+When this load option is selected as boot selection, resolve the
+host ip address by dns, then download the file with wget.
+If the downloaded file extension is .iso or .img file, efibootmgr tries to
+mount the image and boot with the default file(e.g. EFI/BOOT/BOOTAA64.EFI).
+If the downloaded file is PE-COFF image, load the downloaded file and
+start it.
+
+The current implementation tries to resolve the IP address as a host name.
+If the uri is like "http://192.168.1.1/foobar",
+the dns process tries to resolve the host "192.168.1.1" and it will
+end up with "host not found".
+
+We need to preset the "httpserverip" environment variable to proceed the wget::
+
+ setenv httpserverip 192.168.1.1
+
Executing the built in hello world application
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--- /dev/null
+Sandbox NAND
+============
+
+The sandbox NAND controller emulates a NAND controller and attached devices.
+
+Required properties:
+- compatible: "sandbox,nand"
+- #address-cells: Must be 1
+- #size-cells: Must be 0
+
+Any number of child nodes may be present, each representing a NAND device:
+
+Required Properties:
+- reg: The chip-select(s) to use. Only single-die devices are supported for now.
+- sandbox,id: An array of bytes to be reported by the READID (0x90) command
+- sandbox,erasesize: The block size (erase size) of the device, in bytes. Must
+ be a power-of-two multiple of the page size.
+- sandbox,oobsize: The size of the OOB area per page, in bytes.
+- sandbox,pagesize: The page size (write size) of the device, in bytes. Must be
+ a power of two.
+- sandbox,pages: The total number of pages in the device.
+- sandbox,err-count: Number of bit errors to inject per step.
+- sandbox,err-step-size: Size of the step to use when injecting errors, in
+ bytes. Must evenly divide the page size.
+
+Optional properties:
+- sandbox,onfi: The complete ONFI parameter page, including the CRC. Should be
+ exactly 256 bytes.
+- Any common NAND chip properties as documented by Linux's
+ Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
+
+To match U-Boot's error correction capabilities, errors are only injected into
+the data area and the ECC codes. Other data in the OOB area is never corrupted.
+Generally, sandbox,err-step-size should be the same as the ECC step size, and
+sandbox,err-count should be less than the number of correctable bit errors (the
+ECC strength).
+
+Example
+-------
+
+nand-controller {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "sandbox,nand";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "soft";
+ sandbox,id = [00 e3];
+ sandbox,erasesize = <(8 * 1024)>;
+ sandbox,oobsize = <16>;
+ sandbox,pagesize = <512>;
+ sandbox,pages = <0x2000>;
+ sandbox,err-count = <1>;
+ sandbox,err-step-size = <512>;
+ };
+};
See also CMD_SATA which provides command-line support.
-config SYS_SATA_MAX_PORTS
- int "Maximum supported SATA ports"
- depends on SCSI_AHCI && !DM_SCSI
- default 1
- help
- Sets the maximum number of ports to scan when looking for devices.
- Ports from 0 to (this value - 1) are scanned.
-
config LIBATA
bool
help
config AHCI_PCI
bool "Support for PCI-based AHCI controller"
depends on PCI
- depends on DM_SCSI
+ depends on SCSI
depends on SCSI_AHCI
help
Enables support for the PCI-based AHCI controller.
bool "Support for PCI-based AHCI controller for SPL"
depends on SPL
depends on SPL_PCI
- depends on SPL_SATA && DM_SCSI
+ depends on SPL_SATA && SCSI
config DWC_AHCI
bool "Enable Synopsys DWC AHCI driver support"
select SCSI_AHCI
select PHY
- depends on DM_SCSI
+ depends on SCSI
help
Enable this driver to support Sata devices through
Synopsys DWC AHCI module.
bool "Marvell EBU AHCI SATA support"
depends on ARCH_MVEBU || ARCH_OCTEON
select SCSI_AHCI
- select DM_SCSI
+ select SCSI
help
This option enables support for the Marvell EBU SoC's
onboard AHCI SATA.
config SATA_CEVA
bool "Ceva Sata controller"
depends on AHCI
- depends on DM_SCSI
+ depends on SCSI
help
This option enables Ceva Sata controller hard IP available on Xilinx
ZynqMP. Support up to 2 external devices. Compliant with SATA 3.1 and
obj-$(CONFIG_SATA_CEVA) += sata_ceva.o
obj-$(CONFIG_SATA_MV) += sata_mv.o
obj-$(CONFIG_SATA_SIL) += sata_sil.o
-obj-$(CONFIG_SANDBOX) += sata_sandbox.o
obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o
obj-$(CONFIG_SUNXI_AHCI) += ahci_sunxi.o
obj-$(CONFIG_MTK_AHCI) += mtk_ahci.o
static int ata_io_flush(struct ahci_uc_priv *uc_priv, u8 port);
-#ifndef CONFIG_DM_SCSI
-struct ahci_uc_priv *probe_ent = NULL;
-#endif
-
#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
/*
static int ahci_host_init(struct ahci_uc_priv *uc_priv)
{
-#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
- struct udevice *dev = uc_priv->dev;
- struct pci_child_plat *pplat = dev_get_parent_plat(dev);
- u16 tmp16;
-#endif
void __iomem *mmio = uc_priv->mmio_base;
u32 tmp, cap_save, cmd;
int i, j, ret;
writel(cap_save, mmio + HOST_CAP);
writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
-#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
- if (pplat->vendor == PCI_VENDOR_ID_INTEL) {
- u16 tmp16;
-
- dm_pci_read_config16(dev, 0x92, &tmp16);
- dm_pci_write_config16(dev, 0x92, tmp16 | 0xf);
- }
-#endif
uc_priv->cap = readl(mmio + HOST_CAP);
uc_priv->port_map = readl(mmio + HOST_PORTS_IMPL);
port_map = uc_priv->port_map;
debug("cap 0x%x port_map 0x%x n_ports %d\n",
uc_priv->cap, uc_priv->port_map, uc_priv->n_ports);
-#if !defined(CONFIG_DM_SCSI)
- if (uc_priv->n_ports > CONFIG_SYS_SATA_MAX_PORTS)
- uc_priv->n_ports = CONFIG_SYS_SATA_MAX_PORTS;
-#endif
-
for (i = 0; i < uc_priv->n_ports; i++) {
if (!(port_map & (1 << i)))
continue;
writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
tmp = readl(mmio + HOST_CTL);
debug("HOST_CTL 0x%x\n", tmp);
-#if !defined(CONFIG_DM_SCSI)
-#ifndef CONFIG_SCSI_AHCI_PLAT
- dm_pci_read_config16(dev, PCI_COMMAND, &tmp16);
- tmp |= PCI_COMMAND_MASTER;
- dm_pci_write_config16(dev, PCI_COMMAND, tmp16);
-#endif
-#endif
return 0;
}
static void ahci_print_info(struct ahci_uc_priv *uc_priv)
{
-#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
- struct udevice *dev = uc_priv->dev;
- u16 cc;
-#endif
void __iomem *mmio = uc_priv->mmio_base;
u32 vers, cap, cap2, impl, speed;
const char *speed_s;
else
speed_s = "?";
-#if defined(CONFIG_SCSI_AHCI_PLAT) || defined(CONFIG_DM_SCSI)
scc_s = "SATA";
-#else
- dm_pci_read_config16(dev, 0x0a, &cc);
- if (cc == 0x0101)
- scc_s = "IDE";
- else if (cc == 0x0106)
- scc_s = "SATA";
- else if (cc == 0x0104)
- scc_s = "RAID";
- else
- scc_s = "unknown";
-#endif
printf("AHCI %02x%02x.%02x%02x "
"%u slots %u ports %s Gbps 0x%x impl %s mode\n",
(vers >> 24) & 0xff,
cap2 & (1 << 0) ? "boh " : "");
}
-#if defined(CONFIG_DM_SCSI) || !defined(CONFIG_SCSI_AHCI_PLAT)
static int ahci_init_one(struct ahci_uc_priv *uc_priv, struct udevice *dev)
{
-#if !defined(CONFIG_DM_SCSI)
- u16 vendor;
-#endif
int rc;
uc_priv->dev = dev;
uc_priv->pio_mask = 0x1f;
uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
-#if !defined(CONFIG_DM_SCSI)
- uc_priv->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5, 0, 0,
- PCI_REGION_TYPE, PCI_REGION_MEM);
-
- /* Take from kernel:
- * JMicron-specific fixup:
- * make sure we're in AHCI mode
- */
- dm_pci_read_config16(dev, PCI_VENDOR_ID, &vendor);
- if (vendor == 0x197b)
- dm_pci_write_config8(dev, 0x41, 0xa1);
-#else
struct scsi_plat *plat = dev_get_uclass_plat(dev);
uc_priv->mmio_base = (void *)plat->base;
-#endif
debug("ahci mmio_base=0x%p\n", uc_priv->mmio_base);
/* initialize adapter */
err_out:
return rc;
}
-#endif
#define MAX_DATA_BYTE_COUNT (4*1024*1024)
static int ahci_scsi_exec(struct udevice *dev, struct scsi_cmd *pccb)
{
- struct ahci_uc_priv *uc_priv;
-#ifdef CONFIG_DM_SCSI
- uc_priv = dev_get_uclass_priv(dev->parent);
-#else
- uc_priv = probe_ent;
-#endif
+ struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev->parent);
int ret;
switch (pccb->cmd[0]) {
return 0;
}
-#ifndef CONFIG_DM_SCSI
-void scsi_low_level_init(int busdevfunc)
-{
- struct ahci_uc_priv *uc_priv;
-
-#ifndef CONFIG_SCSI_AHCI_PLAT
- probe_ent = calloc(1, sizeof(struct ahci_uc_priv));
- if (!probe_ent) {
- printf("%s: No memory for uc_priv\n", __func__);
- return;
- }
- uc_priv = probe_ent;
- struct udevice *dev;
- int ret;
-
- ret = dm_pci_bus_find_bdf(busdevfunc, &dev);
- if (ret)
- return;
- ahci_init_one(uc_priv, dev);
-#else
- uc_priv = probe_ent;
-#endif
-
- ahci_start_ports(uc_priv);
-}
-#endif
-
-#ifndef CONFIG_SCSI_AHCI_PLAT
int ahci_init_one_dm(struct udevice *dev)
{
struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
return ahci_init_one(uc_priv, dev);
}
-#endif
int ahci_start_ports_dm(struct udevice *dev)
{
return ahci_start_ports(uc_priv);
}
-#ifdef CONFIG_SCSI_AHCI_PLAT
-static int ahci_init_common(struct ahci_uc_priv *uc_priv, void __iomem *base)
-{
- int rc;
-
- uc_priv->host_flags = ATA_FLAG_SATA
- | ATA_FLAG_NO_LEGACY
- | ATA_FLAG_MMIO
- | ATA_FLAG_PIO_DMA
- | ATA_FLAG_NO_ATAPI;
- uc_priv->pio_mask = 0x1f;
- uc_priv->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
-
- uc_priv->mmio_base = base;
-
- /* initialize adapter */
- rc = ahci_host_init(uc_priv);
- if (rc)
- goto err_out;
-
- ahci_print_info(uc_priv);
-
- rc = ahci_start_ports(uc_priv);
-
-err_out:
- return rc;
-}
-
-#ifndef CONFIG_DM_SCSI
-int ahci_init(void __iomem *base)
-{
- struct ahci_uc_priv *uc_priv;
-
- probe_ent = malloc(sizeof(struct ahci_uc_priv));
- if (!probe_ent) {
- printf("%s: No memory for uc_priv\n", __func__);
- return -ENOMEM;
- }
-
- uc_priv = probe_ent;
- memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
-
- return ahci_init_common(uc_priv, base);
-}
-#endif
-
-int ahci_init_dm(struct udevice *dev, void __iomem *base)
-{
- struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev);
-
- return ahci_init_common(uc_priv, base);
-}
-
-void __weak scsi_init(void)
-{
-}
-
-#endif /* CONFIG_SCSI_AHCI_PLAT */
-
/*
* In the general case of generic rotating media it makes sense to have a
* flush capability. It probably even makes sense in the case of SSDs because
return 0;
}
-#ifdef CONFIG_DM_SCSI
int ahci_bind_scsi(struct udevice *ahci_dev, struct udevice **devp)
{
struct udevice *dev;
.id = UCLASS_SCSI,
.ops = &scsi_ops,
};
-#else
-int scsi_exec(struct udevice *dev, struct scsi_cmd *pccb)
-{
- return ahci_scsi_exec(dev, pccb);
-}
-
-__weak int scsi_bus_reset(struct udevice *dev)
-{
- return ahci_scsi_bus_reset(dev);
-
- return 0;
-}
-#endif
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
-#ifndef CONFIG_AHCI
-struct blk_desc sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
-#endif
-
int sata_reset(struct udevice *dev)
{
struct ahci_ops *ops = ahci_get_ops(dev);
return ret;
}
-#ifndef CONFIG_AHCI
-#ifdef CONFIG_PARTITIONS
-struct blk_desc *sata_get_dev(int dev)
-{
- return (dev < CONFIG_SYS_SATA_MAX_DEVICE) ? &sata_dev_desc[dev] : NULL;
-}
-#endif
-#endif
-
static unsigned long sata_bread(struct udevice *dev, lbaint_t start,
lbaint_t blkcnt, void *dst)
{
return -ENOSYS;
}
-#ifndef CONFIG_AHCI
-int __sata_initialize(void)
-{
- int rc, ret = -1;
- int i;
-
- for (i = 0; i < CONFIG_SYS_SATA_MAX_DEVICE; i++) {
- memset(&sata_dev_desc[i], 0, sizeof(struct blk_desc));
- sata_dev_desc[i].uclass_id = UCLASS_AHCI;
- sata_dev_desc[i].devnum = i;
- sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
- sata_dev_desc[i].type = DEV_TYPE_HARDDISK;
- sata_dev_desc[i].lba = 0;
- sata_dev_desc[i].blksz = 512;
- sata_dev_desc[i].log2blksz = LOG2(sata_dev_desc[i].blksz);
- rc = init_sata(i);
- if (!rc) {
- rc = scan_sata(i);
- if (!rc && sata_dev_desc[i].lba > 0 &&
- sata_dev_desc[i].blksz > 0) {
- part_init(&sata_dev_desc[i]);
- ret = i;
- }
- }
- }
-
- return ret;
-}
-int sata_initialize(void) __attribute__((weak, alias("__sata_initialize")));
-
-__weak int __sata_stop(void)
-{
- int i, err = 0;
-
- for (i = 0; i < CONFIG_SYS_SATA_MAX_DEVICE; i++)
- err |= reset_sata(i);
-
- if (err)
- printf("Could not reset some SATA devices\n");
-
- return err;
-}
-int sata_stop(void) __attribute__((weak, alias("__sata_stop")));
-#endif
-
static const struct blk_ops sata_blk_ops = {
.read = sata_bread,
.write = sata_bwrite,
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015 Google, Inc
- * Written by Simon Glass <sjg@chromium.org>
- */
-
-#include <common.h>
-#include <blk.h>
-
-int init_sata(int dev)
-{
- return 0;
-}
-
-int reset_sata(int dev)
-{
- return 0;
-}
-
-int scan_sata(int dev)
-{
- return 0;
-}
-
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
-{
- return 0;
-}
-
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
-{
- return 0;
-}
config SPL_LEGACY_BLOCK
bool # "Enable Legacy Block Device"
- depends on SPL && !DM_SPL
+ depends on SPL
default y if SPL_MMC || SPL_USB_STORAGE || SCSI || NVME || IDE
default y if SPL_AHCI_PCI
help
config RKMTD
bool "Rockchip rkmtd virtual block device"
+ select RANDOM_UUID
help
Enable "rkmtd" class and driver to create a virtual block device
to transfer Rockchip boot block data to and from NAND with block
endif
obj-$(CONFIG_SANDBOX) += sandbox.o host-uclass.o host_dev.o
obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o
-obj-$(CONFIG_BLKMAP) += blkmap.o
+obj-$(CONFIG_$(SPL_TPL_)BLKMAP) += blkmap.o
+obj-$(CONFIG_$(SPL_TPL_)BLKMAP) += blkmap_helper.o
obj-$(CONFIG_EFI_MEDIA) += efi-media-uclass.o
obj-$(CONFIG_EFI_MEDIA_SANDBOX) += sb_efi_media.o
void (*destroy)(struct blkmap *bm, struct blkmap_slice *bms);
};
-/**
- * struct blkmap - Block map
- *
- * Data associated with a blkmap.
- *
- * @label: Human readable name of this blkmap
- * @blk: Underlying block device
- * @slices: List of slices associated with this blkmap
- */
-struct blkmap {
- char *label;
- struct udevice *blk;
- struct list_head slices;
-};
-
static bool blkmap_slice_contains(struct blkmap_slice *bms, lbaint_t blknr)
{
return (blknr >= bms->blknr) && (blknr < (bms->blknr + bms->blkcnt));
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * blkmap helper function
+ *
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include <blk.h>
+#include <blkmap.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+
+int blkmap_create_ramdisk(const char *label, ulong image_addr, ulong image_size,
+ struct udevice **devp)
+{
+ int ret;
+ lbaint_t blknum;
+ struct blkmap *bm;
+ struct blk_desc *desc;
+ struct udevice *bm_dev;
+
+ ret = blkmap_create(label, &bm_dev);
+ if (ret) {
+ log_err("failed to create blkmap\n");
+ return ret;
+ }
+
+ bm = dev_get_plat(bm_dev);
+ desc = dev_get_uclass_plat(bm->blk);
+ blknum = image_size >> desc->log2blksz;
+ ret = blkmap_map_pmem(bm_dev, 0, blknum, image_addr);
+ if (ret) {
+ log_err("Unable to map %#llx at block %d : %d\n",
+ (unsigned long long)image_addr, 0, ret);
+ goto err;
+ }
+ log_info("Block %d+0x" LBAF " mapped to %#llx\n", 0, blknum,
+ (unsigned long long)image_addr);
+
+ ret = device_probe(bm->blk);
+ if (ret)
+ goto err;
+
+ if (devp)
+ *devp = bm_dev;
+
+ return 0;
+
+err:
+ blkmap_destroy(bm_dev);
+
+ return ret;
+}
#include <linux/clk/at91_pmc.h>
#include <linux/delay.h>
#include <linux/io.h>
+#include <linux/time.h>
#include "pmc.h"
#define UBOOT_DM_CLK_AT91_MAIN_RC "at91-main-rc-clk"
#define UBOOT_DM_CLK_AT91_SAM9X5_MAIN "at91-sam9x5-main-clk"
#define MOR_KEY_MASK GENMASK(23, 16)
-#define USEC_PER_SEC 1000000UL
#define SLOW_CLOCK_FREQ 32768
#define clk_main_parent_select(s) (((s) & \
#include <dt-bindings/mfd/k210-sysctl.h>
#include <k210/pll.h>
#include <linux/bitfield.h>
+#include <asm/barrier.h>
DECLARE_GLOBAL_DATA_PTR;
config SPL_DM_STATS
bool "Collect and show driver model stats in SPL"
- depends on DM_SPL
+ depends on SPL_DM
help
Enable this to collect and display memory statistics about driver
model. This can help to figure out where all the memory is going and
config DFU_TFTP
bool "DFU via TFTP"
+ depends on NETDEVICES
select UPDATE_COMMON
select DFU_OVER_TFTP
help
config DMA_LEGACY
bool "Legacy DMA support"
- default y if FSLDMAFEC
help
Enable legacy DMA support. This does not use driver model and should
be migrated to the new API.
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-/*Main C file for multi-channel DMA API. */
-
-#include <common.h>
-
-#include <MCD_dma.h>
-#include <MCD_tasksInit.h>
-#include <MCD_progCheck.h>
-
-/********************************************************************/
-/* This is an API-internal pointer to the DMA's registers */
-dmaRegs *MCD_dmaBar;
-
-/*
- * These are the real and model task tables as generated by the
- * build process
- */
-extern TaskTableEntry MCD_realTaskTableSrc[NCHANNELS];
-extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS];
-
-/*
- * However, this (usually) gets relocated to on-chip SRAM, at which
- * point we access them as these tables
- */
-volatile TaskTableEntry *MCD_taskTable;
-TaskTableEntry *MCD_modelTaskTable;
-
-/*
- * MCD_chStatus[] is an array of status indicators for remembering
- * whether a DMA has ever been attempted on each channel, pausing
- * status, etc.
- */
-static int MCD_chStatus[NCHANNELS] = {
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
- MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA
-};
-
-/* Prototypes for local functions */
-static void MCD_memcpy(int *dest, int *src, u32 size);
-static void MCD_resmActions(int channel);
-
-/*
- * Buffer descriptors used for storage of progress info for single Dmas
- * Also used as storage for the DMA for CRCs for single DMAs
- * Otherwise, the DMA does not parse these buffer descriptors
- */
-#ifdef MCD_INCLUDE_EU
-extern MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
-#else
-MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
-#endif
-MCD_bufDesc *MCD_relocBuffDesc;
-
-/* Defines for the debug control register's functions */
-#define DBG_CTL_COMP1_TASK (0x00002000)
-#define DBG_CTL_ENABLE (DBG_CTL_AUTO_ARM | \
- DBG_CTL_BREAK | \
- DBG_CTL_INT_BREAK | \
- DBG_CTL_COMP1_TASK)
-#define DBG_CTL_DISABLE (DBG_CTL_AUTO_ARM | \
- DBG_CTL_INT_BREAK | \
- DBG_CTL_COMP1_TASK)
-#define DBG_KILL_ALL_STAT (0xFFFFFFFF)
-
-/* Offset to context save area where progress info is stored */
-#define CSAVE_OFFSET 10
-
-/* Defines for Byte Swapping */
-#define MCD_BYTE_SWAP_KILLER 0xFFF8888F
-#define MCD_NO_BYTE_SWAP_ATALL 0x00040000
-
-/* Execution Unit Identifiers */
-#define MAC 0 /* legacy - not used */
-#define LUAC 1 /* legacy - not used */
-#define CRC 2 /* legacy - not used */
-#define LURC 3 /* Logic Unit with CRC */
-
-/* Task Identifiers */
-#define TASK_CHAINNOEU 0
-#define TASK_SINGLENOEU 1
-#ifdef MCD_INCLUDE_EU
-#define TASK_CHAINEU 2
-#define TASK_SINGLEEU 3
-#define TASK_FECRX 4
-#define TASK_FECTX 5
-#else
-#define TASK_CHAINEU 0
-#define TASK_SINGLEEU 1
-#define TASK_FECRX 2
-#define TASK_FECTX 3
-#endif
-
-/*
- * Structure to remember which variant is on which channel
- * TBD- need this?
- */
-typedef struct MCD_remVariants_struct MCD_remVariant;
-struct MCD_remVariants_struct {
- int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */
- int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */
- s16 remDestIncr[NCHANNELS]; /* DestIncr */
- s16 remSrcIncr[NCHANNELS]; /* srcIncr */
- u32 remXferSize[NCHANNELS]; /* xferSize */
-};
-
-/* Structure to remember the startDma parameters for each channel */
-MCD_remVariant MCD_remVariants;
-/********************************************************************/
-/* Function: MCD_initDma
- * Purpose: Initializes the DMA API by setting up a pointer to the DMA
- * registers, relocating and creating the appropriate task
- * structures, and setting up some global settings
- * Arguments:
- * dmaBarAddr - pointer to the multichannel DMA registers
- * taskTableDest - location to move DMA task code and structs to
- * flags - operational parameters
- * Return Value:
- * MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned
- * MCD_OK otherwise
- */
-extern u32 MCD_funcDescTab0[];
-
-int MCD_initDma(dmaRegs * dmaBarAddr, void *taskTableDest, u32 flags)
-{
- int i;
- TaskTableEntry *entryPtr;
-
- /* setup the local pointer to register set */
- MCD_dmaBar = dmaBarAddr;
-
- /* do we need to move/create a task table */
- if ((flags & MCD_RELOC_TASKS) != 0) {
- int fixedSize;
- u32 *fixedPtr;
- /*int *tablePtr = taskTableDest;TBD */
- int varTabsOffset, funcDescTabsOffset, contextSavesOffset;
- int taskDescTabsOffset;
- int taskTableSize, varTabsSize, funcDescTabsSize,
- contextSavesSize;
- int taskDescTabSize;
-
- int i;
-
- /* check if physical address is aligned on 512 byte boundary */
- if (((u32) taskTableDest & 0x000001ff) != 0)
- return (MCD_TABLE_UNALIGNED);
-
- /* set up local pointer to task Table */
- MCD_taskTable = taskTableDest;
-
- /*
- * Create a task table:
- * - compute aligned base offsets for variable tables and
- * function descriptor tables, then
- * - loop through the task table and setup the pointers
- * - copy over model task table with the the actual task
- * descriptor tables
- */
-
- taskTableSize = NCHANNELS * sizeof(TaskTableEntry);
- /* align variable tables to size */
- varTabsOffset = taskTableSize + (u32) taskTableDest;
- if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0)
- varTabsOffset =
- (varTabsOffset + VAR_TAB_SIZE) & (~VAR_TAB_SIZE);
- /* align function descriptor tables */
- varTabsSize = NCHANNELS * VAR_TAB_SIZE;
- funcDescTabsOffset = varTabsOffset + varTabsSize;
-
- if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0)
- funcDescTabsOffset =
- (funcDescTabsOffset +
- FUNCDESC_TAB_SIZE) & (~FUNCDESC_TAB_SIZE);
-
- funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE;
- contextSavesOffset = funcDescTabsOffset + funcDescTabsSize;
- contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE);
- fixedSize =
- taskTableSize + varTabsSize + funcDescTabsSize +
- contextSavesSize;
-
- /* zero the thing out */
- fixedPtr = (u32 *) taskTableDest;
- for (i = 0; i < (fixedSize / 4); i++)
- fixedPtr[i] = 0;
-
- entryPtr = (TaskTableEntry *) MCD_taskTable;
- /* set up fixed pointers */
- for (i = 0; i < NCHANNELS; i++) {
- /* update ptr to local value */
- entryPtr[i].varTab = (u32) varTabsOffset;
- entryPtr[i].FDTandFlags =
- (u32) funcDescTabsOffset | MCD_TT_FLAGS_DEF;
- entryPtr[i].contextSaveSpace = (u32) contextSavesOffset;
- varTabsOffset += VAR_TAB_SIZE;
-#ifdef MCD_INCLUDE_EU
- /* if not there is only one, just point to the
- same one */
- funcDescTabsOffset += FUNCDESC_TAB_SIZE;
-#endif
- contextSavesOffset += CONTEXT_SAVE_SIZE;
- }
- /* copy over the function descriptor table */
- for (i = 0; i < FUNCDESC_TAB_NUM; i++) {
- MCD_memcpy((void *)(entryPtr[i].
- FDTandFlags & ~MCD_TT_FLAGS_MASK),
- (void *)MCD_funcDescTab0, FUNCDESC_TAB_SIZE);
- }
-
- /* copy model task table to where the context saves stuff
- leaves off */
- MCD_modelTaskTable = (TaskTableEntry *) contextSavesOffset;
-
- MCD_memcpy((void *)MCD_modelTaskTable,
- (void *)MCD_modelTaskTableSrc,
- NUMOFVARIANTS * sizeof(TaskTableEntry));
-
- /* point to local version of model task table */
- entryPtr = MCD_modelTaskTable;
- taskDescTabsOffset = (u32) MCD_modelTaskTable +
- (NUMOFVARIANTS * sizeof(TaskTableEntry));
-
- /* copy actual task code and update TDT ptrs in local
- model task table */
- for (i = 0; i < NUMOFVARIANTS; i++) {
- taskDescTabSize =
- entryPtr[i].TDTend - entryPtr[i].TDTstart + 4;
- MCD_memcpy((void *)taskDescTabsOffset,
- (void *)entryPtr[i].TDTstart,
- taskDescTabSize);
- entryPtr[i].TDTstart = (u32) taskDescTabsOffset;
- taskDescTabsOffset += taskDescTabSize;
- entryPtr[i].TDTend = (u32) taskDescTabsOffset - 4;
- }
-#ifdef MCD_INCLUDE_EU
- /* Tack single DMA BDs onto end of code so API controls
- where they are since DMA might write to them */
- MCD_relocBuffDesc =
- (MCD_bufDesc *) (entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
-#else
- /* DMA does not touch them so they can be wherever and we
- don't need to waste SRAM on them */
- MCD_relocBuffDesc = MCD_singleBufDescs;
-#endif
- } else {
- /* point the would-be relocated task tables and the
- buffer descriptors to the ones the linker generated */
-
- if (((u32) MCD_realTaskTableSrc & 0x000001ff) != 0)
- return (MCD_TABLE_UNALIGNED);
-
- /* need to add code to make sure that every thing else is
- aligned properly TBD. this is problematic if we init
- more than once or after running tasks, need to add
- variable to see if we have aleady init'd */
- entryPtr = MCD_realTaskTableSrc;
- for (i = 0; i < NCHANNELS; i++) {
- if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) ||
- ((entryPtr[i].
- FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0))
- return (MCD_TABLE_UNALIGNED);
- }
-
- MCD_taskTable = MCD_realTaskTableSrc;
- MCD_modelTaskTable = MCD_modelTaskTableSrc;
- MCD_relocBuffDesc = MCD_singleBufDescs;
- }
-
- /* Make all channels as totally inactive, and remember them as such: */
-
- MCD_dmaBar->taskbar = (u32) MCD_taskTable;
- for (i = 0; i < NCHANNELS; i++) {
- MCD_dmaBar->taskControl[i] = 0x0;
- MCD_chStatus[i] = MCD_NO_DMA;
- }
-
- /* Set up pausing mechanism to inactive state: */
- /* no particular values yet for either comparator registers */
- MCD_dmaBar->debugComp1 = 0;
- MCD_dmaBar->debugComp2 = 0;
- MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
- MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT;
-
- /* enable or disable commbus prefetch, really need an ifdef or
- something to keep from trying to set this in the 8220 */
- if ((flags & MCD_COMM_PREFETCH_EN) != 0)
- MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH;
- else
- MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
-
- return (MCD_OK);
-}
-
-/*********************** End of MCD_initDma() ***********************/
-
-/********************************************************************/
-/* Function: MCD_dmaStatus
- * Purpose: Returns the status of the DMA on the requested channel
- * Arguments: channel - channel number
- * Returns: Predefined status indicators
- */
-int MCD_dmaStatus(int channel)
-{
- u16 tcrValue;
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- tcrValue = MCD_dmaBar->taskControl[channel];
- if ((tcrValue & TASK_CTL_EN) == 0) { /* nothing running */
- /* if last reported with task enabled */
- if (MCD_chStatus[channel] == MCD_RUNNING
- || MCD_chStatus[channel] == MCD_IDLE)
- MCD_chStatus[channel] = MCD_DONE;
- } else { /* something is running */
-
- /* There are three possibilities: paused, running or idle. */
- if (MCD_chStatus[channel] == MCD_RUNNING
- || MCD_chStatus[channel] == MCD_IDLE) {
- MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
- /* This register is selected to know which initiator is
- actually asserted. */
- if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
- MCD_chStatus[channel] = MCD_RUNNING;
- else
- MCD_chStatus[channel] = MCD_IDLE;
- /* do not change the status if it is already paused. */
- }
- }
- return MCD_chStatus[channel];
-}
-
-/******************** End of MCD_dmaStatus() ************************/
-
-/********************************************************************/
-/* Function: MCD_startDma
- * Ppurpose: Starts a particular kind of DMA
- * Arguments:
- * srcAddr - the channel on which to run the DMA
- * srcIncr - the address to move data from, or buffer-descriptor address
- * destAddr - the amount to increment the source address per transfer
- * destIncr - the address to move data to
- * dmaSize - the amount to increment the destination address per transfer
- * xferSize - the number bytes in of each data movement (1, 2, or 4)
- * initiator - what device initiates the DMA
- * priority - priority of the DMA
- * flags - flags describing the DMA
- * funcDesc - description of byte swapping, bit swapping, and CRC actions
- * srcAddrVirt - virtual buffer descriptor address TBD
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- */
-
-int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr,
- s16 destIncr, u32 dmaSize, u32 xferSize, u32 initiator,
- int priority, u32 flags, u32 funcDesc
-#ifdef MCD_NEED_ADDR_TRANS
- s8 * srcAddrVirt
-#endif
- )
-{
- int srcRsdIncr, destRsdIncr;
- int *cSave;
- short xferSizeIncr;
- int tcrCount = 0;
-#ifdef MCD_INCLUDE_EU
- u32 *realFuncArray;
-#endif
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- /* tbd - need to determine the proper response to a bad funcDesc when
- not including EU functions, for now, assign a benign funcDesc, but
- maybe should return an error */
-#ifndef MCD_INCLUDE_EU
- funcDesc = MCD_FUNC_NOEU1;
-#endif
-
-#ifdef MCD_DEBUG
- printf("startDma:Setting up params\n");
-#endif
- /* Set us up for task-wise priority. We don't technically need to do
- this on every start, but since the register involved is in the same
- longword as other registers that users are in control of, setting
- it more than once is probably preferable. That since the
- documentation doesn't seem to be completely consistent about the
- nature of the PTD control register. */
- MCD_dmaBar->ptdControl |= (u16) 0x8000;
-
- /* Not sure what we need to keep here rtm TBD */
-#if 1
- /* Calculate additional parameters to the regular DMA calls. */
- srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0);
- destRsdIncr = destIncr < 0 ? -1 : (destIncr > 0 ? 1 : 0);
-
- xferSizeIncr = (xferSize & 0xffff) | 0x20000000;
-
- /* Remember for each channel which variant is running. */
- MCD_remVariants.remSrcRsdIncr[channel] = srcRsdIncr;
- MCD_remVariants.remDestRsdIncr[channel] = destRsdIncr;
- MCD_remVariants.remDestIncr[channel] = destIncr;
- MCD_remVariants.remSrcIncr[channel] = srcIncr;
- MCD_remVariants.remXferSize[channel] = xferSize;
-#endif
-
- cSave =
- (int *)(MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET +
- CURRBD;
-
-#ifdef MCD_INCLUDE_EU
- /* may move this to EU specific calls */
- realFuncArray =
- (u32 *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00);
- /* Modify the LURC's normal and byte-residue-loop functions according
- to parameter. */
- realFuncArray[(LURC * 16)] = xferSize == 4 ?
- funcDesc : xferSize == 2 ?
- funcDesc & 0xfffff00f : funcDesc & 0xffff000f;
- realFuncArray[(LURC * 16 + 1)] =
- (funcDesc & MCD_BYTE_SWAP_KILLER) | MCD_NO_BYTE_SWAP_ATALL;
-#endif
- /* Write the initiator field in the TCR, and also set the
- initiator-hold bit. Note that,due to a hardware quirk, this could
- collide with an MDE access to the initiator-register file, so we
- have to verify that the write reads back correctly. */
-
- MCD_dmaBar->taskControl[channel] =
- (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;
-
- while (((MCD_dmaBar->taskControl[channel] & 0x1fff) !=
- ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM))
- && (tcrCount < 1000)) {
- tcrCount++;
- /*MCD_dmaBar->ptd_tcr[channel] = (initiator << 8) | 0x0020; */
- MCD_dmaBar->taskControl[channel] =
- (initiator << 8) | TASK_CTL_HIPRITSKEN |
- TASK_CTL_HLDINITNUM;
- }
-
- MCD_dmaBar->priority[channel] = (u8) priority & PRIORITY_PRI_MASK;
- /* should be albe to handle this stuff with only one write to ts reg
- - tbd */
- if (channel < 8 && channel >= 0) {
- MCD_dmaBar->taskSize0 &= ~(0xf << (7 - channel) * 4);
- MCD_dmaBar->taskSize0 |=
- (xferSize & 3) << (((7 - channel) * 4) + 2);
- MCD_dmaBar->taskSize0 |= (xferSize & 3) << ((7 - channel) * 4);
- } else {
- MCD_dmaBar->taskSize1 &= ~(0xf << (15 - channel) * 4);
- MCD_dmaBar->taskSize1 |=
- (xferSize & 3) << (((15 - channel) * 4) + 2);
- MCD_dmaBar->taskSize1 |= (xferSize & 3) << ((15 - channel) * 4);
- }
-
- /* setup task table flags/options which mostly control the line
- buffers */
- MCD_taskTable[channel].FDTandFlags &= ~MCD_TT_FLAGS_MASK;
- MCD_taskTable[channel].FDTandFlags |= (MCD_TT_FLAGS_MASK & flags);
-
- if (flags & MCD_FECTX_DMA) {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_FECTX].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_FECTX].TDTend;
- MCD_startDmaENetXmit((char *)srcAddr, (char *)srcAddr,
- (char *)destAddr, MCD_taskTable,
- channel);
- } else if (flags & MCD_FECRX_DMA) {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_FECRX].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_FECRX].TDTend;
- MCD_startDmaENetRcv((char *)srcAddr, (char *)srcAddr,
- (char *)destAddr, MCD_taskTable,
- channel);
- } else if (flags & MCD_SINGLE_DMA) {
- /* this buffer descriptor is used for storing off initial
- parameters for later progress query calculation and for the
- DMA to write the resulting checksum. The DMA does not use
- this to determine how to operate, that info is passed with
- the init routine */
- MCD_relocBuffDesc[channel].srcAddr = srcAddr;
- MCD_relocBuffDesc[channel].destAddr = destAddr;
-
- /* definitely not its final value */
- MCD_relocBuffDesc[channel].lastDestAddr = destAddr;
-
- MCD_relocBuffDesc[channel].dmaSize = dmaSize;
- MCD_relocBuffDesc[channel].flags = 0; /* not used */
- MCD_relocBuffDesc[channel].csumResult = 0; /* not used */
- MCD_relocBuffDesc[channel].next = 0; /* not used */
-
- /* Initialize the progress-querying stuff to show no
- progress: */
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET] = (int)srcAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET] = (int)destAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET] =
-(u32) & (MCD_relocBuffDesc[channel]);
- /* tbd - need to keep the user from trying to call the EU
- routine when MCD_INCLUDE_EU is not defined */
- if (funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
- MCD_startDmaSingleNoEu((char *)srcAddr, srcIncr,
- (char *)destAddr, destIncr,
- (int)dmaSize, xferSizeIncr,
- flags, (int *)
- &(MCD_relocBuffDesc[channel]),
- cSave, MCD_taskTable, channel);
- } else {
- /* TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
- MCD_startDmaSingleEu((char *)srcAddr, srcIncr,
- (char *)destAddr, destIncr,
- (int)dmaSize, xferSizeIncr,
- flags, (int *)
- &(MCD_relocBuffDesc[channel]),
- cSave, MCD_taskTable, channel);
- }
- } else { /* chained DMAS */
- /* Initialize the progress-querying stuff to show no
- progress: */
-#if 1
- /* (!defined(MCD_NEED_ADDR_TRANS)) */
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddr)->srcAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddr)->destAddr;
-#else
- /* if using address translation, need the virtual addr of the
- first buffdesc */
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddrVirt)->srcAddr;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
- = (int)((MCD_bufDesc *) srcAddrVirt)->destAddr;
-#endif
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET] = (u32) srcAddr;
-
- if (funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) {
- /*TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
- MCD_startDmaChainNoEu((int *)srcAddr, srcIncr,
- destIncr, xferSize,
- xferSizeIncr, cSave,
- MCD_taskTable, channel);
- } else {
- /*TDTStart and TDTEnd */
- MCD_taskTable[channel].TDTstart =
- MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
- MCD_taskTable[channel].TDTend =
- MCD_modelTaskTable[TASK_CHAINEU].TDTend;
- MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr,
- xferSize, xferSizeIncr, cSave,
- MCD_taskTable, channel);
- }
- }
- MCD_chStatus[channel] = MCD_IDLE;
- return (MCD_OK);
-}
-
-/************************ End of MCD_startDma() *********************/
-
-/********************************************************************/
-/* Function: MCD_XferProgrQuery
- * Purpose: Returns progress of DMA on requested channel
- * Arguments: channel - channel to retrieve progress for
- * progRep - pointer to user supplied MCD_XferProg struct
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- *
- * Notes:
- * MCD_XferProgrQuery() upon completing or after aborting a DMA, or
- * while the DMA is in progress, this function returns the first
- * DMA-destination address not (or not yet) used in the DMA. When
- * encountering a non-ready buffer descriptor, the information for
- * the last completed descriptor is returned.
- *
- * MCD_XferProgQuery() has to avoid the possibility of getting
- * partially-updated information in the event that we should happen
- * to query DMA progress just as the DMA is updating it. It does that
- * by taking advantage of the fact context is not saved frequently for
- * the most part. We therefore read it at least twice until we get the
- * same information twice in a row.
- *
- * Because a small, but not insignificant, amount of time is required
- * to write out the progress-query information, especially upon
- * completion of the DMA, it would be wise to guarantee some time lag
- * between successive readings of the progress-query information.
- */
-
-/* How many iterations of the loop below to execute to stabilize values */
-#define STABTIME 0
-
-int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep)
-{
- MCD_XferProg prevRep;
- int again; /* true if we are to try again to ge
- consistent results */
- int i; /* used as a time-waste counter */
- int destDiffBytes; /* Total no of bytes that we think actually
- got xfered. */
- int numIterations; /* number of iterations */
- int bytesNotXfered; /* bytes that did not get xfered. */
- s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
- int subModVal, addModVal; /* Mode values to added and subtracted
- from the final destAddr */
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- /* Read a trial value for the progress-reporting values */
- prevRep.lastSrcAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
- prevRep.lastDestAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
- prevRep.dmaSize =
- ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT +
- CSAVE_OFFSET];
- prevRep.currBufDesc =
- (MCD_bufDesc *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET];
- /* Repeatedly reread those values until they match previous values: */
- do {
- /* Waste a little bit of time to ensure stability: */
- for (i = 0; i < STABTIME; i++) {
- /* make sure this loop does something so that it
- doesn't get optimized out */
- i += i >> 2;
- }
- /* Check them again: */
- progRep->lastSrcAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
- progRep->lastDestAddr =
- (s8 *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
- progRep->dmaSize =
- ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
- progRep->currBufDesc =
- (MCD_bufDesc *) ((volatile int *)MCD_taskTable[channel].
- contextSaveSpace)[CURRBD + CSAVE_OFFSET];
- /* See if they match: */
- if (prevRep.lastSrcAddr != progRep->lastSrcAddr
- || prevRep.lastDestAddr != progRep->lastDestAddr
- || prevRep.dmaSize != progRep->dmaSize
- || prevRep.currBufDesc != progRep->currBufDesc) {
- /* If they don't match, remember previous values and
- try again: */
- prevRep.lastSrcAddr = progRep->lastSrcAddr;
- prevRep.lastDestAddr = progRep->lastDestAddr;
- prevRep.dmaSize = progRep->dmaSize;
- prevRep.currBufDesc = progRep->currBufDesc;
- again = MCD_TRUE;
- } else
- again = MCD_FALSE;
- } while (again == MCD_TRUE);
-
- /* Update the dCount, srcAddr and destAddr */
- /* To calculate dmaCount, we consider destination address. C
- overs M1,P1,Z for destination */
- switch (MCD_remVariants.remDestRsdIncr[channel]) {
- case MINUS1:
- subModVal =
- ((int)progRep->
- lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) -
- 1);
- addModVal =
- ((int)progRep->currBufDesc->
- destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
- LWAlignedInitDestAddr =
- (progRep->currBufDesc->destAddr) - addModVal;
- LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal;
- destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr;
- bytesNotXfered =
- (destDiffBytes / MCD_remVariants.remDestIncr[channel]) *
- (MCD_remVariants.remDestIncr[channel]
- + MCD_remVariants.remXferSize[channel]);
- progRep->dmaSize =
- destDiffBytes - bytesNotXfered + addModVal - subModVal;
- break;
- case ZERO:
- progRep->lastDestAddr = progRep->currBufDesc->destAddr;
- break;
- case PLUS1:
- /* This value has to be subtracted from the final
- calculated dCount. */
- subModVal =
- ((int)progRep->currBufDesc->
- destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
- /* These bytes are already in lastDestAddr. */
- addModVal =
- ((int)progRep->
- lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) -
- 1);
- LWAlignedInitDestAddr =
- (progRep->currBufDesc->destAddr) - subModVal;
- LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal;
- destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr);
- numIterations =
- (LWAlignedCurrDestAddr -
- LWAlignedInitDestAddr) /
- MCD_remVariants.remDestIncr[channel];
- bytesNotXfered =
- numIterations * (MCD_remVariants.remDestIncr[channel]
- - MCD_remVariants.remXferSize[channel]);
- progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal;
- break;
- default:
- break;
- }
-
- /* This covers M1,P1,Z for source */
- switch (MCD_remVariants.remSrcRsdIncr[channel]) {
- case MINUS1:
- progRep->lastSrcAddr =
- progRep->currBufDesc->srcAddr +
- (MCD_remVariants.remSrcIncr[channel] *
- (progRep->dmaSize / MCD_remVariants.remXferSize[channel]));
- break;
- case ZERO:
- progRep->lastSrcAddr = progRep->currBufDesc->srcAddr;
- break;
- case PLUS1:
- progRep->lastSrcAddr =
- progRep->currBufDesc->srcAddr +
- (MCD_remVariants.remSrcIncr[channel] *
- (progRep->dmaSize / MCD_remVariants.remXferSize[channel]));
- break;
- default:
- break;
- }
-
- return (MCD_OK);
-}
-
-/******************* End of MCD_XferProgrQuery() ********************/
-
-/********************************************************************/
-/* MCD_resmActions() does the majority of the actions of a DMA resume.
- * It is called from MCD_killDma() and MCD_resumeDma(). It has to be
- * a separate function because the kill function has to negate the task
- * enable before resuming it, but the resume function has to do nothing
- * if there is no DMA on that channel (i.e., if the enable bit is 0).
- */
-static void MCD_resmActions(int channel)
-{
- MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
- MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
- /* This register is selected to know which initiator is
- actually asserted. */
- MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
-
- if ((MCD_dmaBar->ptdDebug >> channel) & 0x1)
- MCD_chStatus[channel] = MCD_RUNNING;
- else
- MCD_chStatus[channel] = MCD_IDLE;
-}
-
-/********************* End of MCD_resmActions() *********************/
-
-/********************************************************************/
-/* Function: MCD_killDma
- * Purpose: Halt the DMA on the requested channel, without any
- * intention of resuming the DMA.
- * Arguments: channel - requested channel
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- *
- * Notes:
- * A DMA may be killed from any state, including paused state, and it
- * always goes to the MCD_HALTED state even if it is killed while in
- * the MCD_NO_DMA or MCD_IDLE states.
- */
-int MCD_killDma(int channel)
-{
- /* MCD_XferProg progRep; */
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- MCD_dmaBar->taskControl[channel] = 0x0;
- MCD_resumeDma(channel);
- /*
- * This must be after the write to the TCR so that the task doesn't
- * start up again momentarily, and before the status assignment so
- * as to override whatever MCD_resumeDma() may do to the channel
- * status.
- */
- MCD_chStatus[channel] = MCD_HALTED;
-
- /*
- * Update the current buffer descriptor's lastDestAddr field
- *
- * MCD_XferProgrQuery (channel, &progRep);
- * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
- */
- return (MCD_OK);
-}
-
-/************************ End of MCD_killDma() **********************/
-
-/********************************************************************/
-/* Function: MCD_continDma
- * Purpose: Continue a DMA which as stopped due to encountering an
- * unready buffer descriptor.
- * Arguments: channel - channel to continue the DMA on
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- *
- * Notes:
- * This routine does not check to see if there is a task which can
- * be continued. Also this routine should not be used with single DMAs.
- */
-int MCD_continDma(int channel)
-{
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
- MCD_chStatus[channel] = MCD_RUNNING;
-
- return (MCD_OK);
-}
-
-/********************** End of MCD_continDma() **********************/
-
-/*********************************************************************
- * MCD_pauseDma() and MCD_resumeDma() below use the DMA's debug unit
- * to freeze a task and resume it. We freeze a task by breakpointing
- * on the stated task. That is, not any specific place in the task,
- * but any time that task executes. In particular, when that task
- * executes, we want to freeze that task and only that task.
- *
- * The bits of the debug control register influence interrupts vs.
- * breakpoints as follows:
- * - Bits 14 and 0 enable or disable debug functions. If enabled, you
- * will get the interrupt but you may or may not get a breakpoint.
- * - Bits 2 and 1 decide whether you also get a breakpoint in addition
- * to an interrupt.
- *
- * The debug unit can do these actions in response to either internally
- * detected breakpoint conditions from the comparators, or in response
- * to the external breakpoint pin, or both.
- * - Bits 14 and 1 perform the above-described functions for
- * internally-generated conditions, i.e., the debug comparators.
- * - Bits 0 and 2 perform the above-described functions for external
- * conditions, i.e., the breakpoint external pin.
- *
- * Note that, although you "always" get the interrupt when you turn
- * the debug functions, the interrupt can nevertheless, if desired, be
- * masked by the corresponding bit in the PTD's IMR. Note also that
- * this means that bits 14 and 0 must enable debug functions before
- * bits 1 and 2, respectively, have any effect.
- *
- * NOTE: It's extremely important to not pause more than one DMA channel
- * at a time.
- ********************************************************************/
-
-/********************************************************************/
-/* Function: MCD_pauseDma
- * Purpose: Pauses the DMA on a given channel (if any DMA is running
- * on that channel).
- * Arguments: channel
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- */
-int MCD_pauseDma(int channel)
-{
- /* MCD_XferProg progRep; */
-
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) {
- MCD_dmaBar->debugComp1 = channel;
- MCD_dmaBar->debugControl =
- DBG_CTL_ENABLE | (1 << (channel + 16));
- MCD_chStatus[channel] = MCD_PAUSED;
-
- /*
- * Update the current buffer descriptor's lastDestAddr field
- *
- * MCD_XferProgrQuery (channel, &progRep);
- * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
- */
- }
- return (MCD_OK);
-}
-
-/************************* End of MCD_pauseDma() ********************/
-
-/********************************************************************/
-/* Function: MCD_resumeDma
- * Purpose: Resumes the DMA on a given channel (if any DMA is
- * running on that channel).
- * Arguments: channel - channel on which to resume DMA
- * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
- */
-int MCD_resumeDma(int channel)
-{
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
- MCD_resmActions(channel);
-
- return (MCD_OK);
-}
-
-/************************ End of MCD_resumeDma() ********************/
-
-/********************************************************************/
-/* Function: MCD_csumQuery
- * Purpose: Provide the checksum after performing a non-chained DMA
- * Arguments: channel - channel to report on
- * csum - pointer to where to write the checksum/CRC
- * Returns: MCD_ERROR if the channel is invalid, else MCD_OK
- *
- * Notes:
- *
- */
-int MCD_csumQuery(int channel, u32 * csum)
-{
-#ifdef MCD_INCLUDE_EU
- if ((channel < 0) || (channel >= NCHANNELS))
- return (MCD_CHANNEL_INVALID);
-
- *csum = MCD_relocBuffDesc[channel].csumResult;
- return (MCD_OK);
-#else
- return (MCD_ERROR);
-#endif
-}
-
-/*********************** End of MCD_resumeDma() *********************/
-
-/********************************************************************/
-/* Function: MCD_getCodeSize
- * Purpose: Provide the size requirements of the microcoded tasks
- * Returns: Size in bytes
- */
-int MCD_getCodeSize(void)
-{
-#ifdef MCD_INCLUDE_EU
- return (0x2b5c);
-#else
- return (0x173c);
-#endif
-}
-
-/********************** End of MCD_getCodeSize() ********************/
-
-/********************************************************************/
-/* Function: MCD_getVersion
- * Purpose: Provide the version string and number
- * Arguments: longVersion - user supplied pointer to a pointer to a char
- * which points to the version string
- * Returns: Version number and version string (by reference)
- */
-char MCD_versionString[] = "Multi-channel DMA API Alpha v0.3 (2004-04-26)";
-#define MCD_REV_MAJOR 0x00
-#define MCD_REV_MINOR 0x03
-
-int MCD_getVersion(char **longVersion)
-{
- *longVersion = MCD_versionString;
- return ((MCD_REV_MAJOR << 8) | MCD_REV_MINOR);
-}
-
-/********************** End of MCD_getVersion() *********************/
-
-/********************************************************************/
-/* Private version of memcpy()
- * Note that everything this is used for is longword-aligned.
- */
-static void MCD_memcpy(int *dest, int *src, u32 size)
-{
- u32 i;
-
- for (i = 0; i < size; i += sizeof(int), dest++, src++)
- *dest = *src;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-/* Contains task code and structures for Multi-channel DMA */
-
-#include <common.h>
-
-#include <MCD_dma.h>
-
-u32 MCD_varTab0[];
-u32 MCD_varTab1[];
-u32 MCD_varTab2[];
-u32 MCD_varTab3[];
-u32 MCD_varTab4[];
-u32 MCD_varTab5[];
-u32 MCD_varTab6[];
-u32 MCD_varTab7[];
-u32 MCD_varTab8[];
-u32 MCD_varTab9[];
-u32 MCD_varTab10[];
-u32 MCD_varTab11[];
-u32 MCD_varTab12[];
-u32 MCD_varTab13[];
-u32 MCD_varTab14[];
-u32 MCD_varTab15[];
-
-u32 MCD_funcDescTab0[];
-#ifdef MCD_INCLUDE_EU
-u32 MCD_funcDescTab1[];
-u32 MCD_funcDescTab2[];
-u32 MCD_funcDescTab3[];
-u32 MCD_funcDescTab4[];
-u32 MCD_funcDescTab5[];
-u32 MCD_funcDescTab6[];
-u32 MCD_funcDescTab7[];
-u32 MCD_funcDescTab8[];
-u32 MCD_funcDescTab9[];
-u32 MCD_funcDescTab10[];
-u32 MCD_funcDescTab11[];
-u32 MCD_funcDescTab12[];
-u32 MCD_funcDescTab13[];
-u32 MCD_funcDescTab14[];
-u32 MCD_funcDescTab15[];
-#endif
-
-u32 MCD_contextSave0[];
-u32 MCD_contextSave1[];
-u32 MCD_contextSave2[];
-u32 MCD_contextSave3[];
-u32 MCD_contextSave4[];
-u32 MCD_contextSave5[];
-u32 MCD_contextSave6[];
-u32 MCD_contextSave7[];
-u32 MCD_contextSave8[];
-u32 MCD_contextSave9[];
-u32 MCD_contextSave10[];
-u32 MCD_contextSave11[];
-u32 MCD_contextSave12[];
-u32 MCD_contextSave13[];
-u32 MCD_contextSave14[];
-u32 MCD_contextSave15[];
-
-u32 MCD_realTaskTableSrc[] = {
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab0, /* Task 0 Variable Table */
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave0, /* Task 0 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab1, /* Task 1 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab1, /* Task 1 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave1, /* Task 1 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab2, /* Task 2 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab2, /* Task 2 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave2, /* Task 2 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab3, /* Task 3 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab3, /* Task 3 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave3, /* Task 3 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab4, /* Task 4 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab4, /* Task 4 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave4, /* Task 4 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab5, /* Task 5 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab5, /* Task 5 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave5, /* Task 5 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab6, /* Task 6 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab6, /* Task 6 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave6, /* Task 6 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab7, /* Task 7 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab7, /* Task 7 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave7, /* Task 7 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab8, /* Task 8 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab8, /* Task 8 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave8, /* Task 8 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab9, /* Task 9 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab9, /* Task 9 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave9, /* Task 9 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab10, /* Task 10 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab10, /* Task 10 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave10, /* Task 10 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab11, /* Task 11 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab11, /* Task 11 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave11, /* Task 11 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab12, /* Task 12 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab12, /* Task 12 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave12, /* Task 12 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab13, /* Task 13 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab13, /* Task 13 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave13, /* Task 13 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab14, /* Task 14 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab14, /* Task 14 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave14, /* Task 14 context save space */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_varTab15, /* Task 15 Variable Table */
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_funcDescTab15, /* Task 15 Fn Desc. Table & Flags */
-#else
- (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
-#endif
- 0x00000000,
- 0x00000000,
- (u32) MCD_contextSave15, /* Task 15 context save space */
- 0x00000000,
-};
-
-u32 MCD_varTab0[] = { /* Task 0 Variable Table */
- 0x00000000, /* var[0] */
- 0x00000000, /* var[1] */
- 0x00000000, /* var[2] */
- 0x00000000, /* var[3] */
- 0x00000000, /* var[4] */
- 0x00000000, /* var[5] */
- 0x00000000, /* var[6] */
- 0x00000000, /* var[7] */
- 0x00000000, /* var[8] */
- 0x00000000, /* var[9] */
- 0x00000000, /* var[10] */
- 0x00000000, /* var[11] */
- 0x00000000, /* var[12] */
- 0x00000000, /* var[13] */
- 0x00000000, /* var[14] */
- 0x00000000, /* var[15] */
- 0x00000000, /* var[16] */
- 0x00000000, /* var[17] */
- 0x00000000, /* var[18] */
- 0x00000000, /* var[19] */
- 0x00000000, /* var[20] */
- 0x00000000, /* var[21] */
- 0x00000000, /* var[22] */
- 0x00000000, /* var[23] */
- 0xe0000000, /* inc[0] */
- 0x20000000, /* inc[1] */
- 0x2000ffff, /* inc[2] */
- 0x00000000, /* inc[3] */
- 0x00000000, /* inc[4] */
- 0x00000000, /* inc[5] */
- 0x00000000, /* inc[6] */
- 0x00000000, /* inc[7] */
-};
-
-u32 MCD_varTab1[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab2[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab3[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab4[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab5[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab6[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab7[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab8[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab9[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab10[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab11[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab12[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab13[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab14[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_varTab15[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xe0000000,
- 0x20000000,
- 0x2000ffff,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_funcDescTab0[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-#ifdef MCD_INCLUDE_EU
-u32 MCD_funcDescTab1[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab2[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab3[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab4[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab5[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab6[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab7[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab8[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab9[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab10[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab11[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab12[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab13[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab14[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-
-u32 MCD_funcDescTab15[] = {
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0xa0045670,
- 0xa0000000,
- 0xa0000000,
- 0x20000000,
- 0x21800000,
- 0x21e00000,
- 0x20400000,
- 0x20500000,
- 0x205a0000,
- 0x20a00000,
- 0x202fa000,
- 0x202f9000,
- 0x202ea000,
- 0x202da000,
- 0x202e2000,
- 0x202f2000,
-};
-#endif /*MCD_INCLUDE_EU */
-
-u32 MCD_contextSave0[128]; /* Task 0 context save space */
-u32 MCD_contextSave1[128]; /* Task 1 context save space */
-u32 MCD_contextSave2[128]; /* Task 2 context save space */
-u32 MCD_contextSave3[128]; /* Task 3 context save space */
-u32 MCD_contextSave4[128]; /* Task 4 context save space */
-u32 MCD_contextSave5[128]; /* Task 5 context save space */
-u32 MCD_contextSave6[128]; /* Task 6 context save space */
-u32 MCD_contextSave7[128]; /* Task 7 context save space */
-u32 MCD_contextSave8[128]; /* Task 8 context save space */
-u32 MCD_contextSave9[128]; /* Task 9 context save space */
-u32 MCD_contextSave10[128]; /* Task 10 context save space */
-u32 MCD_contextSave11[128]; /* Task 11 context save space */
-u32 MCD_contextSave12[128]; /* Task 12 context save space */
-u32 MCD_contextSave13[128]; /* Task 13 context save space */
-u32 MCD_contextSave14[128]; /* Task 14 context save space */
-u32 MCD_contextSave15[128]; /* Task 15 context save space */
-
-u32 MCD_ChainNoEu_TDT[];
-u32 MCD_SingleNoEu_TDT[];
-#ifdef MCD_INCLUDE_EU
-u32 MCD_ChainEu_TDT[];
-u32 MCD_SingleEu_TDT[];
-#endif
-u32 MCD_ENetRcv_TDT[];
-u32 MCD_ENetXmit_TDT[];
-
-u32 MCD_modelTaskTableSrc[] = {
- (u32) MCD_ChainNoEu_TDT,
- (u32) & ((u8 *) MCD_ChainNoEu_TDT)[0x0000016c],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_SingleNoEu_TDT,
- (u32) & ((u8 *) MCD_SingleNoEu_TDT)[0x000000d4],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-#ifdef MCD_INCLUDE_EU
- (u32) MCD_ChainEu_TDT,
- (u32) & ((u8 *) MCD_ChainEu_TDT)[0x000001b4],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_SingleEu_TDT,
- (u32) & ((u8 *) MCD_SingleEu_TDT)[0x00000124],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-#endif
- (u32) MCD_ENetRcv_TDT,
- (u32) & ((u8 *) MCD_ENetRcv_TDT)[0x0000009c],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- (u32) MCD_ENetXmit_TDT,
- (u32) & ((u8 *) MCD_ENetXmit_TDT)[0x000000d0],
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
-};
-
-u32 MCD_ChainNoEu_TDT[] = {
- 0x80004000,
- 0x8118801b,
- 0xb8c60018,
- 0x10002b10,
- 0x7000000d,
- 0x018cf89f,
- 0x6000000a,
- 0x080cf89f,
- 0x000001f8,
- 0x98180364,
- 0x8118801b,
- 0xf8c6001a,
- 0xb8c6601b,
- 0x10002710,
- 0x00000f18,
- 0xb8c6001d,
- 0x10001310,
- 0x60000007,
- 0x014cf88b,
- 0x98c6001c,
- 0x00000710,
- 0x98c70018,
- 0x10001f10,
- 0x0000c818,
- 0x000001f8,
- 0xc1476018,
- 0xc003231d,
- 0x811a601b,
- 0xc1862102,
- 0x849be009,
- 0x03fed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x1000cb20,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0xc1476018,
- 0xc003241d,
- 0x811a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc1862102,
- 0x849be009,
- 0x0bfed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x1000cb20,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88f,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0x8118801b,
- 0xd8c60018,
- 0x98c6601c,
- 0x6000000b,
- 0x0c8cfc9f,
- 0x000001f8,
- 0xa146001e,
- 0x10000b08,
- 0x10002050,
- 0xb8c60018,
- 0x10002b10,
- 0x7000000a,
- 0x080cf89f,
- 0x6000000d,
- 0x018cf89f,
- 0x000001f8,
- 0x8618801b,
- 0x7000000e,
- 0x084cf21f,
- 0xd8990336,
- 0x8019801b,
- 0x040001f8,
- 0x000001f8,
- 0x000001f8,
-};
-
-u32 MCD_SingleNoEu_TDT[] = {
- 0x8198001b,
- 0x7000000d,
- 0x080cf81f,
- 0x8198801b,
- 0x6000000e,
- 0x084cf85f,
- 0x000001f8,
- 0x8298001b,
- 0x7000000d,
- 0x010cf81f,
- 0x6000000e,
- 0x018cf81f,
- 0xc202601b,
- 0xc002221c,
- 0x809a601b,
- 0xc10420c2,
- 0x839be009,
- 0x03fed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000006,
- 0x088cf889,
- 0x1000cb28,
- 0x70000006,
- 0x088cf889,
- 0x1000cb30,
- 0x70000006,
- 0x088cf889,
- 0x0000cb38,
- 0x000001f8,
- 0xc202601b,
- 0xc002229c,
- 0x809a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc10420c2,
- 0x839be009,
- 0x0bfed7b8,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000006,
- 0x088cf889,
- 0x1000cb28,
- 0x70000006,
- 0x088cf889,
- 0x1000cb30,
- 0x70000006,
- 0x088cf889,
- 0x0000cb38,
- 0x000001f8,
- 0xc318022d,
- 0x8018801b,
- 0x040001f8,
-};
-
-#ifdef MCD_INCLUDE_EU
-u32 MCD_ChainEu_TDT[] = {
- 0x80004000,
- 0x8198801b,
- 0xb8c68018,
- 0x10002f10,
- 0x7000000d,
- 0x01ccf89f,
- 0x6000000a,
- 0x080cf89f,
- 0x000001f8,
- 0x981803a4,
- 0x8198801b,
- 0xf8c6801a,
- 0xb8c6e01b,
- 0x10002b10,
- 0x00001318,
- 0xb8c6801d,
- 0x10001710,
- 0x60000007,
- 0x018cf88c,
- 0x98c6801c,
- 0x00000b10,
- 0x98c78018,
- 0x10002310,
- 0x0000c820,
- 0x000001f8,
- 0x8698801b,
- 0x7000000f,
- 0x084cf2df,
- 0xd899042d,
- 0x8019801b,
- 0x60000003,
- 0x2cd7c7df,
- 0xd8990364,
- 0x8019801b,
- 0x60000003,
- 0x2c17c7df,
- 0x000001f8,
- 0xc1c7e018,
- 0xc003a35e,
- 0x819a601b,
- 0xc206a142,
- 0x851be009,
- 0x63fe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf81f,
- 0x1000cb20,
- 0x70000006,
- 0x088cf891,
- 0x1000cb28,
- 0x70000006,
- 0x088cf891,
- 0x1000cb30,
- 0x70000006,
- 0x088cf891,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0xc1c7e018,
- 0xc003a49e,
- 0x819a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc206a142,
- 0x851be009,
- 0x6bfe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf81f,
- 0x1000cb20,
- 0x70000006,
- 0x088cf891,
- 0x1000cb28,
- 0x70000006,
- 0x088cf891,
- 0x1000cb30,
- 0x70000006,
- 0x088cf891,
- 0x1000cb38,
- 0x0000c728,
- 0x000001f8,
- 0x8198801b,
- 0xd8c68018,
- 0x98c6e01c,
- 0x6000000b,
- 0x0c8cfc9f,
- 0x0000cc08,
- 0xa1c6801e,
- 0x10000f08,
- 0x10002458,
- 0xb8c68018,
- 0x10002f10,
- 0x7000000a,
- 0x080cf89f,
- 0x6000000d,
- 0x01ccf89f,
- 0x000001f8,
- 0x8698801b,
- 0x7000000e,
- 0x084cf25f,
- 0xd899037f,
- 0x8019801b,
- 0x040001f8,
- 0x000001f8,
- 0x000001f8,
-};
-
-u32 MCD_SingleEu_TDT[] = {
- 0x8218001b,
- 0x7000000d,
- 0x080cf81f,
- 0x8218801b,
- 0x6000000e,
- 0x084cf85f,
- 0x000001f8,
- 0x8318001b,
- 0x7000000d,
- 0x014cf81f,
- 0x6000000e,
- 0x01ccf81f,
- 0x8498001b,
- 0x7000000f,
- 0x080cf19f,
- 0xd81882a4,
- 0x8019001b,
- 0x60000003,
- 0x2c97c7df,
- 0xd818826d,
- 0x8019001b,
- 0x60000003,
- 0x2c17c7df,
- 0x000001f8,
- 0xc282e01b,
- 0xc002a25e,
- 0x811a601b,
- 0xc184a102,
- 0x841be009,
- 0x63fe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf99f,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88b,
- 0x0000cb38,
- 0x000001f8,
- 0xc282e01b,
- 0xc002a31e,
- 0x811a601b,
- 0xda9b001b,
- 0x9b9be01b,
- 0x0000d3a0,
- 0xc184a102,
- 0x841be009,
- 0x6bfe0000,
- 0x0d4cfddf,
- 0xda9b001b,
- 0x9b9be01b,
- 0x70000002,
- 0x004cf99f,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb28,
- 0x70000006,
- 0x088cf88b,
- 0x1000cb30,
- 0x70000006,
- 0x088cf88b,
- 0x0000cb38,
- 0x000001f8,
- 0x8144801c,
- 0x0000c008,
- 0xc398027f,
- 0x8018801b,
- 0x040001f8,
-};
-#endif
-u32 MCD_ENetRcv_TDT[] = {
- 0x80004000,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0x98180209,
- 0x81c40004,
- 0x7000000e,
- 0x010cf05f,
- 0x7000000c,
- 0x01ccf05f,
- 0x70000004,
- 0x014cf049,
- 0x70000004,
- 0x004cf04a,
- 0x00000b88,
- 0xc4030150,
- 0x8119e012,
- 0x03e0cf90,
- 0x81188000,
- 0x000ac788,
- 0xc4030000,
- 0x8199e000,
- 0x70000004,
- 0x084cfc8b,
- 0x60000005,
- 0x0cccf841,
- 0x81c60000,
- 0xc399021b,
- 0x80198000,
- 0x00008400,
- 0x00000f08,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0xc2188209,
- 0x80190000,
- 0x040001f8,
- 0x000001f8,
-};
-
-u32 MCD_ENetXmit_TDT[] = {
- 0x80004000,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0x98180309,
- 0x80004003,
- 0x81c60004,
- 0x7000000e,
- 0x014cf05f,
- 0x7000000c,
- 0x028cf05f,
- 0x7000000d,
- 0x018cf05f,
- 0x70000004,
- 0x01ccf04d,
- 0x10000b90,
- 0x60000004,
- 0x020cf0a1,
- 0xc3188312,
- 0x83c70000,
- 0x00001f10,
- 0xc583a3c3,
- 0x81042325,
- 0x03e0c798,
- 0xd8990000,
- 0x9999e000,
- 0x000acf98,
- 0xd8992306,
- 0x9999e03f,
- 0x03eac798,
- 0xd8990000,
- 0x9999e000,
- 0x000acf98,
- 0xd8990000,
- 0x99832302,
- 0x0beac798,
- 0x81988000,
- 0x6000000b,
- 0x0c4cfc5f,
- 0x81c80000,
- 0xc5190312,
- 0x80198000,
- 0x00008400,
- 0x00000f08,
- 0x81988000,
- 0x10000788,
- 0x6000000a,
- 0x080cf05f,
- 0xc2988309,
- 0x80190000,
- 0x040001f8,
- 0x000001f8,
-};
-
-#ifdef MCD_INCLUDE_EU
-MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
-#endif
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-
-/* Functions for initializing variable tables of different types of tasks. */
-
-/*
- * Do not edit!
- */
-
-#include <MCD_dma.h>
-
-extern dmaRegs *MCD_dmaBar;
-
-/* Task 0 */
-
-void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 2, (u32) currBD); /* var[2] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 11, (u32) xferSize); /* var[11] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 3, (u32) 0x00000000); /* var[3] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000000); /* var[10] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x00000000); /* var[12] */
- MCD_SET_VAR(taskChan, 13, (u32) 0x80000000); /* var[13] */
- MCD_SET_VAR(taskChan, 14, (u32) 0x00000010); /* var[14] */
- MCD_SET_VAR(taskChan, 15, (u32) 0x00000004); /* var[15] */
- MCD_SET_VAR(taskChan, 16, (u32) 0x08000000); /* var[16] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0x80000000); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x80000001); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x40000000); /* inc[6] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 1 */
-
-void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 7, (u32) srcAddr); /* var[7] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 2, (u32) destAddr); /* var[2] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 3, (u32) dmaSize); /* var[3] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 5, (u32) flags); /* var[5] */
- MCD_SET_VAR(taskChan, 1, (u32) currBD); /* var[1] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000004); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x08000000); /* var[10] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0x80000001); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x40000000); /* inc[5] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 2 */
-
-void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 3, (u32) currBD); /* var[3] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 12, (u32) xferSize); /* var[12] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 2, (u32) 0x00000000); /* var[2] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000000); /* var[10] */
- MCD_SET_VAR(taskChan, 11, (u32) 0x00000000); /* var[11] */
- MCD_SET_VAR(taskChan, 13, (u32) 0x00000000); /* var[13] */
- MCD_SET_VAR(taskChan, 14, (u32) 0x80000000); /* var[14] */
- MCD_SET_VAR(taskChan, 15, (u32) 0x00000010); /* var[15] */
- MCD_SET_VAR(taskChan, 16, (u32) 0x00000001); /* var[16] */
- MCD_SET_VAR(taskChan, 17, (u32) 0x00000004); /* var[17] */
- MCD_SET_VAR(taskChan, 18, (u32) 0x08000000); /* var[18] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0x80000000); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0xc0000000); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x80000001); /* inc[6] */
- MCD_SET_VAR(taskChan, 31, (u32) 0x40000000); /* inc[7] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 3 */
-
-void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 8, (u32) srcAddr); /* var[8] */
- MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
- MCD_SET_VAR(taskChan, 3, (u32) destAddr); /* var[3] */
- MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
- MCD_SET_VAR(taskChan, 4, (u32) dmaSize); /* var[4] */
- MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
- MCD_SET_VAR(taskChan, 6, (u32) flags); /* var[6] */
- MCD_SET_VAR(taskChan, 2, (u32) currBD); /* var[2] */
- MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000001); /* var[10] */
- MCD_SET_VAR(taskChan, 11, (u32) 0x00000004); /* var[11] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x08000000); /* var[12] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x00000000); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0xc0000000); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x80000000); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x80000001); /* inc[6] */
- MCD_SET_VAR(taskChan, 31, (u32) 0x40000000); /* inc[7] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 4 */
-
-void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 0, (u32) bDBase); /* var[0] */
- MCD_SET_VAR(taskChan, 3, (u32) currBD); /* var[3] */
- MCD_SET_VAR(taskChan, 6, (u32) rcvFifoPtr); /* var[6] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 2, (u32) 0x00000000); /* var[2] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x0000ffff); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x30000000); /* var[10] */
- MCD_SET_VAR(taskChan, 11, (u32) 0x0fffffff); /* var[11] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x00000008); /* var[12] */
- MCD_SET_VAR(taskChan, 24, (u32) 0x00000000); /* inc[0] */
- MCD_SET_VAR(taskChan, 25, (u32) 0x60000000); /* inc[1] */
- MCD_SET_VAR(taskChan, 26, (u32) 0x20000004); /* inc[2] */
- MCD_SET_VAR(taskChan, 27, (u32) 0x40000000); /* inc[3] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
-
-/* Task 5 */
-
-void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr,
- volatile TaskTableEntry * taskTable, int channel)
-{
- volatile TaskTableEntry *taskChan = taskTable + channel;
-
- MCD_SET_VAR(taskChan, 0, (u32) bDBase); /* var[0] */
- MCD_SET_VAR(taskChan, 3, (u32) currBD); /* var[3] */
- MCD_SET_VAR(taskChan, 11, (u32) xmitFifoPtr); /* var[11] */
- MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */
- MCD_SET_VAR(taskChan, 2, (u32) 0x00000000); /* var[2] */
- MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */
- MCD_SET_VAR(taskChan, 5, (u32) 0x00000000); /* var[5] */
- MCD_SET_VAR(taskChan, 6, (u32) 0x00000000); /* var[6] */
- MCD_SET_VAR(taskChan, 7, (u32) 0x00000000); /* var[7] */
- MCD_SET_VAR(taskChan, 8, (u32) 0x00000000); /* var[8] */
- MCD_SET_VAR(taskChan, 9, (u32) 0x00000000); /* var[9] */
- MCD_SET_VAR(taskChan, 10, (u32) 0x00000000); /* var[10] */
- MCD_SET_VAR(taskChan, 12, (u32) 0x00000000); /* var[12] */
- MCD_SET_VAR(taskChan, 13, (u32) 0x0000ffff); /* var[13] */
- MCD_SET_VAR(taskChan, 14, (u32) 0xffffffff); /* var[14] */
- MCD_SET_VAR(taskChan, 15, (u32) 0x00000004); /* var[15] */
- MCD_SET_VAR(taskChan, 16, (u32) 0x00000008); /* var[16] */
- MCD_SET_VAR(taskChan, 24, (u32) 0x00000000); /* inc[0] */
- MCD_SET_VAR(taskChan, 25, (u32) 0x60000000); /* inc[1] */
- MCD_SET_VAR(taskChan, 26, (u32) 0x40000000); /* inc[2] */
- MCD_SET_VAR(taskChan, 27, (u32) 0xc000fffc); /* inc[3] */
- MCD_SET_VAR(taskChan, 28, (u32) 0xe0000004); /* inc[4] */
- MCD_SET_VAR(taskChan, 29, (u32) 0x80000000); /* inc[5] */
- MCD_SET_VAR(taskChan, 30, (u32) 0x4000ffff); /* inc[6] */
- MCD_SET_VAR(taskChan, 31, (u32) 0xe0000001); /* inc[7] */
-
- /* Set the task's Enable bit in its Task Control Register */
- MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
-}
obj-$(CONFIG_DMA) += dma-uclass.o
-obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
obj-$(CONFIG_APBH_DMA) += apbh_dma.o
obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o
obj-$(CONFIG_FSL_DMA) += fsl_dma.o
menu "Fastboot support"
+ depends on CMDLINE
config FASTBOOT
bool
*/
int __weak fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
+ int ret;
static const char * const boot_cmds[] = {
[FASTBOOT_REBOOT_REASON_BOOTLOADER] = "bootonce-bootloader",
[FASTBOOT_REBOOT_REASON_FASTBOOTD] = "boot-fastboot",
if (reason >= FASTBOOT_REBOOT_REASONS_COUNT)
return -EINVAL;
- return bcb_write_reboot_reason(mmc_dev, "misc", boot_cmds[reason]);
+ ret = bcb_find_partition_and_load("mmc", mmc_dev, "misc");
+ if (ret)
+ goto out;
+
+ ret = bcb_set(BCB_FIELD_COMMAND, boot_cmds[reason]);
+ if (ret)
+ goto out;
+
+ ret = bcb_store();
+out:
+ bcb_reset();
+ return ret;
}
/**
#include <linux/err.h>
#include <linux/io.h>
#include <linux/printk.h>
+#include <linux/time.h>
/* STM32 I2C registers */
struct stm32_i2c_regs {
#define STM32_SCLH_MAX BIT(8)
#define STM32_SCLL_MAX BIT(8)
-#define STM32_NSEC_PER_SEC 1000000000L
-
/**
* struct stm32_i2c_spec - private i2c specification timing
* @rate: I2C bus speed (Hz)
struct stm32_i2c_timings *s)
{
struct stm32_i2c_timings *v;
- u32 i2cbus = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC,
+ u32 i2cbus = DIV_ROUND_CLOSEST(NSEC_PER_SEC,
setup->speed_freq);
u32 clk_error_prev = i2cbus;
u32 clk_min, clk_max;
dnf_delay = setup->dnf * i2cclk;
tsync = af_delay_min + dnf_delay + (2 * i2cclk);
- clk_max = STM32_NSEC_PER_SEC / specs->rate_min;
- clk_min = STM32_NSEC_PER_SEC / specs->rate_max;
+ clk_max = NSEC_PER_SEC / specs->rate_min;
+ clk_min = NSEC_PER_SEC / specs->rate_max;
/*
* Among Prescaler possibilities discovered above figures out SCL Low
const struct stm32_i2c_spec *specs;
struct stm32_i2c_timings *v, *_v;
struct list_head solutions;
- u32 i2cclk = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC, setup->clock_src);
+ u32 i2cclk = DIV_ROUND_CLOSEST(NSEC_PER_SEC, setup->clock_src);
int ret;
specs = get_specs(setup->speed_freq);
#include <linux/err.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
+#include <linux/time.h>
/* FMC2 Controller Registers */
#define FMC2_BCR1 0x0
#define FMC2_BTR_DATLAT_MAX 0xf
#define FMC2_PCSCNTR_CSCOUNT_MAX 0xff
-#define FMC2_NSEC_PER_SEC 1000000000L
-
enum stm32_fmc2_ebi_bank {
FMC2_EBI1 = 0,
FMC2_EBI2,
int cs, u32 setup)
{
unsigned long hclk = clk_get_rate(&ebi->clk);
- unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+ unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
return DIV_ROUND_UP(setup * 1000, hclkp);
}
*/
#define MMC_TIMEOUT_SHORT 20
-#define NSEC_PER_SEC 1000000000L
-
#define MAX_NO_OF_TAPS 64
#define EXT_CSD_POWER_CLASS 187 /* R/W */
else
ifneq ($(mtd-y),)
-obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd.o
+obj-$(CONFIG_SPL_MTD) += mtd.o
endif
obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += nand/
obj-$(CONFIG_SPL_ONENAND_SUPPORT) += onenand/
This enables the driver for the NAND flash device found on
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
+config NAND_SANDBOX
+ bool "Support for NAND in sandbox"
+ depends on SANDBOX
+ select SYS_NAND_SELF_INIT
+ select SPL_SYS_NAND_SELF_INIT
+ select SPL_NAND_INIT
+ select SYS_NAND_SOFT_ECC
+ select BCH
+ select NAND_ECC_BCH
+ imply CMD_NAND
+ help
+ Enable a dummy NAND driver for sandbox. It simulates any number of
+ arbitrary NAND chips with a RAM buffer. It will also inject errors to
+ test ECC. At the moment, only 8-bit busses and single-chip devices are
+ supported.
+
config NAND_SUNXI
bool "Support for NAND on Allwinner SoCs"
default ARCH_SUNXI
And fetching device parameters flashed on device, by parsing
ONFI parameter page.
-config SYS_NAND_PAGE_COUNT
- hex "NAND chip page count"
- depends on SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC || \
- SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE || \
- NAND_OMAP_GPMC)
- help
- Number of pages in the NAND chip.
-
config SYS_NAND_PAGE_SIZE
hex "NAND chip page size"
depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
MVEBU_SPL_BOOT_DEVICE_NAND || \
- (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
+ (NAND_ATMEL && SPL_NAND_SUPPORT) || \
+ SPL_GENERATE_ATMEL_PMECC_HEADER || NAND_SANDBOX
depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621
help
Number of data bytes in one page for the NAND chip on the
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
+obj-$(CONFIG_NAND_SANDBOX) += sand_nand.o
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
obj-$(CONFIG_NAND_MXIC) += mxic_nand.o
obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
#include <common.h>
#include <nand.h>
+#include <system-constants.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/mtd/nand_ecc.h>
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
nand_command(0, 0, 0, NAND_CMD_RESET);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
/* Unselect after operation */
void nand_deselect(void)
{
#include <linux/mfd/syscon/atmel-smc.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
+#include <linux/time.h>
#include <mach/at91_sfr.h>
#include <nand.h>
#include <regmap.h>
#include "pmecc.h"
-#define NSEC_PER_SEC 1000000000L
-
#define ATMEL_HSMC_NFC_CFG 0x0
#define ATMEL_HSMC_NFC_CFG_SPARESIZE(x) (((x) / 4) << 24)
#define ATMEL_HSMC_NFC_CFG_SPARESIZE_MASK GENMASK(30, 24)
#include <common.h>
#include <log.h>
+#include <system-constants.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
#include <dm/device_compat.h>
static int nand_command(int block, int page, uint32_t offs, u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
if (nand_chip.select_chip)
nand_chip.select_chip(mtd, 0);
- page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ page_addr = page + block * SYS_NAND_BLOCK_PAGES;
hwctrl(mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Row address */
hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
nand_chip.select_chip(mtd, 0);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
void nand_deselect(void)
{
if (nand_chip.select_chip)
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return page_size;
+}
+
void nand_deselect(void) {}
return __raw_readw((u16 *)marker) != 0xffff;
}
+static int saved_page_size;
+
int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
{
struct fsl_ifc_fcm *gregs = (void *)CFG_SYS_IFC_ADDR;
if (port_size == 8)
bad_marker = 5;
}
+ saved_page_size = page_size;
ver = ifc_in32(&gregs->ifc_rev);
if (ver >= FSL_IFC_V2_0_0)
{
}
+unsigned int nand_page_size(void)
+{
+ return saved_page_size;
+}
+
void nand_deselect(void)
{
}
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return BYTES_PER_PAGE;
+}
+
#endif /* CONFIG_SPL_BUILD */
return SZ_2G;
}
+unsigned int nand_page_size(void)
+{
+ return nfc_dev.nand.mtd.writesize;
+}
+
void nand_deselect(void)
{
}
#include <common.h>
#include <hang.h>
#include <nand.h>
+#include <system-constants.h>
#include <linux/mtd/rawnand.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
* Check if we have crossed a block boundary, and if so
* check for bad block.
*/
- if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
+ if (!(page % SYS_NAND_BLOCK_PAGES)) {
/*
* Yes, new block. See if this block is good. If not,
* loop until we find a good block.
*/
while (is_badblock(page)) {
- page = page + CONFIG_SYS_NAND_PAGE_COUNT;
+ page = page + SYS_NAND_BLOCK_PAGES;
/* Check i we've reached the end of flash. */
if (page >= maxpages)
return -1;
void nand_init(void) {}
void nand_deselect(void) {}
+
+unsigned int nand_page_size(void)
+{
+ return CONFIG_SYS_NAND_PAGE_SIZE;
+}
#include <linux/errno.h>
#include <linux/mtd/rawnand.h>
#include <linux/sizes.h>
+#include <linux/time.h>
#include <linux/types.h>
#include <linux/math64.h>
#endif
#define MXS_NAND_BCH_TIMEOUT 10000
-#define USEC_PER_SEC 1000000
-#define NSEC_PER_SEC 1000000000L
#define TO_CYCLES(duration, period) DIV_ROUND_UP_ULL(duration, period)
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
void nand_deselect(void)
{
}
sprintf(dev_name[devnum], "nand%d", devnum);
mtd->name = dev_name[devnum];
-#ifdef CONFIG_MTD
/*
* Add MTD device so that we can reference it later
* via the mtdcore infrastructure (e.g. ubi).
*/
add_mtd_device(mtd);
-#endif
total_nand_size += mtd->size / 1024;
return 0;
}
+void nand_unregister(struct mtd_info *mtd)
+{
+ int devnum = nand_mtd_to_devnum(mtd);
+
+ if (devnum < 0)
+ return;
+
+ if (nand_curr_device == devnum)
+ nand_curr_device = -1;
+
+ total_nand_size -= mtd->size / 1024;
+
+ del_mtd_device(nand_info[devnum]);
+
+ nand_info[devnum] = NULL;
+}
+
#if !CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
static void nand_init_chip(int i)
{
#endif
#ifdef CONFIG_MTD_CONCAT
+struct mtd_info *concat_mtd;
+
static void create_mtd_concat(void)
{
struct mtd_info *nand_info_list[CONFIG_SYS_MAX_NAND_DEVICE];
}
}
if (nand_devices_found > 1) {
- struct mtd_info *mtd;
char c_mtd_name[16];
/*
* We detected multiple devices. Concatenate them together.
*/
sprintf(c_mtd_name, "nand%d", nand_devices_found);
- mtd = mtd_concat_create(nand_info_list, nand_devices_found,
- c_mtd_name);
+ concat_mtd = mtd_concat_create(nand_info_list,
+ nand_devices_found, c_mtd_name);
- if (mtd == NULL)
+ if (!concat_mtd)
return;
- nand_register(nand_devices_found, mtd);
+ nand_register(nand_devices_found, concat_mtd);
}
return;
}
+
+static void destroy_mtd_concat(void)
+{
+ if (!concat_mtd)
+ return;
+
+ mtd_concat_destroy(concat_mtd);
+ concat_mtd = NULL;
+}
#else
static void create_mtd_concat(void)
{
}
+
+static void destroy_mtd_concat(void)
+{
+}
#endif
unsigned long nand_size(void)
return total_nand_size;
}
+static int initialized;
+
void nand_init(void)
{
- static int initialized;
-
/*
* Avoid initializing NAND Flash multiple times,
* otherwise it will calculate a wrong total size.
create_mtd_concat();
}
+
+void nand_reinit(void)
+{
+ int i;
+
+ destroy_mtd_concat();
+ for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
+ assert(!nand_info[i]);
+
+ initialized = 0;
+ nand_init();
+}
+
+unsigned int nand_page_size(void)
+{
+ struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
+
+ return mtd ? mtd->writesize : 1;
+}
else if (chip->jedec_version)
pr_info("%s %s\n", manufacturer_desc->name,
chip->jedec_params.model);
- else
+ else if (manufacturer_desc)
pr_info("%s %s\n", manufacturer_desc->name, type->name);
#else
if (chip->jedec_version)
pr_info("%s %s\n", manufacturer_desc->name,
chip->jedec_params.model);
- else
+ else if (manufacturer_desc)
pr_info("%s %s\n", manufacturer_desc->name, type->name);
-
- pr_info("%s %s\n", manufacturer_desc->name,
- type->name);
#endif
pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
while (block <= lastblock) {
if (!nand_is_bad_block(block)) {
/* Skip bad blocks */
- while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
+ while (size && page < SYS_NAND_BLOCK_PAGES) {
nand_read_page(block, page, dst);
+
+ size -= min(size, CONFIG_SYS_NAND_PAGE_SIZE -
+ page_offset);
/*
* When offs is not aligned to page address the
* extra offset is copied to dst as well. Copy
#include <common.h>
#include <nand.h>
+#include <system-constants.h>
#include <asm/io.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/rawnand.h>
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
while (!this->dev_ready(mtd))
;
u8 cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
- int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ int page_addr = page + block * SYS_NAND_BLOCK_PAGES;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
nand_chip.select_chip(mtd, 0);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
/* Unselect after operation */
void nand_deselect(void)
{
#include <linux/mtd/nand_bch.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/rawnand.h>
+#include <linux/time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/types.h>
#define OCTEONTX_NAND_DRIVER_NAME "octeontx_nand"
#define NDF_TIMEOUT 1000 /** Timeout in ms */
-#define USEC_PER_SEC 1000000 /** Linux compatibility */
#ifndef NAND_MAX_CHIPS
# define NAND_MAX_CHIPS 8 /** Linux compatibility */
#endif
#include <common.h>
#include <log.h>
+#include <system-constants.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <linux/errno.h>
static int nand_read_page(int block, int page, uchar *dst)
{
- int page_addr = block * CONFIG_SYS_NAND_PAGE_COUNT + page;
+ int page_addr = block * SYS_NAND_BLOCK_PAGES + page;
loff_t ofs = page_addr * CONFIG_SYS_NAND_PAGE_SIZE;
int ret;
size_t len = CONFIG_SYS_NAND_PAGE_SIZE;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) Sean Anderson <seanga2@gmail.com>
+ */
+
+#define LOG_CATEGORY UCLASS_MTD
+#include <errno.h>
+#include <hexdump.h>
+#include <log.h>
+#include <nand.h>
+#include <os.h>
+#include <rand.h>
+#include <spl.h>
+#include <system-constants.h>
+#include <dm/device_compat.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <asm/bitops.h>
+#include <linux/bitmap.h>
+#include <linux/mtd/rawnand.h>
+#include <linux/sizes.h>
+
+enum sand_nand_state {
+ STATE_READY,
+ STATE_IDLE,
+ STATE_READ,
+ STATE_READ_ID,
+ STATE_READ_ONFI,
+ STATE_PARAM_ONFI,
+ STATE_STATUS,
+ STATE_PROG,
+ STATE_ERASE,
+};
+
+static const char *const state_name[] = {
+ [STATE_READY] = "READY",
+ [STATE_IDLE] = "IDLE",
+ [STATE_READ] = "READ",
+ [STATE_READ_ID] = "READ_ID",
+ [STATE_READ_ONFI] = "READ_ONFI",
+ [STATE_PARAM_ONFI] = "PARAM_ONFI",
+ [STATE_STATUS] = "STATUS",
+ [STATE_PROG] = "PROG",
+ [STATE_ERASE] = "ERASE",
+};
+
+/**
+ * struct sand_nand_chip - Per-device private data
+ * @nand: The nand chip
+ * @node: The next device in this controller
+ * @programmed: Bitmap of whether sectors are programmed
+ * @id: ID to report for NAND_CMD_READID
+ * @id_len: Length of @id
+ * @onfi: Three copies of ONFI parameter page
+ * @status: Status to report for NAND_CMD_STATUS
+ * @chunksize: Size of one "chunk" (page + oob) in bytes
+ * @pageize: Size of one page in bytes
+ * @pages: Total number of pages
+ * @pages_per_erase: Number of pages per eraseblock
+ * @err_count: Number of errors to inject per @err_step_bits of data
+ * @err_step_bits: Number of data bits per error "step"
+ * @err_steps: Number of err steps in a page
+ * @cs: Chip select for this device
+ * @state: Current state of the device
+ * @column: Column of the most-recent command
+ * @page_addr: Page address of the most-recent command
+ * @fd: File descriptor for the backing data
+ * @fd_page_addr: Page address that @fd is seek'd to
+ * @selected: Whether this device is selected
+ * @tmp: "Cache" buffer used to store transferred data before committing it
+ * @tmp_dirty: Whether @tmp is dirty (modified) or clean (all ones)
+ *
+ * Data is stored with the OOB area in-line. For example, with 512-byte pages
+ * and and 16-byte OOB areas, the first page would start at offset 0, the second
+ * at offset 528, the third at offset 1056, and so on
+ */
+struct sand_nand_chip {
+ struct nand_chip nand;
+ struct list_head node;
+ long *programmed;
+ const u8 *id;
+ u32 chunksize, pagesize, pages, pages_per_erase;
+ u32 err_count, err_step_bits, err_steps, ecc_bits;
+ unsigned int cs;
+ enum sand_nand_state state;
+ int column, page_addr, fd, fd_page_addr;
+ bool selected, tmp_dirty;
+ u8 status;
+ u8 id_len;
+ u8 tmp[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
+ u8 onfi[sizeof(struct nand_onfi_params) * 3];
+};
+
+#define SAND_DEBUG(chip, fmt, ...) \
+ dev_dbg((chip)->nand.mtd.dev, "%u (%s): " fmt, (chip)->cs, \
+ state_name[(chip)->state], ##__VA_ARGS__)
+
+static inline void to_state(struct sand_nand_chip *chip,
+ enum sand_nand_state new_state)
+{
+ if (new_state != chip->state)
+ SAND_DEBUG(chip, "to state %s\n", state_name[new_state]);
+ chip->state = new_state;
+}
+
+static inline struct sand_nand_chip *to_sand_nand(struct nand_chip *nand)
+{
+ return container_of(nand, struct sand_nand_chip, nand);
+}
+
+struct sand_nand_priv {
+ struct list_head chips;
+};
+
+static int sand_nand_dev_ready(struct mtd_info *mtd)
+{
+ return 1;
+}
+
+static int sand_nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
+{
+ u8 status;
+
+ return nand_status_op(chip, &status) ?: status;
+}
+
+static int sand_nand_seek(struct sand_nand_chip *chip)
+{
+ if (chip->fd_page_addr == chip->page_addr)
+ return 0;
+
+ if (os_lseek(chip->fd, (off_t)chip->page_addr * chip->chunksize,
+ OS_SEEK_SET) < 0) {
+ SAND_DEBUG(chip, "could not seek: %d\n", errno);
+ return -EIO;
+ }
+
+ chip->fd_page_addr = chip->page_addr;
+ return 0;
+}
+
+static void sand_nand_inject_error(struct sand_nand_chip *chip,
+ unsigned int step, unsigned int pos)
+{
+ int byte, index;
+
+ if (pos < chip->err_step_bits) {
+ __change_bit(step * chip->err_step_bits + pos, chip->tmp);
+ return;
+ }
+
+ /*
+ * Only ECC bytes are covered in the OOB area, so
+ * pretend that those are the only bytes which can have
+ * errors.
+ */
+ byte = (pos - chip->err_step_bits + step * chip->ecc_bits) / 8;
+ index = chip->nand.ecc.layout->eccpos[byte];
+ /* Avoid endianness issues by working with bytes */
+ chip->tmp[chip->pagesize + index] ^= BIT(pos & 0x7);
+}
+
+static int sand_nand_read(struct sand_nand_chip *chip)
+{
+ unsigned int i, stop = 0;
+
+ if (chip->column == chip->pagesize)
+ stop = chip->err_step_bits;
+
+ if (test_bit(chip->page_addr, chip->programmed)) {
+ if (sand_nand_seek(chip))
+ return -EIO;
+
+ if (os_read(chip->fd, chip->tmp, chip->chunksize) !=
+ chip->chunksize) {
+ SAND_DEBUG(chip, "could not read: %d\n", errno);
+ return -EIO;
+ }
+ chip->fd_page_addr++;
+ } else if (chip->tmp_dirty) {
+ memset(chip->tmp + chip->column, 0xff,
+ chip->chunksize - chip->column);
+ }
+
+ /*
+ * Inject some errors; this is Method A from "An Efficient Algorithm for
+ * Sequential Random Sampling" (Vitter 87). This is still slow when
+ * generating a lot (dozens) of ECC errors.
+ *
+ * To avoid generating too many errors in any one ECC step, we separate
+ * our error generation by ECC step.
+ */
+ chip->tmp_dirty = true;
+ for (i = 0; i < chip->err_steps; i++) {
+ u32 bit_errors = chip->err_count;
+ unsigned int j = chip->err_step_bits + chip->ecc_bits;
+
+ while (bit_errors) {
+ unsigned int u = rand();
+ float quot = 1ULL << 32;
+
+ do {
+ quot *= j - bit_errors;
+ quot /= j;
+ j--;
+
+ if (j < stop)
+ goto next;
+ } while (u < quot);
+
+ sand_nand_inject_error(chip, i, j);
+ bit_errors--;
+ }
+next:
+ ;
+ }
+
+ return 0;
+}
+
+static void sand_nand_command(struct mtd_info *mtd, unsigned int command,
+ int column, int page_addr)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+ enum sand_nand_state new_state = chip->state;
+
+ SAND_DEBUG(chip, "command=%02x column=%d page_addr=%d\n", command,
+ column, page_addr);
+
+ if (!chip->selected)
+ return;
+
+ switch (chip->state) {
+ case STATE_READY:
+ if (command == NAND_CMD_RESET)
+ goto reset;
+ break;
+ case STATE_PROG:
+ new_state = STATE_IDLE;
+ if (command != NAND_CMD_PAGEPROG ||
+ test_and_set_bit(chip->page_addr, chip->programmed)) {
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ if (sand_nand_seek(chip)) {
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ if (os_write(chip->fd, chip->tmp, chip->chunksize) !=
+ chip->chunksize) {
+ SAND_DEBUG(chip, "could not write: %d\n", errno);
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ chip->fd_page_addr++;
+ break;
+ case STATE_ERASE:
+ new_state = STATE_IDLE;
+ if (command != NAND_CMD_ERASE2) {
+ chip->status |= NAND_STATUS_FAIL;
+ break;
+ }
+
+ if (chip->page_addr < 0 ||
+ chip->page_addr >= chip->pages ||
+ chip->page_addr % chip->pages_per_erase)
+ chip->status |= NAND_STATUS_FAIL;
+ else
+ bitmap_clear(chip->programmed, chip->page_addr,
+ chip->pages_per_erase);
+ break;
+ default:
+ chip->column = column;
+ chip->page_addr = page_addr;
+ switch (command) {
+ case NAND_CMD_READOOB:
+ if (column >= 0)
+ chip->column += chip->pagesize;
+ fallthrough;
+ case NAND_CMD_READ0:
+ new_state = STATE_IDLE;
+ if (page_addr < 0 || page_addr >= chip->pages)
+ break;
+
+ if (chip->column < 0 || chip->column >= chip->chunksize)
+ break;
+
+ if (sand_nand_read(chip))
+ break;
+
+ chip->page_addr = page_addr;
+ new_state = STATE_READ;
+ break;
+ case NAND_CMD_ERASE1:
+ new_state = STATE_ERASE;
+ chip->status = ~NAND_STATUS_FAIL;
+ break;
+ case NAND_CMD_STATUS:
+ new_state = STATE_STATUS;
+ chip->column = 0;
+ break;
+ case NAND_CMD_SEQIN:
+ new_state = STATE_PROG;
+ chip->status = ~NAND_STATUS_FAIL;
+ if (page_addr < 0 || page_addr >= chip->pages ||
+ chip->column < 0 ||
+ chip->column >= chip->chunksize) {
+ chip->status |= NAND_STATUS_FAIL;
+ } else if (chip->tmp_dirty) {
+ memset(chip->tmp, 0xff, chip->chunksize);
+ chip->tmp_dirty = false;
+ }
+ break;
+ case NAND_CMD_READID:
+ if (chip->onfi[0] && column == 0x20)
+ new_state = STATE_READ_ONFI;
+ else
+ new_state = STATE_READ_ID;
+ chip->column = 0;
+ break;
+ case NAND_CMD_PARAM:
+ if (chip->onfi[0] && !column)
+ new_state = STATE_PARAM_ONFI;
+ else
+ new_state = STATE_IDLE;
+ break;
+ case NAND_CMD_RESET:
+reset:
+ new_state = STATE_IDLE;
+ chip->column = -1;
+ chip->page_addr = -1;
+ chip->status = ~NAND_STATUS_FAIL;
+ break;
+ default:
+ new_state = STATE_IDLE;
+ SAND_DEBUG(chip, "Unsupported command %02x\n", command);
+ }
+ }
+
+ to_state(chip, new_state);
+}
+
+static void sand_nand_select_chip(struct mtd_info *mtd, int n)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+
+ chip->selected = !n;
+}
+
+static void sand_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+ unsigned int to_copy;
+ int src_len = 0;
+ const u8 *src = NULL;
+
+ if (!chip->selected)
+ goto copy;
+
+ switch (chip->state) {
+ case STATE_READ:
+ src = chip->tmp;
+ src_len = chip->chunksize;
+ break;
+ case STATE_READ_ID:
+ src = chip->id;
+ src_len = chip->id_len;
+ break;
+ case STATE_READ_ONFI:
+ src = "ONFI";
+ src_len = 4;
+ break;
+ case STATE_PARAM_ONFI:
+ src = chip->onfi;
+ src_len = sizeof(chip->onfi);
+ break;
+ case STATE_STATUS:
+ src = &chip->status;
+ src_len = 1;
+ break;
+ default:
+ break;
+ }
+
+copy:
+ if (chip->column >= 0)
+ to_copy = max(min(len, src_len - chip->column), 0);
+ else
+ to_copy = 0;
+ memcpy(buf, src + chip->column, to_copy);
+ memset(buf + to_copy, 0xff, len - to_copy);
+ chip->column += to_copy;
+
+ if (len == 1) {
+ SAND_DEBUG(chip, "read [ %02x ]\n", buf[0]);
+ } else if (src_len) {
+ SAND_DEBUG(chip, "read %d bytes\n", len);
+#ifdef VERBOSE_DEBUG
+ print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
+#endif
+ }
+
+ if (src_len && chip->column == src_len)
+ to_state(chip, STATE_IDLE);
+}
+
+static u8 sand_nand_read_byte(struct mtd_info *mtd)
+{
+ u8 ret;
+
+ sand_nand_read_buf(mtd, &ret, 1);
+ return ret;
+}
+
+static u16 sand_nand_read_word(struct mtd_info *mtd)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+
+ SAND_DEBUG(chip, "16-bit access unsupported\n");
+ return sand_nand_read_byte(mtd) | 0xff00;
+}
+
+static void sand_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct sand_nand_chip *chip = to_sand_nand(nand);
+
+ SAND_DEBUG(chip, "write %d bytes\n", len);
+#ifdef VERBOSE_DEBUG
+ print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
+#endif
+
+ if (chip->state != STATE_PROG || chip->status & NAND_STATUS_FAIL)
+ return;
+
+ chip->tmp_dirty = true;
+ len = min((unsigned int)len, chip->chunksize - chip->column);
+ memcpy(chip->tmp + chip->column, buf, len);
+ chip->column += len;
+}
+
+static struct nand_chip *nand_chip;
+
+int sand_nand_remove(struct udevice *dev)
+{
+ struct sand_nand_priv *priv = dev_get_priv(dev);
+ struct sand_nand_chip *chip;
+
+ list_for_each_entry(chip, &priv->chips, node) {
+ struct nand_chip *nand = &chip->nand;
+
+ if (nand_chip == nand)
+ nand_chip = NULL;
+
+ nand_unregister(nand_to_mtd(nand));
+ free(chip->programmed);
+ os_close(chip->fd);
+ free(chip);
+ }
+
+ return 0;
+}
+
+static int sand_nand_probe(struct udevice *dev)
+{
+ struct sand_nand_priv *priv = dev_get_priv(dev);
+ struct sand_nand_chip *chip;
+ int ret, devnum = 0;
+ ofnode np;
+
+ INIT_LIST_HEAD(&priv->chips);
+
+ dev_for_each_subnode(np, dev) {
+ struct nand_chip *nand;
+ struct mtd_info *mtd;
+ u32 erasesize, oobsize, pagesize, pages;
+ u32 err_count, err_step_size;
+ off_t expected_size;
+ char filename[30];
+ fdt_addr_t cs;
+ const u8 *id, *onfi;
+ int id_len, onfi_len;
+
+ cs = ofnode_get_addr_size_index_notrans(np, 0, NULL);
+ if (cs == FDT_ADDR_T_NONE) {
+ dev_dbg(dev, "Invalid cs for chip %s\n",
+ ofnode_get_name(np));
+ ret = -ENOENT;
+ goto err;
+ }
+
+ id = ofnode_read_prop(np, "sandbox,id", &id_len);
+ if (!id) {
+ dev_dbg(dev, "No sandbox,id property for chip %s\n",
+ ofnode_get_name(np));
+ ret = -EINVAL;
+ goto err;
+ }
+
+ onfi = ofnode_read_prop(np, "sandbox,onfi", &onfi_len);
+ if (onfi && onfi_len != sizeof(struct nand_onfi_params)) {
+ dev_dbg(dev, "Invalid length %d for onfi params\n",
+ onfi_len);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,erasesize", &erasesize);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,erasesize property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,oobsize", &oobsize);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,oobsize property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,pagesize", &pagesize);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,pagesize property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,pages", &pages);
+ if (ret) {
+ dev_dbg(dev, "No sandbox,pages property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,err-count", &err_count);
+ if (ret) {
+ dev_dbg(dev,
+ "No sandbox,err-count property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ ret = ofnode_read_u32(np, "sandbox,err-step-size",
+ &err_step_size);
+ if (ret) {
+ dev_dbg(dev,
+ "No sandbox,err-step-size property for chip %s",
+ ofnode_get_name(np));
+ goto err;
+ }
+
+ chip = calloc(sizeof(*chip), 1);
+ if (!chip) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ chip->cs = cs;
+ chip->id = id;
+ chip->id_len = id_len;
+ chip->chunksize = pagesize + oobsize;
+ chip->pagesize = pagesize;
+ chip->pages = pages;
+ chip->pages_per_erase = erasesize / pagesize;
+ memset(chip->tmp, 0xff, chip->chunksize);
+
+ chip->err_count = err_count;
+ chip->err_step_bits = err_step_size * 8;
+ chip->err_steps = pagesize / err_step_size;
+
+ expected_size = (off_t)pages * chip->chunksize;
+ snprintf(filename, sizeof(filename),
+ "/tmp/u-boot.nand%d.XXXXXX", devnum);
+ chip->fd = os_mktemp(filename, expected_size);
+ if (chip->fd < 0) {
+ dev_dbg(dev, "Could not create temp file %s\n",
+ filename);
+ ret = chip->fd;
+ goto err_chip;
+ }
+
+ chip->programmed = calloc(sizeof(long),
+ BITS_TO_LONGS(pages));
+ if (!chip->programmed) {
+ ret = -ENOMEM;
+ goto err_fd;
+ }
+
+ if (onfi) {
+ memcpy(chip->onfi, onfi, onfi_len);
+ memcpy(chip->onfi + onfi_len, onfi, onfi_len);
+ memcpy(chip->onfi + 2 * onfi_len, onfi, onfi_len);
+ }
+
+ nand = &chip->nand;
+ nand->options = spl_in_proper() ? 0 : NAND_SKIP_BBTSCAN;
+ nand->flash_node = np;
+ nand->dev_ready = sand_nand_dev_ready;
+ nand->cmdfunc = sand_nand_command;
+ nand->waitfunc = sand_nand_wait;
+ nand->select_chip = sand_nand_select_chip;
+ nand->read_byte = sand_nand_read_byte;
+ nand->read_word = sand_nand_read_word;
+ nand->read_buf = sand_nand_read_buf;
+ nand->write_buf = sand_nand_write_buf;
+ nand->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+
+ mtd = nand_to_mtd(nand);
+ mtd->dev = dev;
+
+ ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
+ if (ret) {
+ dev_dbg(dev, "Could not scan chip %s: %d\n",
+ ofnode_get_name(np), ret);
+ goto err_prog;
+ }
+ chip->ecc_bits = nand->ecc.layout->eccbytes * 8 /
+ chip->err_steps;
+
+ ret = nand_register(devnum, mtd);
+ if (ret) {
+ dev_dbg(dev, "Could not register nand %d: %d\n", devnum,
+ ret);
+ goto err_prog;
+ }
+
+ if (!nand_chip)
+ nand_chip = nand;
+
+ list_add_tail(&chip->node, &priv->chips);
+ devnum++;
+ continue;
+
+err_prog:
+ free(chip->programmed);
+err_fd:
+ os_close(chip->fd);
+err_chip:
+ free(chip);
+ goto err;
+ }
+
+ return 0;
+
+err:
+ sand_nand_remove(dev);
+ return ret;
+}
+
+static const struct udevice_id sand_nand_ids[] = {
+ { .compatible = "sandbox,nand" },
+ { }
+};
+
+U_BOOT_DRIVER(sand_nand) = {
+ .name = "sand-nand",
+ .id = UCLASS_MTD,
+ .of_match = sand_nand_ids,
+ .probe = sand_nand_probe,
+ .remove = sand_nand_remove,
+ .priv_auto = sizeof(struct sand_nand_priv),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int err;
+
+ err = uclass_get_device_by_driver(UCLASS_MTD, DM_DRIVER_REF(sand_nand),
+ &dev);
+ if (err && err != -ENODEV)
+ log_info("Failed to get sandbox NAND: %d\n", err);
+}
+
+#if IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_SPL_NAND_INIT)
+void nand_deselect(void)
+{
+ nand_chip->select_chip(nand_to_mtd(nand_chip), -1);
+}
+
+static int nand_is_bad_block(int block)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+
+ return mtd_block_isbad(mtd, block << mtd->erasesize_shift);
+}
+
+static int nand_read_page(int block, int page, uchar *dst)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+ loff_t ofs = ((loff_t)block << mtd->erasesize_shift) +
+ ((loff_t)page << mtd->writesize_shift);
+ size_t len = mtd->writesize;
+
+ return nand_read(mtd, ofs, &len, dst);
+}
+
+#include "nand_spl_loaders.c"
+#endif /* CONFIG_SPL_NAND_INIT */
#include <linux/ioport.h>
#include <linux/mtd/rawnand.h>
#include <linux/printk.h>
+#include <linux/time.h>
/* Bad block marker length */
#define FMC2_BBM_LEN 2
#define FMC2_BCHDSR4_EBP7 GENMASK(12, 0)
#define FMC2_BCHDSR4_EBP8 GENMASK(28, 16)
-#define FMC2_NSEC_PER_SEC 1000000000L
-
#define FMC2_TIMEOUT_5S 5000000
enum stm32_fmc2_ecc {
struct stm32_fmc2_nand *nand = to_fmc2_nand(chip);
struct stm32_fmc2_timings *tims = &nand->timings;
unsigned long hclk = clk_get_rate(&nfc->clk);
- unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+ unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
unsigned long timing, tar, tclr, thiz, twait;
unsigned long tset_mem, tset_att, thold_mem, thold_att;
return 0;
}
+static struct nfc_config conf;
+
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
{
- static struct nfc_config conf = { };
int ret;
ret = nand_detect_config(&conf, offs, dest);
return nand_read_buffer(&conf, offs, size, dest);
}
+unsigned int nand_page_size(void)
+{
+ return conf.page_size;
+}
+
void nand_deselect(void)
{
struct sunxi_ccm_reg *const ccm =
puts("Flex-");
puts("OneNAND: ");
-#ifdef CONFIG_MTD
/*
* Add MTD device so that we can reference it later
* via the mtdcore infrastructure (e.g. ubi).
*/
onenand_mtd.name = dev_name;
add_mtd_device(&onenand_mtd);
-#endif
}
print_size(onenand_chip.chipsize, "\n");
}
depends on MCFFEC
bool "Invalidate icache during ethernet operations"
-config FSLDMAFEC
- bool "ColdFire DMA Ethernet Support"
- select PHYLIB
- select SYS_DISCOVER_PHY
- help
- This driver supports the network interface units in the
- ColdFire family.
-
config KS8851_MLL
bool "Microchip KS8851-MLL controller driver"
help
obj-$(CONFIG_FEC_MXC) += fec_mxc.o
obj-$(CONFIG_FMAN_ENET) += fm/
obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o
-obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
* Copyright 2009-2011 Freescale Semiconductor, Inc.
* Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
#include <env.h>
#include <fs_loader.h>
#include <image.h>
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * Conversion to DM
- * (C) 2019 Angelo Dureghello <angelo.dureghello@timesys.com>
- */
-
-#include <common.h>
-#include <env.h>
-#include <hang.h>
-#include <malloc.h>
-#include <command.h>
-#include <config.h>
-#include <net.h>
-#include <miiphy.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-#include <asm/immap.h>
-#include <asm/fsl_mcdmafec.h>
-
-#include "MCD_dma.h"
-
-#undef ET_DEBUG
-#undef MII_DEBUG
-
-/* Ethernet Transmit and Receive Buffers */
-#define DBUF_LENGTH 1520
-#define PKT_MAXBUF_SIZE 1518
-#define FIFO_ERRSTAT (FIFO_STAT_RXW | FIFO_STAT_UF | FIFO_STAT_OF)
-
-/* RxBD bits definitions */
-#define BD_ENET_RX_ERR (BD_ENET_RX_LG | BD_ENET_RX_NO | BD_ENET_RX_CR | \
- BD_ENET_RX_OV | BD_ENET_RX_TR)
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void init_eth_info(struct fec_info_dma *info)
-{
- /* setup Receive and Transmit buffer descriptor */
-#ifdef CFG_SYS_FEC_BUF_USE_SRAM
- static u32 tmp;
-
- if (info->index == 0)
- tmp = CFG_SYS_INIT_RAM_ADDR + 0x1000;
- else
- info->rxbd = (cbd_t *)DBUF_LENGTH;
-
- info->rxbd = (cbd_t *)((u32)info->rxbd + tmp);
- tmp = (u32)info->rxbd;
- info->txbd =
- (cbd_t *)((u32)info->txbd + tmp +
- (PKTBUFSRX * sizeof(cbd_t)));
- tmp = (u32)info->txbd;
- info->txbuf =
- (char *)((u32)info->txbuf + tmp +
- (CFG_SYS_TX_ETH_BUFFER * sizeof(cbd_t)));
- tmp = (u32)info->txbuf;
-#else
- info->rxbd =
- (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
- (PKTBUFSRX * sizeof(cbd_t)));
- info->txbd =
- (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
- (CFG_SYS_TX_ETH_BUFFER * sizeof(cbd_t)));
- info->txbuf =
- (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH);
-#endif
-
-#ifdef ET_DEBUG
- printf("rxbd %x txbd %x\n", (int)info->rxbd, (int)info->txbd);
-#endif
- info->phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32);
-}
-
-static void fec_halt(struct udevice *dev)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
- int counter = 0xffff;
-
- /* issue graceful stop command to the FEC transmitter if necessary */
- fecp->tcr |= FEC_TCR_GTS;
-
- /* wait for graceful stop to register */
- while ((counter--) && (!(fecp->eir & FEC_EIR_GRA)))
- ;
-
- /* Disable DMA tasks */
- MCD_killDma(info->tx_task);
- MCD_killDma(info->rx_task);
-
- /* Disable the Ethernet Controller */
- fecp->ecr &= ~FEC_ECR_ETHER_EN;
-
- /* Clear FIFO status registers */
- fecp->rfsr &= FIFO_ERRSTAT;
- fecp->tfsr &= FIFO_ERRSTAT;
-
- fecp->frst = 0x01000000;
-
- /* Issue a reset command to the FEC chip */
- fecp->ecr |= FEC_ECR_RESET;
-
- /* wait at least 20 clock cycles */
- mdelay(10);
-
-#ifdef ET_DEBUG
- printf("Ethernet task stopped\n");
-#endif
-}
-
-#ifdef ET_DEBUG
-static void dbg_fec_regs(struct eth_device *dev)
-{
- struct fec_info_dma *info = dev->priv;
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
-
- printf("=====\n");
- printf("ievent %x - %x\n", (int)&fecp->eir, fecp->eir);
- printf("imask %x - %x\n", (int)&fecp->eimr, fecp->eimr);
- printf("ecntrl %x - %x\n", (int)&fecp->ecr, fecp->ecr);
- printf("mii_mframe %x - %x\n", (int)&fecp->mmfr, fecp->mmfr);
- printf("mii_speed %x - %x\n", (int)&fecp->mscr, fecp->mscr);
- printf("mii_ctrlstat %x - %x\n", (int)&fecp->mibc, fecp->mibc);
- printf("r_cntrl %x - %x\n", (int)&fecp->rcr, fecp->rcr);
- printf("r hash %x - %x\n", (int)&fecp->rhr, fecp->rhr);
- printf("x_cntrl %x - %x\n", (int)&fecp->tcr, fecp->tcr);
- printf("padr_l %x - %x\n", (int)&fecp->palr, fecp->palr);
- printf("padr_u %x - %x\n", (int)&fecp->paur, fecp->paur);
- printf("op_pause %x - %x\n", (int)&fecp->opd, fecp->opd);
- printf("iadr_u %x - %x\n", (int)&fecp->iaur, fecp->iaur);
- printf("iadr_l %x - %x\n", (int)&fecp->ialr, fecp->ialr);
- printf("gadr_u %x - %x\n", (int)&fecp->gaur, fecp->gaur);
- printf("gadr_l %x - %x\n", (int)&fecp->galr, fecp->galr);
- printf("x_wmrk %x - %x\n", (int)&fecp->tfwr, fecp->tfwr);
- printf("r_fdata %x - %x\n", (int)&fecp->rfdr, fecp->rfdr);
- printf("r_fstat %x - %x\n", (int)&fecp->rfsr, fecp->rfsr);
- printf("r_fctrl %x - %x\n", (int)&fecp->rfcr, fecp->rfcr);
- printf("r_flrfp %x - %x\n", (int)&fecp->rlrfp, fecp->rlrfp);
- printf("r_flwfp %x - %x\n", (int)&fecp->rlwfp, fecp->rlwfp);
- printf("r_frfar %x - %x\n", (int)&fecp->rfar, fecp->rfar);
- printf("r_frfrp %x - %x\n", (int)&fecp->rfrp, fecp->rfrp);
- printf("r_frfwp %x - %x\n", (int)&fecp->rfwp, fecp->rfwp);
- printf("t_fdata %x - %x\n", (int)&fecp->tfdr, fecp->tfdr);
- printf("t_fstat %x - %x\n", (int)&fecp->tfsr, fecp->tfsr);
- printf("t_fctrl %x - %x\n", (int)&fecp->tfcr, fecp->tfcr);
- printf("t_flrfp %x - %x\n", (int)&fecp->tlrfp, fecp->tlrfp);
- printf("t_flwfp %x - %x\n", (int)&fecp->tlwfp, fecp->tlwfp);
- printf("t_ftfar %x - %x\n", (int)&fecp->tfar, fecp->tfar);
- printf("t_ftfrp %x - %x\n", (int)&fecp->tfrp, fecp->tfrp);
- printf("t_ftfwp %x - %x\n", (int)&fecp->tfwp, fecp->tfwp);
- printf("frst %x - %x\n", (int)&fecp->frst, fecp->frst);
- printf("ctcwr %x - %x\n", (int)&fecp->ctcwr, fecp->ctcwr);
-}
-#endif
-
-static void set_fec_duplex_speed(volatile fecdma_t *fecp, int dup_spd)
-{
- struct bd_info *bd = gd->bd;
-
- if ((dup_spd >> 16) == FULL) {
- /* Set maximum frame length */
- fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_MII_MODE |
- FEC_RCR_PROM | 0x100;
- fecp->tcr = FEC_TCR_FDEN;
- } else {
- /* Half duplex mode */
- fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) |
- FEC_RCR_MII_MODE | FEC_RCR_DRT;
- fecp->tcr &= ~FEC_TCR_FDEN;
- }
-
- if ((dup_spd & 0xFFFF) == _100BASET) {
-#ifdef MII_DEBUG
- printf("100Mbps\n");
-#endif
- bd->bi_ethspeed = 100;
- } else {
-#ifdef MII_DEBUG
- printf("10Mbps\n");
-#endif
- bd->bi_ethspeed = 10;
- }
-}
-
-static void fec_set_hwaddr(volatile fecdma_t *fecp, u8 *mac)
-{
- u8 curr_byte; /* byte for which to compute the CRC */
- int byte; /* loop - counter */
- int bit; /* loop - counter */
- u32 crc = 0xffffffff; /* initial value */
-
- for (byte = 0; byte < 6; byte++) {
- curr_byte = mac[byte];
- for (bit = 0; bit < 8; bit++) {
- if ((curr_byte & 0x01) ^ (crc & 0x01)) {
- crc >>= 1;
- crc = crc ^ 0xedb88320;
- } else {
- crc >>= 1;
- }
- curr_byte >>= 1;
- }
- }
-
- crc = crc >> 26;
-
- /* Set individual hash table register */
- if (crc >= 32) {
- fecp->ialr = (1 << (crc - 32));
- fecp->iaur = 0;
- } else {
- fecp->ialr = 0;
- fecp->iaur = (1 << crc);
- }
-
- /* Set physical address */
- fecp->palr = (mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3];
- fecp->paur = (mac[4] << 24) + (mac[5] << 16) + 0x8808;
-
- /* Clear multicast address hash table */
- fecp->gaur = 0;
- fecp->galr = 0;
-}
-
-static int fec_init(struct udevice *dev)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
- int rval, i;
- uchar enetaddr[6];
-
-#ifdef ET_DEBUG
- printf("fec_init: iobase 0x%08x ...\n", info->iobase);
-#endif
-
- fecpin_setclear(info, 1);
- fec_halt(dev);
-
- mii_init();
- set_fec_duplex_speed(fecp, info->dup_spd);
-
- /* We use strictly polling mode only */
- fecp->eimr = 0;
-
- /* Clear any pending interrupt */
- fecp->eir = 0xffffffff;
-
- /* Set station address */
- if (info->index == 0)
- rval = eth_env_get_enetaddr("ethaddr", enetaddr);
- else
- rval = eth_env_get_enetaddr("eth1addr", enetaddr);
-
- if (!rval) {
- puts("Please set a valid MAC address\n");
- return -EINVAL;
- }
-
- fec_set_hwaddr(fecp, enetaddr);
-
- /* Set Opcode/Pause Duration Register */
- fecp->opd = 0x00010020;
-
- /* Setup Buffers and Buffer Descriptors */
- info->rx_idx = 0;
- info->tx_idx = 0;
-
- /* Setup Receiver Buffer Descriptors (13.14.24.18)
- * Settings: Empty, Wrap */
- for (i = 0; i < PKTBUFSRX; i++) {
- info->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
- info->rxbd[i].cbd_datlen = PKTSIZE_ALIGN;
- info->rxbd[i].cbd_bufaddr = (uint) net_rx_packets[i];
- }
- info->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
-
- /* Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
- * Settings: Last, Tx CRC */
- for (i = 0; i < CFG_SYS_TX_ETH_BUFFER; i++) {
- info->txbd[i].cbd_sc = 0;
- info->txbd[i].cbd_datlen = 0;
- info->txbd[i].cbd_bufaddr = (uint) (&info->txbuf[0]);
- }
- info->txbd[CFG_SYS_TX_ETH_BUFFER - 1].cbd_sc |= BD_ENET_TX_WRAP;
-
- info->used_tbd_idx = 0;
- info->clean_tbd_num = CFG_SYS_TX_ETH_BUFFER;
-
- /* Set Rx FIFO alarm and granularity value */
- fecp->rfcr = 0x0c000000;
- fecp->rfar = 0x0000030c;
-
- /* Set Tx FIFO granularity value */
- fecp->tfcr = FIFO_CTRL_FRAME | FIFO_CTRL_GR(6) | 0x00040000;
- fecp->tfar = 0x00000080;
-
- fecp->tfwr = 0x2;
- fecp->ctcwr = 0x03000000;
-
- /* Enable DMA receive task */
- MCD_startDma(info->rx_task,
- (s8 *)info->rxbd,
- 0,
- (s8 *)&fecp->rfdr,
- 4,
- 0,
- 4,
- info->rx_init,
- info->rx_pri,
- (MCD_FECRX_DMA | MCD_TT_FLAGS_DEF),
- (MCD_NO_CSUM | MCD_NO_BYTE_SWAP)
- );
-
- /* Enable DMA tx task with no ready buffer descriptors */
- MCD_startDma(info->tx_task,
- (s8 *)info->txbd,
- 0,
- (s8 *)&fecp->tfdr,
- 4,
- 0,
- 4,
- info->tx_init,
- info->tx_pri,
- (MCD_FECTX_DMA | MCD_TT_FLAGS_DEF),
- (MCD_NO_CSUM | MCD_NO_BYTE_SWAP)
- );
-
- /* Now enable the transmit and receive processing */
- fecp->ecr |= FEC_ECR_ETHER_EN;
-
- return 0;
-}
-
-static int mcdmafec_init(struct udevice *dev)
-{
- return fec_init(dev);
-}
-
-static int mcdmafec_send(struct udevice *dev, void *packet, int length)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- cbd_t *p_tbd, *p_used_tbd;
- u16 phy_status;
-
- miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phy_status);
-
- /* process all the consumed TBDs */
- while (info->clean_tbd_num < CFG_SYS_TX_ETH_BUFFER) {
- p_used_tbd = &info->txbd[info->used_tbd_idx];
- if (p_used_tbd->cbd_sc & BD_ENET_TX_READY) {
-#ifdef ET_DEBUG
- printf("Cannot clean TBD %d, in use\n",
- info->clean_tbd_num);
-#endif
- return 0;
- }
-
- /* clean this buffer descriptor */
- if (info->used_tbd_idx == (CFG_SYS_TX_ETH_BUFFER - 1))
- p_used_tbd->cbd_sc = BD_ENET_TX_WRAP;
- else
- p_used_tbd->cbd_sc = 0;
-
- /* update some indeces for a correct handling of TBD ring */
- info->clean_tbd_num++;
- info->used_tbd_idx = (info->used_tbd_idx + 1)
- % CFG_SYS_TX_ETH_BUFFER;
- }
-
- /* Check for valid length of data. */
- if (length > 1500 || length <= 0)
- return -1;
-
- /* Check the number of vacant TxBDs. */
- if (info->clean_tbd_num < 1) {
- printf("No available TxBDs ...\n");
- return -1;
- }
-
- /* Get the first TxBD to send the mac header */
- p_tbd = &info->txbd[info->tx_idx];
- p_tbd->cbd_datlen = length;
- p_tbd->cbd_bufaddr = (u32)packet;
- p_tbd->cbd_sc |= BD_ENET_TX_LAST | BD_ENET_TX_TC | BD_ENET_TX_READY;
- info->tx_idx = (info->tx_idx + 1) % CFG_SYS_TX_ETH_BUFFER;
-
- /* Enable DMA transmit task */
- MCD_continDma(info->tx_task);
-
- info->clean_tbd_num -= 1;
-
- /* wait until frame is sent . */
- while (p_tbd->cbd_sc & BD_ENET_TX_READY)
- udelay(10);
-
- return (int)(info->txbd[info->tx_idx].cbd_sc & BD_ENET_TX_STATS);
-}
-
-static int mcdmafec_recv(struct udevice *dev, int flags, uchar **packetp)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
-
- cbd_t *prbd = &info->rxbd[info->rx_idx];
- u32 ievent;
- int frame_length, len = 0;
-
- /* Check if any critical events have happened */
- ievent = fecp->eir;
- if (ievent != 0) {
- fecp->eir = ievent;
-
- if (ievent & (FEC_EIR_BABT | FEC_EIR_TXERR | FEC_EIR_RXERR)) {
- printf("fec_recv: error\n");
- fec_halt(dev);
- fec_init(dev);
- return 0;
- }
-
- if (ievent & FEC_EIR_HBERR) {
- /* Heartbeat error */
- fecp->tcr |= FEC_TCR_GTS;
- }
-
- if (ievent & FEC_EIR_GRA) {
- /* Graceful stop complete */
- if (fecp->tcr & FEC_TCR_GTS) {
- printf("fec_recv: tcr_gts\n");
- fec_halt(dev);
- fecp->tcr &= ~FEC_TCR_GTS;
- fec_init(dev);
- }
- }
- }
-
- if (!(prbd->cbd_sc & BD_ENET_RX_EMPTY)) {
- if ((prbd->cbd_sc & BD_ENET_RX_LAST) &&
- !(prbd->cbd_sc & BD_ENET_RX_ERR) &&
- ((prbd->cbd_datlen - 4) > 14)) {
- /* Get buffer address and size */
- frame_length = prbd->cbd_datlen - 4;
-
- /* Fill the buffer and pass it to upper layers */
- net_process_received_packet((uchar *)prbd->cbd_bufaddr,
- frame_length);
- len = frame_length;
- }
-
- /* Reset buffer descriptor as empty */
- if (info->rx_idx == (PKTBUFSRX - 1))
- prbd->cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
- else
- prbd->cbd_sc = BD_ENET_RX_EMPTY;
-
- prbd->cbd_datlen = PKTSIZE_ALIGN;
-
- /* Now, we have an empty RxBD, restart the DMA receive task */
- MCD_continDma(info->rx_task);
-
- /* Increment BD count */
- info->rx_idx = (info->rx_idx + 1) % PKTBUFSRX;
- }
-
- return len;
-}
-
-static void mcdmafec_halt(struct udevice *dev)
-{
- fec_halt(dev);
-}
-
-static const struct eth_ops mcdmafec_ops = {
- .start = mcdmafec_init,
- .send = mcdmafec_send,
- .recv = mcdmafec_recv,
- .stop = mcdmafec_halt,
-};
-
-/*
- * Boot sequence, called just after mcffec_of_to_plat,
- * as DM way, it replaces old mcffec_initialize.
- */
-static int mcdmafec_probe(struct udevice *dev)
-{
- struct fec_info_dma *info = dev_get_priv(dev);
- struct eth_pdata *pdata = dev_get_plat(dev);
- int node = dev_of_offset(dev);
- int retval;
- const u32 *val;
-
- info->index = dev_seq(dev);
- info->iobase = pdata->iobase;
- info->miibase = pdata->iobase;
- info->phy_addr = -1;
-
- val = fdt_getprop(gd->fdt_blob, node, "rx-task", NULL);
- if (val)
- info->rx_task = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "tx-task", NULL);
- if (val)
- info->tx_task = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "rx-prioprity", NULL);
- if (val)
- info->rx_pri = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "tx-prioprity", NULL);
- if (val)
- info->tx_pri = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "rx-init", NULL);
- if (val)
- info->rx_init = fdt32_to_cpu(*val);
-
- val = fdt_getprop(gd->fdt_blob, node, "tx-init", NULL);
- if (val)
- info->tx_init = fdt32_to_cpu(*val);
-
-#ifdef CFG_SYS_FEC_BUF_USE_SRAM
- u32 tmp = CFG_SYS_INIT_RAM_ADDR + 0x1000;
-#endif
- init_eth_info(info);
-
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- info->bus = mdio_alloc();
- if (!info->bus)
- return -ENOMEM;
- strlcpy(info->bus->name, dev->name, MDIO_NAME_LEN);
- info->bus->read = mcffec_miiphy_read;
- info->bus->write = mcffec_miiphy_write;
-
- retval = mdio_register(info->bus);
- if (retval < 0)
- return retval;
-#endif
-
- return 0;
-}
-
-static int mcdmafec_remove(struct udevice *dev)
-{
- struct fec_info_dma *priv = dev_get_priv(dev);
-
- mdio_unregister(priv->bus);
- mdio_free(priv->bus);
-
- return 0;
-}
-
-/*
- * Boot sequence, called 1st
- */
-static int mcdmafec_of_to_plat(struct udevice *dev)
-{
- struct eth_pdata *pdata = dev_get_plat(dev);
- const u32 *val;
-
- pdata->iobase = dev_read_addr(dev);
- /* Default to 10Mbit/s */
- pdata->max_speed = 10;
-
- val = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
- if (val)
- pdata->max_speed = fdt32_to_cpu(*val);
-
- return 0;
-}
-
-static const struct udevice_id mcdmafec_ids[] = {
- { .compatible = "fsl,mcf-dma-fec" },
- { }
-};
-
-U_BOOT_DRIVER(mcffec) = {
- .name = "mcdmafec",
- .id = UCLASS_ETH,
- .of_match = mcdmafec_ids,
- .of_to_plat = mcdmafec_of_to_plat,
- .probe = mcdmafec_probe,
- .remove = mcdmafec_remove,
- .ops = &mcdmafec_ops,
- .priv_auto = sizeof(struct fec_info_dma),
- .plat_auto = sizeof(struct eth_pdata),
-};
* based on source code of Shlomi Gridish
*/
-#include <common.h>
#include <malloc.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/compat.h>
#include <linux/bitfield.h>
+#include <linux/time.h>
/* [31] soft reset for the phy.
* 1: reset. 0: dessert the reset.
#define MIPI_DSI_TEST_CTRL0 0x3c
#define MIPI_DSI_TEST_CTRL1 0x40
-#define NSEC_PER_MSEC 1000000L
-
struct phy_meson_axg_mipi_dphy_priv {
struct regmap *regmap;
#if CONFIG_IS_ENABLED(CLK)
#include <common.h>
#include <div64.h>
+#include <linux/time.h>
#include <phy-mipi-dphy.h>
-#define PSEC_PER_SEC 1000000000000LL
-
/*
* Minimum D-PHY timings based on MIPI D-PHY specification. Derived
* from the valid ranges specified in Section 6.9, Table 14, Page 41
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/math64.h>
+#include <linux/time.h>
#include <phy-mipi-dphy.h>
#include <reset.h>
#define DSI_PHY_STATUS 0xb0
#define PHY_LOCK BIT(0)
-#define PSEC_PER_SEC 1000000000000LL
-
#define msleep(a) udelay(a * 1000)
enum phy_max_rate {
{ .compatible = "st,stm32mp157-pinctrl" },
{ .compatible = "st,stm32mp157-z-pinctrl" },
{ .compatible = "st,stm32mp135-pinctrl" },
+ { .compatible = "st,stm32mp257-pinctrl" },
+ { .compatible = "st,stm32mp257-z-pinctrl" },
{ }
};
#include <dm/device_compat.h>
#include <linux/math64.h>
#include <linux/bitfield.h>
+#include <linux/time.h>
#include <asm/io.h>
/* The channel number of Aspeed pwm controller */
/* PWM fixed value */
#define PWM_ASPEED_FIXED_PERIOD 0xff
-#define NSEC_PER_SEC 1000000000L
-
struct aspeed_pwm_priv {
struct clk clk;
struct regmap *regmap;
#include <dm.h>
#include <linux/bitops.h>
#include <linux/io.h>
+#include <linux/time.h>
#include <pwm.h>
#define PERIOD_BITS 16
#define PWM_MAX_PRES 10
-#define NSEC_PER_SEC 1000000000L
#define PWM_ENA 0x04
#define PWM_CHANNEL_OFFSET 0x20
#include <linux/bitfield.h>
#include <linux/math64.h>
#include <linux/log2.h>
+#include <linux/time.h>
#include <dm/device_compat.h>
#define CLOCK_CONTROL 0
#define COUNTER_INTERVAL_ENABLE BIT(1)
#define COUNTER_COUNTING_DISABLE BIT(0)
-#define NSEC_PER_SEC 1000000000L
-
#define TTC_REG(reg, channel) ((reg) + (channel) * sizeof(u32))
#define TTC_CLOCK_CONTROL(reg, channel) \
TTC_REG((reg) + CLOCK_CONTROL, (channel))
#include <linux/math64.h>
#include <linux/bitfield.h>
#include <linux/clk-provider.h>
-
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
#define REG_PWM_A 0x0
#define REG_PWM_B 0x4
#include <div64.h>
#include <linux/bitops.h>
#include <linux/io.h>
+#include <linux/time.h>
/* PWM registers and bits definitions */
#define PWMCON 0x00
#define PWM_CLK_DIV_MAX 7
#define MAX_PWM_NUM 8
-#define NSEC_PER_SEC 1000000000L
-
enum mtk_pwm_reg_ver {
PWM_REG_V1,
PWM_REG_V2,
#include <dm/device_compat.h>
#include <pwm.h>
#include <asm/io.h>
-
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
/* Time base module registers */
#define TI_EHRPWM_TBCTL 0x00
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
* based on source code of Shlomi Gridish
*/
-#include <common.h>
#include <malloc.h>
#include <command.h>
#include <asm/global_data.h>
#include <asm/armv8/mmu.h>
#include <asm/arch/cpu.h>
#endif
+#ifdef CONFIG_PPC
+#include <asm/ppc.h>
+#endif
#define MPC85xx_DEVDISR_QE_DISABLE 0x1
config SCSI
- bool "Support SCSI controllers"
+ bool "Support SCSI controllers with driver model"
help
This enables support for SCSI (Small Computer System Interface),
a parallel interface widely used with storage peripherals such as
hard drives and optical drives. The SCSI standards define physical
interfaces as well as protocols for controlling devices and
- tranferring data.
-
-config DM_SCSI
- bool "Support SCSI controllers with driver model"
- help
- This option enables the SCSI (Small Computer System Interface) uclass
- which supports SCSI and SATA HDDs. For every device configuration
- (IDs/LUNs) a block device is created with RAW read/write and
- filesystem support.
-
-if SCSI && !DM_SCSI
-
-config SCSI_AHCI_PLAT
- bool "Platform-specific init of AHCI"
- help
- This enables a way for boards to set up an AHCI device manually, by
- called ahci_init() and providing an ahci_reset() mechanism.
-
- This is deprecated. An AHCI driver should be provided instead.
-
-config SYS_SCSI_MAX_SCSI_ID
- int "Maximum supported SCSI ID"
- default 1
- help
- Sets the maximum number of SCSI IDs to scan when looking for devices.
- IDs from 0 to (this value - 1) are scanned.
-
- This is deprecated and is not needed when BLK is enabled.
-
-config SYS_SCSI_MAX_LUN
- int "Maximum support SCSI LUN"
- default 1
- help
- Sets the maximum number of SCSI Logical Unit Numbers (LUNs) to scan on
- devices. LUNs from 0 to (this value - 1) are scanned.
-
- This is deprecated and is not needed when CONFIG_DM_SCSI is enabled.
-
-endif
+ tranferring data. For every device configuration (IDs/LUNs) a block
+ device is created with RAW read/write and filesystem support.
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
-obj-$(CONFIG_SCSI) += scsi.o
-
+obj-$(CONFIG_SCSI) += scsi.o scsi-uclass.o
ifdef CONFIG_SCSI
-ifdef CONFIG_DM_SCSI
obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += scsi_bootdev.o
+obj-$(CONFIG_SANDBOX) += sandbox_scsi.o
+obj-$(CONFIG_SANDBOX) += scsi_emul.o
endif
endif
-endif
-
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_SPL_SATA
-obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
-obj-$(CONFIG_SCSI) += scsi.o
+obj-$(CONFIG_SCSI) += scsi.o scsi-uclass.o
endif
endif
-
-ifdef CONFIG_SCSI
-obj-$(CONFIG_SANDBOX) += sandbox_scsi.o
-obj-$(CONFIG_SANDBOX) += scsi_emul.o
-endif
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
-#if !defined(CONFIG_DM_SCSI)
-# ifdef CFG_SCSI_DEV_LIST
-# define SCSI_DEV_LIST CFG_SCSI_DEV_LIST
-# else
-# ifdef CONFIG_SATA_ULI5288
-
-# define SCSI_VEND_ID 0x10b9
-# define SCSI_DEV_ID 0x5288
-
-# elif !defined(CONFIG_SCSI_AHCI_PLAT)
-# error no scsi device defined
-# endif
-# define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
-# endif
-#endif
-
-#if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT) && \
- !defined(CONFIG_DM_SCSI)
-const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
-#endif
static struct scsi_cmd tempccb; /* temporary scsi command buffer */
DEFINE_CACHE_ALIGN_BUFFER(u8, tempbuff, 512); /* temporary data buffer */
-#if !defined(CONFIG_DM_SCSI)
-static int scsi_max_devs; /* number of highest available scsi device */
-
-static int scsi_curr_dev; /* current device */
-
-static struct blk_desc scsi_dev_desc[SCSI_MAX_DEVICE];
-#endif
-
/* almost the maximum amount of the scsi_ext command.. */
#define SCSI_MAX_BLK 0xFFFF
#define SCSI_LBA48_READ 0xFFFFFFF
pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */
}
-#ifdef CONFIG_BLK
static void scsi_setup_read_ext(struct scsi_cmd *pccb, lbaint_t start,
unsigned short blocks)
{
return 1;
}
#endif /* CONFIG_BOUNCE_BUFFER */
-#endif
-
-#if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT) && \
- !defined(CONFIG_DM_SCSI)
-void scsi_init(void)
-{
- int busdevfunc = -1;
- int i;
- /*
- * Find a device from the list, this driver will support a single
- * controller.
- */
- for (i = 0; i < ARRAY_SIZE(scsi_device_list); i++) {
- /* get PCI Device ID */
- struct udevice *dev;
- int ret;
-
- ret = dm_pci_find_device(scsi_device_list[i].vendor,
- scsi_device_list[i].device, 0, &dev);
- if (!ret) {
- busdevfunc = dm_pci_get_bdf(dev);
- break;
- }
- if (busdevfunc != -1)
- break;
- }
-
- if (busdevfunc == -1) {
- printf("Error: SCSI Controller(s) ");
- for (i = 0; i < ARRAY_SIZE(scsi_device_list); i++) {
- printf("%04X:%04X ",
- scsi_device_list[i].vendor,
- scsi_device_list[i].device);
- }
- printf("not found\n");
- return;
- }
-#ifdef DEBUG
- else {
- printf("SCSI Controller (%04X,%04X) found (%d:%d:%d)\n",
- scsi_device_list[i].vendor,
- scsi_device_list[i].device,
- (busdevfunc >> 16) & 0xFF,
- (busdevfunc >> 11) & 0x1F,
- (busdevfunc >> 8) & 0x7);
- }
-#endif
- bootstage_start(BOOTSTAGE_ID_ACCUM_SCSI, "ahci");
- scsi_low_level_init(busdevfunc);
- scsi_scan(true);
- bootstage_accum(BOOTSTAGE_ID_ACCUM_SCSI);
-}
-#endif
/* copy src to dest, skipping leading and trailing blanks
* and null terminate the string
#endif /* CONFIG_BOUNCE_BUFFER */
}
-#if !defined(CONFIG_DM_SCSI)
-/**
- * scsi_init_dev_desc - initialize all SCSI specific blk_desc properties
- *
- * @dev_desc: Block device description pointer
- * @devnum: Device number
- */
-static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum)
-{
- dev_desc->lba = 0;
- dev_desc->blksz = 0;
- dev_desc->uclass_id = UCLASS_SCSI;
- dev_desc->devnum = devnum;
- dev_desc->part_type = PART_TYPE_UNKNOWN;
-
- scsi_init_dev_desc_priv(dev_desc);
-}
-#endif
-
/**
* scsi_detect_dev - Detect scsi device
*
* (re)-scan the scsi bus and reports scsi device info
* to the user if mode = 1
*/
-#if defined(CONFIG_DM_SCSI)
static int do_scsi_scan_one(struct udevice *dev, int id, int lun, bool verbose)
{
int ret;
return 0;
}
-#else
-int scsi_scan(bool verbose)
-{
- unsigned char i, lun;
- int ret;
-
- if (verbose)
- printf("scanning bus for devices...\n");
- for (i = 0; i < SCSI_MAX_DEVICE; i++)
- scsi_init_dev_desc(&scsi_dev_desc[i], i);
-
- scsi_max_devs = 0;
- for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
- for (lun = 0; lun < CONFIG_SYS_SCSI_MAX_LUN; lun++) {
- struct blk_desc *bdesc = &scsi_dev_desc[scsi_max_devs];
-
- ret = scsi_detect_dev(NULL, i, lun, bdesc);
- if (ret)
- continue;
- part_init(bdesc);
-
- if (verbose) {
- printf(" Device %d: ", bdesc->devnum);
- dev_print(bdesc);
- }
- scsi_max_devs++;
- } /* next LUN */
- }
- if (scsi_max_devs > 0)
- scsi_curr_dev = 0;
- else
- scsi_curr_dev = -1;
-
- printf("Found %d device(s).\n", scsi_max_devs);
-#ifndef CONFIG_SPL_BUILD
- env_set_ulong("scsidevs", scsi_max_devs);
-#endif
- return 0;
-}
-#endif
-#ifdef CONFIG_BLK
static const struct blk_ops scsi_blk_ops = {
.read = scsi_read,
.write = scsi_write,
.id = UCLASS_BLK,
.ops = &scsi_blk_ops,
};
-#else
-U_BOOT_LEGACY_BLK(scsi) = {
- .uclass_idname = "scsi",
- .uclass_id = UCLASS_SCSI,
- .max_devs = SCSI_MAX_DEVICE,
- .desc = scsi_dev_desc,
-};
-#endif
#include <dm.h>
#include <errno.h>
#include <linux/delay.h>
+#include <linux/time.h>
#include <misc.h>
#include <serial.h>
#define UART_OVERSAMPLING 32
#define STALE_TIMEOUT 160
-#define USEC_PER_SEC 1000000L
-
/* Registers*/
#define GENI_FORCE_DEFAULT_REG 0x20
#define GENI_SER_M_CLK_CFG 0x48
*/
#define ONE_BYTE_B115200_US 87
-static void _stm32_serial_setbrg(fdt_addr_t base,
+static void _stm32_serial_setbrg(void __iomem *base,
struct stm32_uart_info *uart_info,
u32 clock_rate,
int baudrate)
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
- u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
+ void __iomem *cr1 = plat->base + CR1_OFFSET(stm32f4);
u32 config = 0;
uint parity = SERIAL_GET_PARITY(serial_config);
uint bits = SERIAL_GET_BITS(serial_config);
{
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
- fdt_addr_t base = plat->base;
+ void __iomem *base = plat->base;
u32 isr = readl(base + ISR_OFFSET(stm32f4));
if ((isr & USART_ISR_RXNE) == 0)
return readl(base + RDR_OFFSET(stm32f4));
}
-static int _stm32_serial_putc(fdt_addr_t base,
+static int _stm32_serial_putc(void __iomem *base,
struct stm32_uart_info *uart_info,
const char c)
{
{
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
bool stm32f4 = plat->uart_info->stm32f4;
- fdt_addr_t base = plat->base;
+ void __iomem *base = plat->base;
if (input)
return readl(base + ISR_OFFSET(stm32f4)) &
USART_ISR_TXE ? 0 : 1;
}
-static void _stm32_serial_init(fdt_addr_t base,
+static void _stm32_serial_init(void __iomem *base,
struct stm32_uart_info *uart_info)
{
bool stm32f4 = uart_info->stm32f4;
static int stm32_serial_of_to_plat(struct udevice *dev)
{
struct stm32x7_serial_plat *plat = dev_get_plat(dev);
+ fdt_addr_t addr;
- plat->base = dev_read_addr(dev);
- if (plat->base == FDT_ADDR_T_NONE)
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
+ plat->base = (void __iomem *)addr;
+
return 0;
}
static inline void _debug_uart_init(void)
{
- fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE);
+ void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);
struct stm32_uart_info *uart_info = _debug_uart_info();
_stm32_serial_init(base, uart_info);
static inline void _debug_uart_putc(int c)
{
- fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE);
+ void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);
struct stm32_uart_info *uart_info = _debug_uart_info();
while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
/* Information about a serial port */
struct stm32x7_serial_plat {
- fdt_addr_t base; /* address of registers in physical memory */
+ void __iomem *base; /* address of registers in physical memory */
struct stm32_uart_info *uart_info;
unsigned long int clock_rate;
};
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/sizes.h>
+#include <linux/time.h>
#include <zynqmp_firmware.h>
#include "cadence_qspi.h"
#include <dt-bindings/power/xlnx-versal-power.h>
-#define NSEC_PER_SEC 1000000000L
-
#define CQSPI_STIG_READ 0
#define CQSPI_STIG_WRITE 1
#define CQSPI_READ 2
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/printk.h>
-
-/* linux/include/time.h */
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
DECLARE_GLOBAL_DATA_PTR;
#include <spi-mem.h>
#include <asm/io.h>
#include <linux/log2.h>
+#include <linux/time.h>
#include <linux/iopoll.h>
#include <linux/bitfield.h>
return readl_poll_timeout(spifc->base + SPIFC_A1_USER_CTRL0_REG,
val, (val & mask) == mask,
- 200 * 1000);
+ 200 * USEC_PER_MSEC);
}
static void amlogic_spifc_a1_drain_buffer(struct amlogic_spifc_a1 *spifc,
* Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include <errno.h>
#include <log.h>
#include <malloc.h>
#include <spi.h>
int r;
if (type != SYSRESET_POWER_OFF)
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
debug("GPIO poweroff\n");
psci_sys_poweroff();
break;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
return -EINPROGRESS;
state->last_sysreset = type;
break;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
if (!state->sysreset_allowed[type])
return -EACCES;
return -EACCES;
sandbox_exit();
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
if (!state->sysreset_allowed[type])
return -EACCES;
return ret;
break;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
return -EINPROGRESS;
return ret;
return -EINPROGRESS;
default:
- return -ENOSYS;
+ return -EPROTONOSUPPORT;
}
outb(value, IO_PORT_RESET);
config UFS
bool "Support UFS controllers"
- depends on DM_SCSI
+ depends on SCSI
select CHARSET
help
This selects support for Universal Flash Subsystem (UFS).
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/err.h>
+#include <linux/time.h>
#include "ufs.h"
-#define USEC_PER_SEC 1000000L
-
#define CDNS_UFS_REG_HCLKDIV 0xFC
#define CDNS_UFS_REG_PHY_XCFGD1 0x113C
#include <linux/usb/gadget.h>
#include <linux/bitfield.h>
#include <linux/math64.h>
+#include <linux/time.h>
#include "core.h"
#include "gadget.h"
#include "linux-compat.h"
-#define NSEC_PER_SEC 1000000000L
-
static LIST_HEAD(dwc3_list);
/* -------------------------------------------------------------------------- */
{
debug("%s: sector %lx, count %lx, buf %lx\n",
__func__, sector, count, (ulong)buf);
- memcpy(buf, (void *)(load->dev + sector), count);
+ memcpy(buf, (void *)(load->priv + sector), count);
return count;
}
struct spl_load_info load;
debug("Found FIT\n");
- load.dev = header;
- load.bl_len = 1;
+ load.priv = header;
+ spl_set_bl_len(&load, 1);
load.read = sdp_load_read;
spl_load_simple_fit(spl_image, &load, 0,
header);
valid_container_hdr((void *)header)) {
struct spl_load_info load;
- load.dev = header;
- load.bl_len = 1;
+ load.priv = header;
+ spl_set_bl_len(&load, 1);
load.read = sdp_load_read;
spl_load_imx_container(spl_image, &load, 0);
return SDP_EXIT;
config CONSOLE_TRUETYPE
bool "Support a console that uses TrueType fonts"
- select CMD_SELECT_FONT
help
TrueTrype fonts can provide outline-drawing capability rather than
needing to provide a bitmap for each font and size that is needed.
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/iopoll.h>
+#include <linux/time.h>
#include <video_bridge.h>
#define HWVER_131 0x31333100 /* IP version 1.31 */
#define PHY_STATUS_TIMEOUT_US 10000
#define CMD_PKT_STATUS_TIMEOUT_US 20000
-#define MSEC_PER_SEC 1000
-
struct dw_mipi_dsi {
struct mipi_dsi_host dsi_host;
struct mipi_dsi_device *device;
#include <asm/io.h>
#include <dm/device-internal.h>
#include <linux/bitops.h>
+#include <linux/time.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/hardware.h>
-#define USEC_PER_SEC 1000000L
-
/*
* DSI wrapper registers & bit definitions
* Note: registers are named as in the Reference Manual
#include <panel.h>
#include <linux/delay.h>
#include <linux/err.h>
+#include <linux/time.h>
#include <power/regulator.h>
#include <asm/gpio.h>
#include "mipi-phy.h"
-#define USEC_PER_SEC 1000000L
-#define NSEC_PER_SEC 1000000000L
-
struct tegra_dsi_priv {
struct mipi_dsi_host host;
struct mipi_dsi_device device;
config VIRTIO_NET
bool "virtio net driver"
- depends on VIRTIO
+ depends on VIRTIO && NETDEVICES
help
This is the virtual net driver for virtio. It can be used with
QEMU based targets.
#include <wdt.h>
#include <asm/io.h>
#include <linux/delay.h>
-
-#define MSEC_PER_SEC 1000
+#include <linux/time.h>
#define WDT_MAX_TIMEOUT 16
#define WDT_TIMEOUT_MASK 0xf
};
/*
- * This env_set() function is defined in cmd/nvedit.c, since it calls
- * _do_env_set(), whis is a static function in that file.
- *
- * int env_set(const char *varname, const char *varvalue);
+ * This variable is incremented each time we set an environment variable so we
+ * can be check via env_get_id() to see if the environment has changed or not.
+ * This makes it possible to reread an environment variable only if the
+ * environment was changed, typically used by networking code.
*/
+static int env_id = 1;
+
+int env_get_id(void)
+{
+ return env_id;
+}
+
+void env_inc_id(void)
+{
+ env_id++;
+}
+
+int env_do_env_set(int flag, int argc, char *const argv[], int env_flag)
+{
+ int i, len;
+ char *name, *value, *s;
+ struct env_entry e, *ep;
+
+ debug("Initial value for argc=%d\n", argc);
+
+#if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_CMD_NVEDIT_EFI)
+ if (argc > 1 && argv[1][0] == '-' && argv[1][1] == 'e')
+ return do_env_set_efi(NULL, flag, --argc, ++argv);
+#endif
+
+ while (argc > 1 && **(argv + 1) == '-') {
+ char *arg = *++argv;
+
+ --argc;
+ while (*++arg) {
+ switch (*arg) {
+ case 'f': /* force */
+ env_flag |= H_FORCE;
+ break;
+ default:
+ return CMD_RET_USAGE;
+ }
+ }
+ }
+ debug("Final value for argc=%d\n", argc);
+ name = argv[1];
+
+ if (strchr(name, '=')) {
+ printf("## Error: illegal character '='"
+ "in variable name \"%s\"\n", name);
+ return 1;
+ }
+
+ env_inc_id();
+
+ /* Delete only ? */
+ if (argc < 3 || argv[2] == NULL) {
+ int rc = hdelete_r(name, &env_htab, env_flag);
+
+ /* If the variable didn't exist, don't report an error */
+ return rc && rc != -ENOENT ? 1 : 0;
+ }
+
+ /*
+ * Insert / replace new value
+ */
+ for (i = 2, len = 0; i < argc; ++i)
+ len += strlen(argv[i]) + 1;
+
+ value = malloc(len);
+ if (value == NULL) {
+ printf("## Can't malloc %d bytes\n", len);
+ return 1;
+ }
+ for (i = 2, s = value; i < argc; ++i) {
+ char *v = argv[i];
+
+ while ((*s++ = *v++) != '\0')
+ ;
+ *(s - 1) = ' ';
+ }
+ if (s != value)
+ *--s = '\0';
+
+ e.key = name;
+ e.data = value;
+ hsearch_r(e, ENV_ENTER, &ep, &env_htab, env_flag);
+ free(value);
+ if (!ep) {
+ printf("## Error inserting \"%s\" variable, errno=%d\n",
+ name, errno);
+ return 1;
+ }
+
+ return 0;
+}
+
+int env_set(const char *varname, const char *varvalue)
+{
+ const char * const argv[4] = { "setenv", varname, varvalue, NULL };
+
+ /* before import into hashtable */
+ if (!(gd->flags & GD_FLG_ENV_READY))
+ return 1;
+
+ if (varvalue == NULL || varvalue[0] == '\0')
+ return env_do_env_set(0, 2, (char * const *)argv, H_PROGRAMMATIC);
+ else
+ return env_do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
+}
/**
* Set an environment variable to an integer value
dev = dev_desc->devnum;
ext4fs_set_blk_dev(dev_desc, &info);
- if (!ext4fs_mount(info.size)) {
+ if (!ext4fs_mount()) {
printf("\n** Unable to use %s %s for saveenv **\n",
ifname, dev_and_part);
return 1;
dev = dev_desc->devnum;
ext4fs_set_blk_dev(dev_desc, &info);
- if (!ext4fs_mount(info.size)) {
+ if (!ext4fs_mount()) {
printf("\n** Unable to use %s %s for loading the env **\n",
ifname, dev_and_part);
goto err_env_relocate;
{
struct btrfs_fs_info *fs_info = current_fs_info;
struct btrfs_root *root;
- loff_t real_size = 0;
+ loff_t real_size;
u64 ino;
u8 type;
int ret;
return -EINVAL;
}
- if (!len) {
- ret = btrfs_size(file, &real_size);
- if (ret < 0) {
- error("Failed to get inode size: %s", file);
- return ret;
- }
- len = real_size;
+ ret = btrfs_size(file, &real_size);
+ if (ret < 0) {
+ error("Failed to get inode size: %s", file);
+ return ret;
}
- if (len > real_size - offset)
+ if (!len || len > real_size - offset)
len = real_size - offset;
ret = btrfs_file_read(root, ino, offset, len, buf);
return -1;
}
-int ext4fs_mount(unsigned part_length)
+int ext4fs_mount(void)
{
struct ext2_data *data;
int status;
{
ext4fs_set_blk_dev(fs_dev_desc, fs_partition);
- if (!ext4fs_mount(fs_partition->size)) {
+ if (!ext4fs_mount()) {
ext4fs_close();
return -1;
}
#include <u-boot/zlib.h>
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+#include <u-boot/lz4.h>
+#endif
+
#if IS_ENABLED(CONFIG_ZSTD)
#include <linux/zstd.h>
#endif
case SQFS_COMP_ZLIB:
break;
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+ case SQFS_COMP_LZ4:
+ break;
+#endif
#if IS_ENABLED(CONFIG_ZSTD)
case SQFS_COMP_ZSTD:
ctxt->zstd_workspace = malloc(zstd_dctx_workspace_bound());
case SQFS_COMP_ZLIB:
break;
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+ case SQFS_COMP_LZ4:
+ break;
+#endif
#if IS_ENABLED(CONFIG_ZSTD)
case SQFS_COMP_ZSTD:
free(ctxt->zstd_workspace);
break;
#endif
+#if IS_ENABLED(CONFIG_LZ4)
+ case SQFS_COMP_LZ4:
+ ret = LZ4_decompress_safe(source, dest, src_len, *dest_len);
+ if (ret < 0) {
+ printf("LZ4 decompression failed.\n");
+ return -EINVAL;
+ }
+
+ ret = 0;
+ break;
+#endif
#if IS_ENABLED(CONFIG_ZSTD)
case SQFS_COMP_ZSTD:
ret = sqfs_zstd_decompress(ctxt, dest, *dest_len, source, src_len);
#define SQFS_COMP_LZ4 5
#define SQFS_COMP_ZSTD 6
-/* LZMA does not support any compression options */
-
-struct squashfs_gzip_opts {
- u32 compression_level;
- u16 window_size;
- u16 strategies;
-};
-
-struct squashfs_xz_opts {
- u32 dictionary_size;
- u32 executable_filters;
-};
-
-struct squashfs_lz4_opts {
- u32 version;
- u32 flags;
-};
-
-struct squashfs_zstd_opts {
- u32 compression_level;
-};
-
-struct squashfs_lzo_opts {
- u32 algorithm;
- u32 level;
-};
-
-union squashfs_compression_opts {
- struct squashfs_gzip_opts *gzip;
- struct squashfs_xz_opts *xz;
- struct squashfs_lz4_opts *lz4;
- struct squashfs_zstd_opts *zstd;
- struct squashfs_lzo_opts *lzo;
-};
-
int sqfs_decompress(struct squashfs_ctxt *ctxt, void *dest,
unsigned long *dest_len, void *source, u32 src_len);
int sqfs_decompressor_init(struct squashfs_ctxt *ctxt);
#include <part.h>
#include <stdint.h>
-#define SQFS_UNCOMPRESSED_DATA 0x0002
#define SQFS_MAGIC_NUMBER 0x73717368
/* The three first members of squashfs_dir_index make a total of 12 bytes */
#define SQFS_DIR_INDEX_BASE_LENGTH 12
#define SQFS_MAX_ENTRIES 512
/* Metadata blocks start by a 2-byte length header */
#define SQFS_HEADER_SIZE 2
-#define SQFS_LREG_INODE_MIN_SIZE 56
#define SQFS_DIR_HEADER_SIZE 12
#define SQFS_MISC_ENTRY_TYPE -1
#define SQFS_EMPTY_FILE_SIZE 3
#define SQFS_FRAGMENT_INDEX_OFFSET(A) ((A) % SQFS_MAX_ENTRIES)
#define SQFS_FRAGMENT_INDEX(A) ((A) / SQFS_MAX_ENTRIES)
#define SQFS_BLOCK_SIZE(A) ((A) & GENMASK(23, 0))
-#define SQFS_CHECK_FLAG(flag, bit) (((flag) >> (bit)) & 1)
/* Useful for both fragment and data blocks */
#define SQFS_COMPRESSED_BLOCK(A) (!((A) & BIT(24)))
-/* SQFS_COMPRESSED_DATA strictly used with super block's 'flags' member */
-#define SQFS_COMPRESSED_DATA(A) (!((A) & 0x0002))
#define SQFS_IS_FRAGMENTED(A) ((A) != 0xFFFFFFFF)
/*
* These two macros work as getters for a metada block header, retrieving the
#define SQFS_COMPRESSED_METADATA(A) (!((A) & BIT(15)))
#define SQFS_METADATA_SIZE(A) ((A) & GENMASK(14, 0))
-struct squashfs_super_block_flags {
- /* check: unused
- * uncompressed_ids: not supported
- */
- bool uncompressed_inodes;
- bool uncompressed_data;
- bool check;
- bool uncompressed_frags;
- bool no_frags;
- bool always_frags;
- bool duplicates;
- bool exportable;
- bool uncompressed_xattrs;
- bool no_xattrs;
- bool compressor_options;
- bool uncompressed_ids;
-};
-
#endif /* SQFS_UTILS_H */
void iput(struct inode *inode);
/* linux/include/time.h */
-#define NSEC_PER_SEC 1000000000L
#define get_seconds() 0
#define CURRENT_TIME_SEC ((struct timespec) { get_seconds(), 0 })
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-#ifndef _MCD_API_H
-#define _MCD_API_H
-
-/* Turn Execution Unit tasks ON (#define) or OFF (#undef) */
-#undef MCD_INCLUDE_EU
-
-/* Number of DMA channels */
-#define NCHANNELS 16
-
-/* Total number of variants */
-#ifdef MCD_INCLUDE_EU
-#define NUMOFVARIANTS 6
-#else
-#define NUMOFVARIANTS 4
-#endif
-
-/* Define sizes of the various tables */
-#define TASK_TABLE_SIZE (NCHANNELS*32)
-#define VAR_TAB_SIZE (128)
-#define CONTEXT_SAVE_SIZE (128)
-#define FUNCDESC_TAB_SIZE (256)
-
-#ifdef MCD_INCLUDE_EU
-#define FUNCDESC_TAB_NUM 16
-#else
-#define FUNCDESC_TAB_NUM 1
-#endif
-
-#ifndef DEFINESONLY
-
-/* Portability typedefs */
-#if 1
-#include "common.h"
-#else
-#ifndef s32
-typedef int s32;
-#endif
-#ifndef u32
-typedef unsigned int u32;
-#endif
-#ifndef s16
-typedef short s16;
-#endif
-#ifndef u16
-typedef unsigned short u16;
-#endif
-#ifndef s8
-typedef char s8;
-#endif
-#ifndef u8
-typedef unsigned char u8;
-#endif
-#endif
-
-/*
- * These structures represent the internal registers of the
- * multi-channel DMA
- */
-struct dmaRegs_s {
- u32 taskbar; /* task table base address */
- u32 currPtr;
- u32 endPtr;
- u32 varTablePtr;
- u16 dma_rsvd0;
- u16 ptdControl; /* ptd control */
- u32 intPending; /* interrupt pending */
- u32 intMask; /* interrupt mask */
- u16 taskControl[16]; /* task control */
- u8 priority[32]; /* priority */
- u32 initiatorMux; /* initiator mux control */
- u32 taskSize0; /* task size control 0. */
- u32 taskSize1; /* task size control 1. */
- u32 dma_rsvd1; /* reserved */
- u32 dma_rsvd2; /* reserved */
- u32 debugComp1; /* debug comparator 1 */
- u32 debugComp2; /* debug comparator 2 */
- u32 debugControl; /* debug control */
- u32 debugStatus; /* debug status */
- u32 ptdDebug; /* priority task decode debug */
- u32 dma_rsvd3[31]; /* reserved */
-};
-typedef volatile struct dmaRegs_s dmaRegs;
-
-#endif
-
-/* PTD contrl reg bits */
-#define PTD_CTL_TSK_PRI 0x8000
-#define PTD_CTL_COMM_PREFETCH 0x0001
-
-/* Task Control reg bits and field masks */
-#define TASK_CTL_EN 0x8000
-#define TASK_CTL_VALID 0x4000
-#define TASK_CTL_ALWAYS 0x2000
-#define TASK_CTL_INIT_MASK 0x1f00
-#define TASK_CTL_ASTRT 0x0080
-#define TASK_CTL_HIPRITSKEN 0x0040
-#define TASK_CTL_HLDINITNUM 0x0020
-#define TASK_CTL_ASTSKNUM_MASK 0x000f
-
-/* Priority reg bits and field masks */
-#define PRIORITY_HLD 0x80
-#define PRIORITY_PRI_MASK 0x07
-
-/* Debug Control reg bits and field masks */
-#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
-#define DBG_CTL_AUTO_ARM 0x00008000
-#define DBG_CTL_BREAK 0x00004000
-#define DBG_CTL_COMP1_TYP_MASK 0x00003800
-#define DBG_CTL_COMP2_TYP_MASK 0x00000070
-#define DBG_CTL_EXT_BREAK 0x00000004
-#define DBG_CTL_INT_BREAK 0x00000002
-
-/*
- * PTD Debug reg selector addresses
- * This reg must be written with a value to show the contents of
- * one of the desired internal register.
- */
-#define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */
-#define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and
- have initiators asserted */
-
-/* General return values */
-#define MCD_OK 0
-#define MCD_ERROR -1
-#define MCD_TABLE_UNALIGNED -2
-#define MCD_CHANNEL_INVALID -3
-
-/* MCD_initDma input flags */
-#define MCD_RELOC_TASKS 0x00000001
-#define MCD_NO_RELOC_TASKS 0x00000000
-#define MCD_COMM_PREFETCH_EN 0x00000002 /* MCF547x/548x ONLY */
-
-/*
- * MCD_dmaStatus Status Values for each channel:
- * MCD_NO_DMA - No DMA has been requested since reset
- * MCD_IDLE - DMA active, but the initiator is currently inactive
- * MCD_RUNNING - DMA active, and the initiator is currently active
- * MCD_PAUSED - DMA active but it is currently paused
- * MCD_HALTED - the most recent DMA has been killed with MCD_killTask()
- * MCD_DONE - the most recent DMA has completed
- */
-#define MCD_NO_DMA 1
-#define MCD_IDLE 2
-#define MCD_RUNNING 3
-#define MCD_PAUSED 4
-#define MCD_HALTED 5
-#define MCD_DONE 6
-
-/* MCD_startDma parameter defines */
-
-/* Constants for the funcDesc parameter */
-/*
- * MCD_NO_BYTE_SWAP - to disable byte swapping
- * MCD_BYTE_REVERSE - to reverse the bytes of each u32 of the DMAed data
- * MCD_U16_REVERSE - to reverse the 16-bit halves of each 32-bit data
- * value being DMAed
- * MCD_U16_BYTE_REVERSE - to reverse the byte halves of each 16-bit half of
- * each 32-bit data value DMAed
- * MCD_NO_BIT_REV - do not reverse the bits of each byte DMAed
- * MCD_BIT_REV - reverse the bits of each byte DMAed
- * MCD_CRC16 - to perform CRC-16 on DMAed data
- * MCD_CRCCCITT - to perform CRC-CCITT on DMAed data
- * MCD_CRC32 - to perform CRC-32 on DMAed data
- * MCD_CSUMINET - to perform internet checksums on DMAed data
- * MCD_NO_CSUM - to perform no checksumming
- */
-#define MCD_NO_BYTE_SWAP 0x00045670
-#define MCD_BYTE_REVERSE 0x00076540
-#define MCD_U16_REVERSE 0x00067450
-#define MCD_U16_BYTE_REVERSE 0x00054760
-#define MCD_NO_BIT_REV 0x00000000
-#define MCD_BIT_REV 0x00088880
-/* CRCing: */
-#define MCD_CRC16 0xc0100000
-#define MCD_CRCCCITT 0xc0200000
-#define MCD_CRC32 0xc0300000
-#define MCD_CSUMINET 0xc0400000
-#define MCD_NO_CSUM 0xa0000000
-
-#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | \
- MCD_NO_CSUM)
-#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
-
-/* Constants for the flags parameter */
-#define MCD_TT_FLAGS_RL 0x00000001 /* Read line */
-#define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */
-#define MCD_TT_FLAGS_SP 0x00000004 /* MCF547x/548x ONLY */
-#define MCD_TT_FLAGS_MASK 0x000000ff
-#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
-
-#define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */
-#define MCD_CHAIN_DMA /* TBD */
-#define MCD_EU_DMA /* TBD */
-#define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */
-#define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */
-
-/* these flags are valid for MCD_startDma and the chained buffer descriptors */
-/*
- * MCD_BUF_READY - indicates that this buf is now under the DMA's ctrl
- * MCD_WRAP - to tell the FEC Dmas to wrap to the first BD
- * MCD_INTERRUPT - to generate an interrupt after completion of the DMA
- * MCD_END_FRAME - tell the DMA to end the frame when transferring
- * last byte of data in buffer
- * MCD_CRC_RESTART - to empty out the accumulated checksum prior to
- * performing the DMA
- */
-#define MCD_BUF_READY 0x80000000
-#define MCD_WRAP 0x20000000
-#define MCD_INTERRUPT 0x10000000
-#define MCD_END_FRAME 0x08000000
-#define MCD_CRC_RESTART 0x40000000
-
-/* Defines for the FEC buffer descriptor control/status word*/
-#define MCD_FEC_BUF_READY 0x8000
-#define MCD_FEC_WRAP 0x2000
-#define MCD_FEC_INTERRUPT 0x1000
-#define MCD_FEC_END_FRAME 0x0800
-
-/* Defines for general intuitiveness */
-
-#define MCD_TRUE 1
-#define MCD_FALSE 0
-
-/* Three different cases for destination and source. */
-#define MINUS1 -1
-#define ZERO 0
-#define PLUS1 1
-
-#ifndef DEFINESONLY
-
-/* Task Table Entry struct*/
-typedef struct {
- u32 TDTstart; /* task descriptor table start */
- u32 TDTend; /* task descriptor table end */
- u32 varTab; /* variable table start */
- u32 FDTandFlags; /* function descriptor table start & flags */
- volatile u32 descAddrAndStatus;
- volatile u32 modifiedVarTab;
- u32 contextSaveSpace; /* context save space start */
- u32 literalBases;
-} TaskTableEntry;
-
-/* Chained buffer descriptor:
- * flags - flags describing the DMA
- * csumResult - checksum performed since last checksum reset
- * srcAddr - the address to move data from
- * destAddr - the address to move data to
- * lastDestAddr - the last address written to
- * dmaSize - the no of bytes to xfer independent of the xfer sz
- * next - next buffer descriptor in chain
- * info - private info about this descriptor; DMA does not affect it
- */
-typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
-struct MCD_bufDesc_struct {
- u32 flags;
- u32 csumResult;
- s8 *srcAddr;
- s8 *destAddr;
- s8 *lastDestAddr;
- u32 dmaSize;
- MCD_bufDesc *next;
- u32 info;
-};
-
-/* Progress Query struct:
- * lastSrcAddr - the most-recent or last, post-increment source address
- * lastDestAddr - the most-recent or last, post-increment destination address
- * dmaSize - the amount of data transferred for the current buffer
- * currBufDesc - pointer to the current buffer descriptor being DMAed
- */
-
-typedef volatile struct MCD_XferProg_struct {
- s8 *lastSrcAddr;
- s8 *lastDestAddr;
- u32 dmaSize;
- MCD_bufDesc *currBufDesc;
-} MCD_XferProg;
-
-/* FEC buffer descriptor */
-typedef volatile struct MCD_bufDescFec_struct {
- u16 statCtrl;
- u16 length;
- u32 dataPointer;
-} MCD_bufDescFec;
-
-/*************************************************************************/
-/* API function Prototypes - see MCD_dmaApi.c for further notes */
-
-/* MCD_startDma starts a particular kind of DMA:
- * srcAddr - the channel on which to run the DMA
- * srcIncr - the address to move data from, or buffer-descriptor address
- * destAddr - the amount to increment the source address per transfer
- * destIncr - the address to move data to
- * dmaSize - the amount to increment the destination address per transfer
- * xferSize - the number bytes in of each data movement (1, 2, or 4)
- * initiator - what device initiates the DMA
- * priority - priority of the DMA
- * flags - flags describing the DMA
- * funcDesc - description of byte swapping, bit swapping, and CRC actions
- */
-int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr,
- s16 destIncr, u32 dmaSize, u32 xferSize, u32 initiator,
- int priority, u32 flags, u32 funcDesc);
-
-/*
- * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
- * registers, relocating and creating the appropriate task structures, and
- * setting up some global settings
- */
-int MCD_initDma(dmaRegs * sDmaBarAddr, void *taskTableDest, u32 flags);
-
-/* MCD_dmaStatus() returns the status of the DMA on the requested channel. */
-int MCD_dmaStatus(int channel);
-
-/* MCD_XferProgrQuery() returns progress of DMA on requested channel */
-int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep);
-
-/*
- * MCD_killDma() halts the DMA on the requested channel, without any
- * intention of resuming the DMA.
- */
-int MCD_killDma(int channel);
-
-/*
- * MCD_continDma() continues a DMA which as stopped due to encountering an
- * unready buffer descriptor.
- */
-int MCD_continDma(int channel);
-
-/*
- * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
- * running on that channel).
- */
-int MCD_pauseDma(int channel);
-
-/*
- * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
- * running on that channel).
- */
-int MCD_resumeDma(int channel);
-
-/* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA */
-int MCD_csumQuery(int channel, u32 * csum);
-
-/*
- * MCD_getCodeSize provides the packed size required by the microcoded task
- * and structures.
- */
-int MCD_getCodeSize(void);
-
-/*
- * MCD_getVersion provides a pointer to a version string and returns a
- * version number.
- */
-int MCD_getVersion(char **longVersion);
-
-/* macro for setting a location in the variable table */
-#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
-/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
- so I'm avoiding surrounding it with "do {} while(0)" */
-
-#endif /* DEFINESONLY */
-
-#endif /* _MCD_API_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
- /* This file is autogenerated. Do not change */
-#define CURRBD 4
-#define DCOUNT 6
-#define DESTPTR 5
-#define SRCPTR 7
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- */
-
-#ifndef MCD_TSK_INIT_H
-#define MCD_TSK_INIT_H 1
-
-/*
- * Do not edit!
- */
-
-/* Task 0 */
-void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 1 */
-void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 2 */
-void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr,
- int xferSize, short xferSizeIncr, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 3 */
-void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr,
- short destIncr, int dmaSize, short xferSizeIncr,
- int flags, int *currBD, int *cSave,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 4 */
-void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr,
- volatile TaskTableEntry * taskTable, int channel);
-
-/* Task 5 */
-void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr,
- volatile TaskTableEntry * taskTable, int channel);
-
-#endif /* MCD_TSK_INIT_H */
*/
int sata_scan(struct udevice *dev);
-int ahci_init(void __iomem *base);
-int ahci_reset(void __iomem *base);
-
/**
* ahci_init_one_dm() - set up a single AHCI port
*
#ifndef __BCB_H__
#define __BCB_H__
+#include <part.h>
+
+enum bcb_field {
+ BCB_FIELD_COMMAND,
+ BCB_FIELD_STATUS,
+ BCB_FIELD_RECOVERY,
+ BCB_FIELD_STAGE
+};
+
#if IS_ENABLED(CONFIG_CMD_BCB)
-int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp);
+
+int bcb_find_partition_and_load(const char *iface,
+ int devnum, char *partp);
+int bcb_load(struct blk_desc *block_description,
+ struct disk_partition *disk_partition);
+int bcb_set(enum bcb_field field, const char *value);
+
+/**
+ * bcb_get() - get the field value.
+ * @field: field to get
+ * @value_out: buffer to copy bcb field value to
+ * @value_size: buffer size to avoid overflow in case
+ * value_out is smaller then the field value
+ */
+int bcb_get(enum bcb_field field, char *value_out, size_t value_size);
+
+int bcb_store(void);
+void bcb_reset(void);
+
#else
+
#include <linux/errno.h>
-static inline int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp)
+
+static inline int bcb_load(struct blk_desc *block_description,
+ struct disk_partition *disk_partition)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline int bcb_find_partition_and_load(const char *iface,
+ int devnum, char *partp)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline int bcb_set(enum bcb_field field, const char *value)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline int bcb_get(enum bcb_field field, char *value_out)
{
return -EOPNOTSUPP;
}
+
+static inline int bcb_store(void)
+{
+ return -EOPNOTSUPP;
+}
+
+static inline void bcb_reset(void)
+{
+}
#endif
#endif /* __BCB_H__ */
#ifndef _BLKMAP_H
#define _BLKMAP_H
+#include <dm/lists.h>
+
+/**
+ * struct blkmap - Block map
+ *
+ * Data associated with a blkmap.
+ *
+ * @label: Human readable name of this blkmap
+ * @blk: Underlying block device
+ * @slices: List of slices associated with this blkmap
+ */
+struct blkmap {
+ char *label;
+ struct udevice *blk;
+ struct list_head slices;
+};
+
/**
* blkmap_map_linear() - Map region of other block device
*
*/
int blkmap_destroy(struct udevice *dev);
+/**
+ * blkmap_create_ramdisk() - Create new ramdisk with blkmap
+ *
+ * @label: Label of the new blkmap
+ * @image_addr: Target memory start address of this mapping
+ * @image_size: Target memory size of this mapping
+ * @devp: Updated with the address of the created blkmap device
+ * Returns: 0 on success, negative error code on failure
+ */
+int blkmap_create_ramdisk(const char *label, ulong image_addr, ulong image_size,
+ struct udevice **devp);
+
#endif /* _BLKMAP_H */
#ifndef _BOOTCOUNT_H__
#define _BOOTCOUNT_H__
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/byteorder.h>
* MMC
*/
-/* SATA */
-#ifndef PCI_DEVICE_ID_FREESCALE_AHCI
-#define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440
-#endif
-#define CFG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \
- PCI_DEVICE_ID_FREESCALE_AHCI}
-
/* SPI */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
CSOR_NOR_TRHZ_80)
#endif
-/* SATA */
-#define SCSI_VEND_ID 0x1b4b
-#define SCSI_DEV_ID 0x9170
-#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
-
/* Initial environment variables */
#ifndef SPL_NO_ENV
#undef CFG_EXTRA_ENV_SETTINGS
#endif
#endif
-/* SATA */
-#ifndef SPL_NO_SATA
-#define SCSI_VEND_ID 0x1b4b
-#define SCSI_DEV_ID 0x9170
-#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
-#endif
-
#include <asm/fsl_secure_boot.h>
#endif /* __LS1043ARDB_H__ */
"env_mmc_blknum=0xf80\0" \
"env_mmc_nblks=0x80\0" \
"kernel_addr_r=0x30000000\0" \
- "pxefile_addr_r=0x32000000\0" \
- "scriptaddr=0x32000000\0" \
- "fdt_addr_r=0x32200000\0" \
+ "pxefile_addr_r=0x33000000\0" \
+ "scriptaddr=0x33000000\0" \
+ "fdt_addr_r=0x33200000\0" \
"fdtfile=hisilicon/hi3798cv200-poplar.dtb\0" \
- "ramdisk_addr_r=0x32400000\0" \
+ "ramdisk_addr_r=0x33400000\0" \
BOOTENV
#endif /* _POPLAR_H_ */
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */
+/*
+ * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
+ *
+ * Configuration settings for the STM32MP25x CPU
+ */
+
+#ifndef __CONFIG_STM32MP25_COMMMON_H
+#define __CONFIG_STM32MP25_COMMMON_H
+#include <linux/sizes.h>
+#include <asm/arch/stm32.h>
+
+/*
+ * Configuration of the external SRAM memory used by U-Boot
+ */
+#define CFG_SYS_SDRAM_BASE STM32_DDR_BASE
+
+/*
+ * For booting Linux, use the first 256 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_SYS_BOOTMAPSZ SZ_256M
+
+#endif /* __CONFIG_STM32MP25_COMMMON_H */
#ifndef __DFU_ENTITY_H_
#define __DFU_ENTITY_H_
-#include <common.h>
#include <linux/list.h>
#include <mmc.h>
#include <spi_flash.h>
#ifndef __DISPLAY_OPTIONS_H
#define __DISPLAY_OPTIONS_H
+#include <linux/types.h>
+
/**
* print_size() - Print a size with a suffix
*
* @size: Size to print
* @suffix String to print after the size
*/
-#include <display_options.h>
void print_size(uint64_t size, const char *suffix);
/**
#define STM32MP_PKG_AB 0x2
#define STM32MP_PKG_AC 0x4
#define STM32MP_PKG_AD 0x8
+#define STM32MP_PKG_AI 0x100
+#define STM32MP_PKG_AK 0x400
+#define STM32MP_PKG_AL 0x800
#endif /* _DT_BINDINGS_STM32_PINFUNC_H */
struct efi_event *event,
void *context),
void *notify_context,
- efi_guid_t *event_group,
+ const efi_guid_t *event_group,
struct efi_event **event);
};
#define EFI_EVENT_GROUP_RESET_SYSTEM \
EFI_GUID(0x62da6a56, 0x13fb, 0x485a, 0xa8, 0xda, \
0xa3, 0xdd, 0x79, 0x12, 0xcb, 0x6b)
+#define EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR \
+ EFI_GUID(0xb4a40fe6, 0x9149, 0x4f29, 0x94, 0x47, \
+ 0x49, 0x38, 0x7a, 0x7f, 0xab, 0x87)
/* EFI Configuration Table and GUID definitions */
#define NULL_GUID \
#ifndef _EFI_LOADER_H
#define _EFI_LOADER_H 1
-#include <common.h>
#include <blk.h>
#include <event.h>
#include <log.h>
extern const efi_guid_t efi_guid_event_group_ready_to_boot;
/* event group ResetSystem() invoked (before ExitBootServices) */
extern const efi_guid_t efi_guid_event_group_reset_system;
+/* event group return to efibootmgr */
+extern const efi_guid_t efi_guid_event_group_return_to_efibootmgr;
/* GUID of the device tree table */
extern const efi_guid_t efi_guid_fdt;
extern const efi_guid_t efi_guid_loaded_image;
void (EFIAPI *notify_function) (
struct efi_event *event,
void *context),
- void *notify_context, efi_guid_t *group,
+ void *notify_context, const efi_guid_t *group,
struct efi_event **event);
/* Call this to set a timer */
efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type,
#ifndef _EFI_SELFTEST_H
#define _EFI_SELFTEST_H
-#include <common.h>
#include <efi.h>
#include <efi_api.h>
#include <efi_loader.h>
*/
int env_get_id(void);
+/**
+ * env_inc_id() - Increase the sequence number for the environment
+ *
+ * Increment the value that is used by env_get_id() to inform callers
+ * if the environment has changed since they last checked.
+ */
+void env_inc_id(void);
+
/**
* env_init() - Set up the pre-relocation environment
*
extern struct hsearch_data env_htab;
+/**
+ * env_do_env_set() - Perform the actual setting of an environment variable
+ *
+ * Due to the number of places we may need to set an environmental variable
+ * from we have an exposed internal function that performs the real work and
+ * then call this from both the command line function as well as other
+ * locations.
+ *
+ * Return: 0 on success or 1 on failure
+ */
+int env_do_env_set(int flag, int argc, char *const argv[], int env_flag);
+
/**
* env_ext4_get_intf() - Provide the interface for env in EXT4
*
struct ext_filesystem *get_fs(void);
int ext4fs_open(const char *filename, loff_t *len);
int ext4fs_read(char *buf, loff_t offset, loff_t len, loff_t *actread);
-int ext4fs_mount(unsigned part_length);
+int ext4fs_mount(void);
void ext4fs_close(void);
void ext4fs_reinit_global(void);
int ext4fs_ls(const char *dirname);
#ifndef __FM_ETH_H__
#define __FM_ETH_H__
-#include <common.h>
#include <phy.h>
#include <asm/types.h>
#ifndef _FS_H
#define _FS_H
-#include <common.h>
#include <rtc.h>
struct cmd_tbl;
#ifndef __FSL_MC_H__
#define __FSL_MC_H__
-#include <common.h>
#include <linux/bitops.h>
+struct bd_info;
+
#define MC_CCSR_BASE_ADDR \
((struct mc_ccsr_registers __iomem *)0x8340000)
#ifndef _FSL_ERRATA_H
#define _FSL_ERRATA_H
-#include <common.h>
#if defined(CONFIG_PPC)
#include <asm/processor.h>
#elif defined(CONFIG_ARCH_LS1021A)
#ifdef CONFIG_FSL_IFC
#include <config.h>
-#include <common.h>
#include <part.h>
#ifdef CONFIG_ARM
#include <asm/arch/soc.h>
#ifndef __QE_H__
#define __QE_H__
-#include "common.h"
#ifdef CONFIG_U_QE
#include <linux/immap_qe.h>
#endif
#ifndef __FSL_SEC_H
#define __FSL_SEC_H
-#include <common.h>
#include <asm/io.h>
#ifdef CONFIG_SYS_FSL_SEC_LE
#ifndef __FSL_SEC_MON_H
#define __FSL_SEC_MON_H
-#include <common.h>
#include <asm/io.h>
#ifdef CONFIG_SYS_FSL_SEC_MON_LE
#ifndef _FSL_SFP_SNVS_
#define _FSL_SFP_SNVS_
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#ifndef __IOTRACE_H
#define __IOTRACE_H
-//#include <common.h>
#include <linux/types.h>
/* Support up to the machine word length for now */
#ifdef CONFIG_UNIT_TEST
TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in,
struct k210_pll_config *best);
-#ifndef nop
-#define nop()
-#endif
#endif
#endif /* K210_PLL_H */
#ifndef _KEY_MATRIX_H
#define _KEY_MATRIX_H
-#include <common.h>
/* Information about a matrix keyboard */
struct key_matrix {
#ifndef __LIBATA_H__
#define __LIBATA_H__
-#include <common.h>
enum {
/* various global constants */
#ifndef __LINUX_MII_H__
#define __LINUX_MII_H__
+#include <linux/types.h>
+
/* Generic MII registers. */
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
#ifdef __UBOOT__
/* drivers/mtd/mtdcore.h */
+#if CONFIG_IS_ENABLED(MTD)
int add_mtd_device(struct mtd_info *mtd);
int del_mtd_device(struct mtd_info *mtd);
+#else
+static inline int add_mtd_device(struct mtd_info *mtd)
+{
+ return -ENOSYS;
+}
+
+static inline int del_mtd_device(struct mtd_info *mtd)
+{
+ return -ENOSYS;
+}
+#endif
#ifdef CONFIG_MTD_PARTITIONS
int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
#else
-#include <common.h>
#include <spi.h>
#include <spi-mem.h>
#include <linux/mtd/nand.h>
#define _REENT_ONLY
+#define MSEC_PER_SEC 1000L
+#define USEC_PER_MSEC 1000L
+#define NSEC_PER_USEC 1000L
+#define NSEC_PER_MSEC 1000000L
+#define USEC_PER_SEC 1000000L
+#define NSEC_PER_SEC 1000000000L
+#define PSEC_PER_SEC 1000000000000LL
+#define FSEC_PER_SEC 1000000000000000LL
+
#define SECSPERMIN 60L
#define MINSPERHOUR 60L
#define HOURSPERDAY 24L
* the composite model the host can use both functions at the same time.
*/
-#include <common.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/bitmap.h>
#ifndef _miiphy_h_
#define _miiphy_h_
-#include <common.h>
#include <linux/mii.h>
#include <linux/list.h>
#include <net.h>
#ifndef __MPC83XX_H__
#define __MPC83XX_H__
-#include <config.h>
-#include <asm/fsl_lbc.h>
#if defined(CONFIG_E300)
#include <asm/e300.h>
#endif
#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
/* map to cfi_flash_num_flash_banks only when supported */
#if IS_ENABLED(CONFIG_FLASH_CFI_DRIVER) && \
- (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD_SUPPORT))
+ (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD))
#define CFI_FLASH_BANKS (cfi_flash_num_flash_banks)
/* board code can update this variable before CFI detection */
extern int cfi_flash_num_flash_banks;
#ifndef __MV886352_H
#define __MV886352_H
-#include <common.h>
/* PHY registers */
#define PHY(itf) (itf)
#include <config.h>
extern void nand_init(void);
+void nand_reinit(void);
unsigned long nand_size(void);
+unsigned int nand_page_size(void);
#include <linux/compat.h>
#include <linux/mtd/mtd.h>
#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
void board_nand_init(void);
int nand_register(int devnum, struct mtd_info *mtd);
+void nand_unregister(struct mtd_info *mtd);
#else
struct nand_chip;
static inline void eth_set_enable_bootdevs(bool enable) {}
#endif
+/**
+ * wget_with_dns() - runs dns host IP address resulution before wget
+ *
+ * @dst_addr: destination address to download the file
+ * @uri: uri string of target file of wget
+ * Return: downloaded file size, negative if failed
+ */
+int wget_with_dns(ulong dst_addr, char *uri);
+
+/**
+ * wget_validate_uri() - varidate the uri
+ *
+ * @uri: uri string of target file of wget
+ * Return: true if uri is valid, false if uri is invalid
+ */
+bool wget_validate_uri(char *uri);
+
#endif /* __NET_H__ */
* Copyright (C) 2019, IBM Corporation.
*/
-#include <common.h>
#include <phy.h>
bool ncsi_active(void);
*/
int os_persistent_file(char *buf, int maxsize, const char *fname);
+/**
+ * os_mktemp() - Create a temporary file
+ * @fname: The template to use for the file name. This must end with 6 Xs. It
+ * will be modified to the opened filename on success.
+ * @size: The size of the file
+ *
+ * Create a temporary file using @fname as a template, unlink it, and truncate
+ * it to @size.
+ *
+ * Return: A file descriptor, or negative errno on error
+ */
+int os_mktemp(char *fname, off_t size);
+
/**
* os_exit() - access to the OS exit() system call
*
#ifndef PALMAS_H
#define PALMAS_H
-#include <common.h>
#include <i2c.h>
/* I2C chip addresses, TW6035/37 */
#define _POST_H
#ifndef __ASSEMBLY__
-#include <common.h>
#include <asm/io.h>
#if defined(CONFIG_POST)
#define __SATA_H__
#include <part.h>
-#if !defined(CONFIG_DM_SCSI) && !defined(CONFIG_AHCI)
-int init_sata(int dev);
-int reset_sata(int dev);
-int scan_sata(int dev);
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer);
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer);
-
-int sata_initialize(void);
-int __sata_initialize(void);
-int sata_stop(void);
-int __sata_stop(void);
-int sata_port_status(int dev, int port);
-
-extern struct blk_desc sata_dev_desc[];
-#endif
-
int sata_probe(int devnum);
int sata_remove(int devnum);
#include <bouncebuf.h>
#include <linux/dma-direction.h>
-/* Fix this to the maximum */
-#define SCSI_MAX_DEVICE \
- (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN)
-
struct udevice;
/**
*/
int scsi_scan_dev(struct udevice *dev, bool verbose);
-#ifndef CONFIG_DM_SCSI
-void scsi_low_level_init(int busdevfunc);
-void scsi_init(void);
-#endif
-
#define SCSI_IDENTIFY 0xC0 /* not used */
/* Hardware errors */
#ifndef _SPI_H_
#define _SPI_H_
-#include <common.h>
#include <linux/bitops.h>
/* SPI mode flags */
/**
* Information required to load data from a device
*
- * @dev: Pointer to the device, e.g. struct mmc *
* @priv: Private data for the device
* @bl_len: Block length for reading in bytes
- * @filename: Name of the fit image file.
* @read: Function to call to read from the device
*/
struct spl_load_info {
- void *dev;
void *priv;
- int bl_len;
- const char *filename;
/**
* read() - Read from device
*
* @load: Information about the load state
- * @sector: Sector number to read from (each @load->bl_len bytes)
- * @count: Number of sectors to read
+ * @offset: Offset to read from in bytes. This must be a multiple of
+ * @load->bl_len.
+ * @count: Number of bytes to read. This must be a multiple of
+ * @load->bl_len.
* @buf: Buffer to read into
- * @return number of sectors read, 0 on error
+ * @return number of bytes read, 0 on error
*/
ulong (*read)(struct spl_load_info *load, ulong sector, ulong count,
void *buf);
+#if IS_ENABLED(CONFIG_SPL_LOAD_BLOCK)
+ int bl_len;
+};
+
+static inline int spl_get_bl_len(struct spl_load_info *info)
+{
+ return info->bl_len;
+}
+
+static inline void spl_set_bl_len(struct spl_load_info *info, int bl_len)
+{
+ info->bl_len = bl_len;
+}
+#else
};
+static inline int spl_get_bl_len(struct spl_load_info *info)
+{
+ return 1;
+}
+
+static inline void spl_set_bl_len(struct spl_load_info *info, int bl_len)
+{
+ if (bl_len != 1)
+ panic("CONFIG_SPL_LOAD_BLOCK not enabled");
+}
+#endif
+
/*
* We need to know the position of U-Boot in memory so we can jump to it. We
* allow any U-Boot binary to be used (u-boot.bin, u-boot-nodtb.bin,
* spl_load_simple_fit() - Loads a fit image from a device.
* @spl_image: Image description to set up
* @info: Structure containing the information required to load data.
- * @sector: Sector number where FIT image is located in the device
+ * @offset: Offset where FIT image is located in the device. Must be aligned
+ * to the device's bl_len.
* @fdt: Pointer to the copied FIT header.
*
* Reads the FIT image @sector in the device. Loads u-boot image to
* Returns 0 on success.
*/
int spl_load_simple_fit(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector, void *fdt);
+ struct spl_load_info *info, ulong offset, void *fdt);
#define SPL_COPY_PAYLOAD_ONLY 1
#define SPL_FIT_FOUND 2
+/**
+ * spl_load_legacy_lzma() - Load an LZMA-compressed legacy image
+ * @spl_image: Image description (already set up)
+ * @load: Structure containing the information required to load data.
+ * @offset: Pointer to image
+ *
+ * Load/decompress an LZMA-compressed legacy image from the device.
+ *
+ * Return: 0 on success, or a negative error on failure
+ */
+int spl_load_legacy_lzma(struct spl_image_info *spl_image,
+ struct spl_load_info *load, ulong offset);
+
/**
* spl_load_legacy_img() - Loads a legacy image from a device.
* @spl_image: Image description to set up
* spl_load_imx_container() - Loads a imx container image from a device.
* @spl_image: Image description to set up
* @info: Structure containing the information required to load data.
- * @sector: Sector number where container image is located in the device
+ * @sector: Offset where container image is located in the device. Must be
+ * aligned to the device block size.
*
* Reads the container image @sector in the device. Loads u-boot image to
* specified load address.
*/
int spl_load_imx_container(struct spl_image_info *spl_image,
- struct spl_load_info *info, ulong sector);
+ struct spl_load_info *info, ulong offset);
/* SPL common functions */
void preloader_console_init(void);
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) Sean Anderson <seanga2@gmail.com>
+ */
+#ifndef _SPL_LOAD_H_
+#define _SPL_LOAD_H_
+
+#include <image.h>
+#include <imx_container.h>
+#include <mapmem.h>
+#include <spl.h>
+
+static inline int _spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
+ struct spl_load_info *info, size_t size,
+ size_t offset)
+{
+ struct legacy_img_hdr *header =
+ spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+ ulong base_offset, image_offset, overhead;
+ int read, ret;
+
+ read = info->read(info, offset, ALIGN(sizeof(*header),
+ spl_get_bl_len(info)), header);
+ if (read < sizeof(*header))
+ return -EIO;
+
+ if (image_get_magic(header) == FDT_MAGIC) {
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)) {
+ void *buf;
+
+ /*
+ * In order to support verifying images in the FIT, we
+ * need to load the whole FIT into memory. Try and
+ * guess how much we need to load by using the total
+ * size. This will fail for FITs with external data,
+ * but there's not much we can do about that.
+ */
+ if (!size)
+ size = round_up(fdt_totalsize(header), 4);
+ buf = map_sysmem(CONFIG_SYS_LOAD_ADDR, size);
+ read = info->read(info, offset,
+ ALIGN(size, spl_get_bl_len(info)),
+ buf);
+ if (read < size)
+ return -EIO;
+
+ return spl_parse_image_header(spl_image, bootdev, buf);
+ }
+
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT))
+ return spl_load_simple_fit(spl_image, info, offset,
+ header);
+ }
+
+ if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) &&
+ valid_container_hdr((void *)header))
+ return spl_load_imx_container(spl_image, info, offset);
+
+ if (IS_ENABLED(CONFIG_SPL_LZMA) &&
+ image_get_magic(header) == IH_MAGIC &&
+ image_get_comp(header) == IH_COMP_LZMA) {
+ spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
+ ret = spl_parse_image_header(spl_image, bootdev, header);
+ if (ret)
+ return ret;
+
+ return spl_load_legacy_lzma(spl_image, info, offset);
+ }
+
+ ret = spl_parse_image_header(spl_image, bootdev, header);
+ if (ret)
+ return ret;
+
+ base_offset = spl_image->offset;
+ /* Only NOR sets this flag. */
+ if (IS_ENABLED(CONFIG_SPL_NOR_SUPPORT) &&
+ spl_image->flags & SPL_COPY_PAYLOAD_ONLY)
+ base_offset += sizeof(*header);
+ image_offset = ALIGN_DOWN(base_offset, spl_get_bl_len(info));
+ overhead = base_offset - image_offset;
+ size = ALIGN(spl_image->size + overhead, spl_get_bl_len(info));
+
+ read = info->read(info, offset + image_offset, size,
+ map_sysmem(spl_image->load_addr - overhead, size));
+ return read < spl_image->size ? -EIO : 0;
+}
+
+/*
+ * Although spl_load results in size reduction for callers, this is generally
+ * not enough to counteract the bloat if there is only one caller. The core
+ * problem is that the compiler can't optimize across translation units. The
+ * general solution to this is CONFIG_LTO, but that is not available on all
+ * architectures. Perform a pseudo-LTO just for this function by declaring it
+ * inline if there is one caller, and extern otherwise.
+ */
+#define SPL_LOAD_USERS \
+ IS_ENABLED(CONFIG_SPL_BLK_FS) + \
+ IS_ENABLED(CONFIG_SPL_FS_EXT4) + \
+ IS_ENABLED(CONFIG_SPL_FS_FAT) + \
+ IS_ENABLED(CONFIG_SPL_SYS_MMCSD_RAW_MODE) + \
+ (IS_ENABLED(CONFIG_SPL_NAND_SUPPORT) && !IS_ENABLED(CONFIG_SPL_UBI)) + \
+ IS_ENABLED(CONFIG_SPL_NET) + \
+ IS_ENABLED(CONFIG_SPL_NOR_SUPPORT) + \
+ IS_ENABLED(CONFIG_SPL_SEMIHOSTING) + \
+ IS_ENABLED(CONFIG_SPL_SPI_LOAD) + \
+ 0
+
+#if SPL_LOAD_USERS > 1
+/**
+ * spl_load() - Parse a header and load the image
+ * @spl_image: Image data which will be filled in by this function
+ * @bootdev: The device to load from
+ * @info: Describes how to load additional information from @bootdev. At the
+ * minimum, read() and bl_len must be populated.
+ * @size: The size of the image, in bytes, if it is known in advance. Some boot
+ * devices (such as filesystems) know how big an image is before parsing
+ * the header. If 0, then the size will be determined from the header.
+ * @offset: The offset from the start of @bootdev, in bytes. This should have
+ * the offset @header was loaded from. It will be added to any offsets
+ * passed to @info->read().
+ *
+ * This function determines the image type (FIT, legacy, i.MX, raw, etc), calls
+ * the appropriate parsing function, determines the load address, and the loads
+ * the image from storage. It is designed to replace ad-hoc image loading which
+ * may not support all image types (especially when config options are
+ * involved).
+ *
+ * Return: 0 on success, or a negative error on failure
+ */
+int spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev, struct spl_load_info *info,
+ size_t size, size_t offset);
+#else
+static inline int spl_load(struct spl_image_info *spl_image,
+ const struct spl_boot_device *bootdev,
+ struct spl_load_info *info, size_t size,
+ size_t offset)
+{
+ return _spl_load(spl_image, bootdev, info, size, offset);
+}
+#endif
+
+#endif /* _SPL_LOAD_H_ */
#define SPL_PAYLOAD_ARGS_ADDR 0
#endif
+/* Number of pages per block */
+#define SYS_NAND_BLOCK_PAGES \
+ (CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE)
+
#endif
#ifndef __include_tegra_kbc_h__
#define __include_tegra_kbc_h__
-#include <common.h>
#define KEY_IS_MODIFIER(key) ((key) >= KEY_FIRST_MODIFIER)
int check_image_info(struct unit_test_state *uts, struct spl_image_info *info1,
struct spl_image_info *info2);
+/* Some compressed data and it size */
+extern const char lzma_compressed[];
+extern const size_t lzma_compressed_size;
+
/**
* typedef write_image_t - Callback for writing an image
* @uts: Current unit test state
#ifndef TWL4030_H
#define TWL4030_H
-#include <common.h>
#include <i2c.h>
/* I2C chip addresses */
#ifndef TWL6030_H
#define TWL6030_H
-#include <common.h>
#include <i2c.h>
/* I2C chip addresses */
#ifndef __UBOOT_UBI_H
#define __UBOOT_UBI_H
-#include <common.h>
#include <compiler.h>
#include <linux/compat.h>
#include <malloc.h>
#ifndef __USBDCORE_H__
#define __USBDCORE_H__
-#include <common.h>
#include "usbdescriptors.h"
config LIB_UUID
bool
+config RANDOM_UUID
+ bool "GPT Random UUID generation"
+ select LIB_UUID
+ help
+ Enable the generation of partitions with random UUIDs if none
+ are provided.
+
config SPL_LIB_UUID
depends on SPL
bool
config SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails"
- depends on SEMIHOSTING && (ARM64 || RISCV)
+ depends on SEMIHOSTING
default y
help
Normally, if U-Boot makes a semihosting call and no debugger is
config SPL_SEMIHOSTING_FALLBACK
bool "Recover gracefully when semihosting fails in SPL"
- depends on SPL_SEMIHOSTING && (ARM64 || RISCV)
+ depends on SPL_SEMIHOSTING
select ARMV8_SPL_EXCEPTION_VECTORS if ARM64
default y
help
if EFI_LOADER
-config CMD_BOOTEFI_BOOTMGR
+config BOOTEFI_BOOTMGR
bool "UEFI Boot Manager"
default y
select BOOTMETH_GLOBAL if BOOTSTD
help
Select this option if you want to select the UEFI binary to be booted
- via UEFI variables Boot####, BootOrder, and BootNext. This enables the
- 'bootefi bootmgr' command.
+ via UEFI variables Boot####, BootOrder, and BootNext. You should also
+ normally enable CMD_BOOTEFI_BOOTMGR so that the command is available.
choice
prompt "Store for non-volatile UEFI variables"
replace the transfer via the device-tree. The latter is not
possible on systems using ACPI.
+config EFI_HTTP_BOOT
+ bool "EFI HTTP Boot support"
+ select CMD_DNS
+ select CMD_WGET
+ select BLKMAP
+ help
+ Enabling this option adds EFI HTTP Boot support. It allows to
+ directly boot from network.
+
endif
endif
obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
-obj-$(CONFIG_CMD_BOOTEFI_BOOTMGR) += efi_bootmgr.o
+obj-$(CONFIG_BOOTEFI_BOOTMGR) += efi_bootmgr.o
obj-y += efi_boottime.o
obj-y += efi_helper.o
obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += efi_capsule.o
#define LOG_CATEGORY LOGC_EFI
+#include <blk.h>
+#include <blkmap.h>
#include <common.h>
#include <charset.h>
+#include <dm.h>
#include <log.h>
#include <malloc.h>
+#include <net.h>
#include <efi_default_filename.h>
#include <efi_loader.h>
#include <efi_variable.h>
static const struct efi_boot_services *bs;
static const struct efi_runtime_services *rs;
+/**
+ * struct uridp_context - uri device path resource
+ *
+ * @image_size: image size
+ * @image_addr: image address
+ * @loaded_dp: pointer to loaded device path
+ * @ramdisk_blk_dev: pointer to the ramdisk blk device
+ * @mem_handle: efi_handle to the loaded PE-COFF image
+ */
+struct uridp_context {
+ ulong image_size;
+ ulong image_addr;
+ struct efi_device_path *loaded_dp;
+ struct udevice *ramdisk_blk_dev;
+ efi_handle_t mem_handle;
+};
+
const efi_guid_t efi_guid_bootmenu_auto_generated =
EFICONFIG_AUTO_GENERATED_ENTRY_GUID;
return ret;
}
+/**
+ * mount_image() - mount the image with blkmap
+ *
+ * @lo_label: u16 label string of load option
+ * @addr: image address
+ * @size: image size
+ * Return: pointer to the UCLASS_BLK udevice, NULL if failed
+ */
+static struct udevice *mount_image(u16 *lo_label, ulong addr, ulong size)
+{
+ int err;
+ struct blkmap *bm;
+ struct udevice *bm_dev;
+ char *label = NULL, *p;
+
+ label = efi_alloc(utf16_utf8_strlen(lo_label) + 1);
+ if (!label)
+ return NULL;
+
+ p = label;
+ utf16_utf8_strcpy(&p, lo_label);
+ err = blkmap_create_ramdisk(label, addr, size, &bm_dev);
+ if (err) {
+ efi_free_pool(label);
+ return NULL;
+ }
+ bm = dev_get_plat(bm_dev);
+
+ efi_free_pool(label);
+
+ return bm->blk;
+}
+
+/**
+ * search_default_file() - search default file
+ *
+ * @dev: pointer to the UCLASS_BLK or UCLASS_PARTITION udevice
+ * @loaded_dp: pointer to default file device path
+ * Return: status code
+ */
+static efi_status_t search_default_file(struct udevice *dev,
+ struct efi_device_path **loaded_dp)
+{
+ efi_status_t ret;
+ efi_handle_t handle;
+ u16 *default_file_name = NULL;
+ struct efi_file_handle *root, *f;
+ struct efi_device_path *dp = NULL, *fp = NULL;
+ struct efi_simple_file_system_protocol *file_system;
+ struct efi_device_path *device_path, *full_path = NULL;
+
+ if (dev_tag_get_ptr(dev, DM_TAG_EFI, (void **)&handle)) {
+ log_warning("DM_TAG_EFI not found\n");
+ return EFI_INVALID_PARAMETER;
+ }
+
+ ret = EFI_CALL(bs->open_protocol(handle, &efi_guid_device_path,
+ (void **)&device_path, efi_root, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL));
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ ret = EFI_CALL(bs->open_protocol(handle, &efi_simple_file_system_protocol_guid,
+ (void **)&file_system, efi_root, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL));
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ ret = EFI_CALL(file_system->open_volume(file_system, &root));
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ full_path = expand_media_path(device_path);
+ ret = efi_dp_split_file_path(full_path, &dp, &fp);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ default_file_name = efi_dp_str(fp);
+ efi_free_pool(dp);
+ efi_free_pool(fp);
+ if (!default_file_name) {
+ ret = EFI_OUT_OF_RESOURCES;
+ goto err;
+ }
+
+ ret = EFI_CALL(root->open(root, &f, default_file_name,
+ EFI_FILE_MODE_READ, 0));
+ efi_free_pool(default_file_name);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ EFI_CALL(f->close(f));
+ EFI_CALL(root->close(root));
+
+ *loaded_dp = full_path;
+
+ return EFI_SUCCESS;
+
+err:
+ EFI_CALL(root->close(root));
+ efi_free_pool(full_path);
+
+ return ret;
+}
+
+/**
+ * check_disk_has_default_file() - load the default file
+ *
+ * @blk: pointer to the UCLASS_BLK udevice
+ * @dp: pointer to default file device path
+ * Return: status code
+ */
+static efi_status_t check_disk_has_default_file(struct udevice *blk,
+ struct efi_device_path **dp)
+{
+ efi_status_t ret;
+ struct udevice *partition;
+
+ /* image that has no partition table but a file system */
+ ret = search_default_file(blk, dp);
+ if (ret == EFI_SUCCESS)
+ return ret;
+
+ /* try the partitions */
+ device_foreach_child(partition, blk) {
+ enum uclass_id id;
+
+ id = device_get_uclass_id(partition);
+ if (id != UCLASS_PARTITION)
+ continue;
+
+ ret = search_default_file(partition, dp);
+ if (ret == EFI_SUCCESS)
+ return ret;
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ * prepare_loaded_image() - prepare ramdisk for downloaded image
+ *
+ * @label: label of load option
+ * @addr: image address
+ * @size: image size
+ * @dp: pointer to default file device path
+ * @blk: pointer to created blk udevice
+ * Return: status code
+ */
+static efi_status_t prepare_loaded_image(u16 *label, ulong addr, ulong size,
+ struct efi_device_path **dp,
+ struct udevice **blk)
+{
+ efi_status_t ret;
+ struct udevice *ramdisk_blk;
+
+ ramdisk_blk = mount_image(label, addr, size);
+ if (!ramdisk_blk)
+ return EFI_LOAD_ERROR;
+
+ ret = check_disk_has_default_file(ramdisk_blk, dp);
+ if (ret != EFI_SUCCESS) {
+ log_info("Cannot boot from downloaded image\n");
+ goto err;
+ }
+
+ /*
+ * TODO: expose the ramdisk to OS.
+ * Need to pass the ramdisk information by the architecture-specific
+ * methods such as 'pmem' device-tree node.
+ */
+ ret = efi_add_memory_map(addr, size, EFI_RESERVED_MEMORY_TYPE);
+ if (ret != EFI_SUCCESS) {
+ log_err("Memory reservation failed\n");
+ goto err;
+ }
+
+ *blk = ramdisk_blk;
+
+ return EFI_SUCCESS;
+
+err:
+ if (blkmap_destroy(ramdisk_blk->parent))
+ log_err("Destroying blkmap failed\n");
+
+ return ret;
+}
+
+/**
+ * efi_bootmgr_release_uridp_resource() - cleanup uri device path resource
+ *
+ * @ctx: event context
+ * Return: status code
+ */
+efi_status_t efi_bootmgr_release_uridp_resource(struct uridp_context *ctx)
+{
+ efi_status_t ret = EFI_SUCCESS;
+
+ if (!ctx)
+ return ret;
+
+ /* cleanup for iso or img image */
+ if (ctx->ramdisk_blk_dev) {
+ ret = efi_add_memory_map(ctx->image_addr, ctx->image_size,
+ EFI_CONVENTIONAL_MEMORY);
+ if (ret != EFI_SUCCESS)
+ log_err("Reclaiming memory failed\n");
+
+ if (blkmap_destroy(ctx->ramdisk_blk_dev->parent)) {
+ log_err("Destroying blkmap failed\n");
+ ret = EFI_DEVICE_ERROR;
+ }
+ }
+
+ /* cleanup for PE-COFF image */
+ if (ctx->mem_handle) {
+ ret = efi_uninstall_multiple_protocol_interfaces(
+ ctx->mem_handle, &efi_guid_device_path, ctx->loaded_dp,
+ NULL);
+ if (ret != EFI_SUCCESS)
+ log_err("Uninstall device_path protocol failed\n");
+ }
+
+ efi_free_pool(ctx->loaded_dp);
+ free(ctx);
+
+ return ret;
+}
+
+/**
+ * efi_bootmgr_image_return_notify() - return to efibootmgr callback
+ *
+ * @event: the event for which this notification function is registered
+ * @context: event context
+ */
+static void EFIAPI efi_bootmgr_image_return_notify(struct efi_event *event,
+ void *context)
+{
+ efi_status_t ret;
+
+ EFI_ENTRY("%p, %p", event, context);
+ ret = efi_bootmgr_release_uridp_resource(context);
+ EFI_EXIT(ret);
+}
+
+/**
+ * try_load_from_uri_path() - Handle the URI device path
+ *
+ * @uridp: uri device path
+ * @lo_label: label of load option
+ * @handle: pointer to handle for newly installed image
+ * Return: status code
+ */
+static efi_status_t try_load_from_uri_path(struct efi_device_path_uri *uridp,
+ u16 *lo_label,
+ efi_handle_t *handle)
+{
+ char *s;
+ int err;
+ int uri_len;
+ efi_status_t ret;
+ void *source_buffer;
+ efi_uintn_t source_size;
+ struct uridp_context *ctx;
+ struct udevice *blk = NULL;
+ struct efi_event *event = NULL;
+ efi_handle_t mem_handle = NULL;
+ struct efi_device_path *loaded_dp;
+ static ulong image_size, image_addr;
+
+ ctx = calloc(1, sizeof(struct uridp_context));
+ if (!ctx)
+ return EFI_OUT_OF_RESOURCES;
+
+ s = env_get("loadaddr");
+ if (!s) {
+ log_err("Error: loadaddr is not set\n");
+ ret = EFI_INVALID_PARAMETER;
+ goto err;
+ }
+
+ image_addr = hextoul(s, NULL);
+ err = wget_with_dns(image_addr, uridp->uri);
+ if (err < 0) {
+ ret = EFI_INVALID_PARAMETER;
+ goto err;
+ }
+
+ image_size = env_get_hex("filesize", 0);
+ if (!image_size) {
+ ret = EFI_INVALID_PARAMETER;
+ goto err;
+ }
+
+ /*
+ * If the file extension is ".iso" or ".img", mount it and try to load
+ * the default file.
+ * If the file is PE-COFF image, load the downloaded file.
+ */
+ uri_len = strlen(uridp->uri);
+ if (!strncmp(&uridp->uri[uri_len - 4], ".iso", 4) ||
+ !strncmp(&uridp->uri[uri_len - 4], ".img", 4)) {
+ ret = prepare_loaded_image(lo_label, image_addr, image_size,
+ &loaded_dp, &blk);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ source_buffer = NULL;
+ source_size = 0;
+ } else if (efi_check_pe((void *)image_addr, image_size, NULL) == EFI_SUCCESS) {
+ /*
+ * loaded_dp must exist until efi application returns,
+ * will be freed in return_to_efibootmgr event callback.
+ */
+ loaded_dp = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE,
+ (uintptr_t)image_addr, image_size);
+ ret = efi_install_multiple_protocol_interfaces(
+ &mem_handle, &efi_guid_device_path, loaded_dp, NULL);
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ source_buffer = (void *)image_addr;
+ source_size = image_size;
+ } else {
+ log_err("Error: file type is not supported\n");
+ ret = EFI_UNSUPPORTED;
+ goto err;
+ }
+
+ ctx->image_size = image_size;
+ ctx->image_addr = image_addr;
+ ctx->loaded_dp = loaded_dp;
+ ctx->ramdisk_blk_dev = blk;
+ ctx->mem_handle = mem_handle;
+
+ ret = EFI_CALL(efi_load_image(false, efi_root, loaded_dp, source_buffer,
+ source_size, handle));
+ if (ret != EFI_SUCCESS)
+ goto err;
+
+ /* create event for cleanup when the image returns or error occurs */
+ ret = efi_create_event(EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
+ efi_bootmgr_image_return_notify, ctx,
+ &efi_guid_event_group_return_to_efibootmgr,
+ &event);
+ if (ret != EFI_SUCCESS) {
+ log_err("Creating event failed\n");
+ goto err;
+ }
+
+ return ret;
+
+err:
+ efi_bootmgr_release_uridp_resource(ctx);
+
+ return ret;
+}
+
/**
* try_load_entry() - try to load image for boot option
*
if (EFI_DP_TYPE(lo.file_path, MEDIA_DEVICE, FILE_PATH)) {
/* file_path doesn't contain a device path */
ret = try_load_from_short_path(lo.file_path, handle);
+ } else if (EFI_DP_TYPE(lo.file_path, MESSAGING_DEVICE, MSG_URI)) {
+ if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
+ ret = try_load_from_uri_path(
+ (struct efi_device_path_uri *)lo.file_path,
+ lo.label, handle);
+ else
+ ret = EFI_LOAD_ERROR;
} else {
file_path = expand_media_path(lo.file_path);
ret = EFI_CALL(efi_load_image(true, efi_root, file_path,
/* event group ResetSystem() invoked (before ExitBootServices) */
const efi_guid_t efi_guid_event_group_reset_system =
EFI_EVENT_GROUP_RESET_SYSTEM;
+/* event group return to efibootmgr */
+const efi_guid_t efi_guid_event_group_return_to_efibootmgr =
+ EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR;
/* GUIDs of the Load File and Load File2 protocols */
const efi_guid_t efi_guid_load_file_protocol = EFI_LOAD_FILE_PROTOCOL_GUID;
const efi_guid_t efi_guid_load_file2_protocol = EFI_LOAD_FILE2_PROTOCOL_GUID;
void (EFIAPI *notify_function) (
struct efi_event *event,
void *context),
- void *notify_context, efi_guid_t *group,
+ void *notify_context, const efi_guid_t *group,
struct efi_event **event)
{
struct efi_event *evt;
struct efi_event *event,
void *context),
void *notify_context,
- efi_guid_t *event_group,
+ const efi_guid_t *event_group,
struct efi_event **event)
{
efi_status_t ret;
return -1;
}
+ /* only do the boot option management when UEFI sub-system is initialized */
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) && efi_obj_list_initialized == EFI_SUCCESS) {
+ ret = efi_bootmgr_update_media_device_boot_option();
+ if (ret != EFI_SUCCESS)
+ return -1;
+ }
+
return 0;
}
dev_tag_del(dev, DM_TAG_EFI);
return 0;
+
+ /*
+ * TODO A flag to distinguish below 2 different scenarios of this
+ * function call is needed:
+ * a) Unplugging of a removable media under U-Boot
+ * b) U-Boot exiting and booting an OS
+ * In case of scenario a), efi_bootmgr_update_media_device_boot_option()
+ * needs to be invoked here to update the boot options and remove the
+ * unnecessary ones.
+ */
+
}
/**
if (ret != EFI_SUCCESS)
goto out;
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) {
+ /* update boot option after variable service initialized */
+ ret = efi_bootmgr_update_media_device_boot_option();
+ if (ret != EFI_SUCCESS)
+ goto out;
+ }
+
/* Define supported languages */
ret = efi_init_platform_lang();
if (ret != EFI_SUCCESS)
* Copyright Duncan Hare <dh@synoia.com> 2017
*/
+#include <asm/global_data.h>
#include <command.h>
#include <common.h>
#include <display_options.h>
#include <env.h>
#include <image.h>
+#include <lmb.h>
#include <mapmem.h>
#include <net.h>
#include <net/tcp.h>
#include <net/wget.h>
+#include <stdlib.h>
+
+DECLARE_GLOBAL_DATA_PTR;
static const char bootfile1[] = "GET ";
static const char bootfile3[] = " HTTP/1.0\r\n\r\n";
static unsigned int retry_tcp_seq_num; /* TCP retry sequence number */
static int retry_len; /* TCP retry length */
+static ulong wget_load_size;
+
+/**
+ * wget_init_max_size() - initialize maximum load size
+ *
+ * Return: 0 if success, -1 if fails
+ */
+static int wget_init_load_size(void)
+{
+ struct lmb lmb;
+ phys_size_t max_size;
+
+ lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
+
+ max_size = lmb_get_free_size(&lmb, image_load_addr);
+ if (!max_size)
+ return -1;
+
+ wget_load_size = max_size;
+
+ return 0;
+}
+
/**
* store_block() - store block in memory
* @src: source of data
*/
static inline int store_block(uchar *src, unsigned int offset, unsigned int len)
{
+ ulong store_addr = image_load_addr + offset;
ulong newsize = offset + len;
uchar *ptr;
- ptr = map_sysmem(image_load_addr + offset, len);
+ if (IS_ENABLED(CONFIG_LMB)) {
+ ulong end_addr = image_load_addr + wget_load_size;
+
+ if (!end_addr)
+ end_addr = ULONG_MAX;
+
+ if (store_addr < image_load_addr ||
+ store_addr + len > end_addr) {
+ printf("\nwget error: ");
+ printf("trying to overwrite reserved memory...\n");
+ return -1;
+ }
+ }
+
+ ptr = map_sysmem(store_addr, len);
memcpy(ptr, src, len);
unmap_sysmem(ptr);
net_boot_file_size = 0;
- if (len > hlen)
- store_block(pkt + hlen, 0, len - hlen);
+ if (len > hlen) {
+ if (store_block(pkt + hlen, 0, len - hlen) != 0) {
+ wget_loop_state = NETLOOP_FAIL;
+ wget_fail("wget: store error\n", tcp_seq_num, tcp_ack_num, action);
+ net_set_state(NETLOOP_FAIL);
+ return;
+ }
+ }
debug_cond(DEBUG_WGET,
"wget: Connected Pkt %p hlen %x\n",
pkt, hlen);
for (i = 0; i < pkt_q_idx; i++) {
+ int err;
+
ptr1 = map_sysmem(
(phys_addr_t)(pkt_q[i].pkt),
pkt_q[i].len);
- store_block(ptr1,
- pkt_q[i].tcp_seq_num -
- initial_data_seq_num,
- pkt_q[i].len);
+ err = store_block(ptr1,
+ pkt_q[i].tcp_seq_num -
+ initial_data_seq_num,
+ pkt_q[i].len);
unmap_sysmem(ptr1);
debug_cond(DEBUG_WGET,
"wget: Connctd pkt Q %p len %x\n",
pkt_q[i].pkt, pkt_q[i].len);
+ if (err) {
+ wget_loop_state = NETLOOP_FAIL;
+ wget_fail("wget: store error\n", tcp_seq_num, tcp_ack_num, action);
+ net_set_state(NETLOOP_FAIL);
+ return;
+ }
}
}
}
len) != 0) {
wget_fail("wget: store error\n",
tcp_seq_num, tcp_ack_num, action);
+ net_set_state(NETLOOP_FAIL);
return;
}
debug_cond(DEBUG_WGET,
"\nwget:Load address: 0x%lx\nLoading: *\b", image_load_addr);
+ if (IS_ENABLED(CONFIG_LMB)) {
+ if (wget_init_load_size()) {
+ printf("\nwget error: ");
+ printf("trying to overwrite reserved memory...\n");
+ net_set_state(NETLOOP_FAIL);
+ return;
+ }
+ }
+
net_set_timeout_handler(wget_timeout, wget_timeout_handler);
tcp_set_tcp_handler(wget_handler);
wget_send(TCP_SYN, 0, 0, 0);
}
+
+#if (IS_ENABLED(CONFIG_CMD_DNS))
+int wget_with_dns(ulong dst_addr, char *uri)
+{
+ int ret;
+ char *s, *host_name, *file_name, *str_copy;
+
+ /*
+ * Download file using wget.
+ *
+ * U-Boot wget takes the target uri in this format.
+ * "<http server ip>:<file path>" e.g.) 192.168.1.1:/sample/test.iso
+ * Need to resolve the http server ip address before starting wget.
+ */
+ str_copy = strdup(uri);
+ if (!str_copy)
+ return -ENOMEM;
+
+ s = str_copy + strlen("http://");
+ host_name = strsep(&s, "/");
+ if (!s) {
+ log_err("Error: invalied uri, no file path\n");
+ ret = -EINVAL;
+ goto out;
+ }
+ file_name = s;
+
+ /* TODO: If the given uri has ip address for the http server, skip dns */
+ net_dns_resolve = host_name;
+ net_dns_env_var = "httpserverip";
+ if (net_loop(DNS) < 0) {
+ log_err("Error: dns lookup of %s failed, check setup\n", net_dns_resolve);
+ ret = -EINVAL;
+ goto out;
+ }
+ s = env_get("httpserverip");
+ if (!s) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ strlcpy(net_boot_file_name, s, sizeof(net_boot_file_name));
+ strlcat(net_boot_file_name, ":/", sizeof(net_boot_file_name)); /* append '/' which is removed by strsep() */
+ strlcat(net_boot_file_name, file_name, sizeof(net_boot_file_name));
+ image_load_addr = dst_addr;
+ ret = net_loop(WGET);
+
+out:
+ free(str_copy);
+
+ return ret;
+}
+#endif
+
+/**
+ * wget_validate_uri() - validate the uri for wget
+ *
+ * @uri: uri string
+ *
+ * This function follows the current U-Boot wget implementation.
+ * scheme: only "http:" is supported
+ * authority:
+ * - user information: not supported
+ * - host: supported
+ * - port: not supported(always use the default port)
+ *
+ * Uri is expected to be correctly percent encoded.
+ * This is the minimum check, control codes(0x1-0x19, 0x7F, except '\0')
+ * and space character(0x20) are not allowed.
+ *
+ * TODO: stricter uri conformance check
+ *
+ * Return: true on success, false on failure
+ */
+bool wget_validate_uri(char *uri)
+{
+ char c;
+ bool ret = true;
+ char *str_copy, *s, *authority;
+
+ for (c = 0x1; c < 0x21; c++) {
+ if (strchr(uri, c)) {
+ log_err("invalid character is used\n");
+ return false;
+ }
+ }
+ if (strchr(uri, 0x7f)) {
+ log_err("invalid character is used\n");
+ return false;
+ }
+
+ if (strncmp(uri, "http://", 7)) {
+ log_err("only http:// is supported\n");
+ return false;
+ }
+ str_copy = strdup(uri);
+ if (!str_copy)
+ return false;
+
+ s = str_copy + strlen("http://");
+ authority = strsep(&s, "/");
+ if (!s) {
+ log_err("invalid uri, no file path\n");
+ ret = false;
+ goto out;
+ }
+ s = strchr(authority, '@');
+ if (s) {
+ log_err("user information is not supported\n");
+ ret = false;
+ goto out;
+ }
+ s = strchr(authority, ':');
+ if (s) {
+ log_err("user defined port is not supported\n");
+ ret = false;
+ goto out;
+ }
+
+out:
+ free(str_copy);
+
+ return ret;
+}
config UNIT_TEST
bool "Unit tests"
+ depends on CMDLINE
help
Select this to compile in unit tests for various parts of
U-Boot. Test suites will be subcommands of the "ut" command.
obj-$(CONFIG_MULTIPLEXER) += mux-emul.o
obj-$(CONFIG_MUX_MMIO) += mux-mmio.o
obj-y += fdtdec.o
+obj-$(CONFIG_MTD_RAW_NAND) += nand.o
obj-$(CONFIG_UT_DM) += nop.o
obj-y += ofnode.o
obj-y += ofread.o
/* Prepare the test scenario */
for (i = 0; i < DM_TEST_ETH_NUM; i++) {
+ char *addr;
+
ut_assertok(uclass_find_device_by_name(UCLASS_ETH,
ethname[i], &dev[i]));
ut_assertok(device_remove(dev[i], DM_REMOVE_NORMAL));
/* Invalidate MAC address */
- strncpy(ethaddr[i], env_get(addrname[i]), 17);
+ addr = env_get(addrname[i]);
+ ut_assertnonnull(addr);
+ strncpy(ethaddr[i], addr, 17);
/* Must disable access protection for ethaddr before clearing */
env_set(".flags", addrname[i]);
env_set(addrname[i], NULL);
for (i = 0; i < ARRAY_SIZE(addr); i++) {
char addrname[10];
+ char *env_addr;
if (i)
snprintf(addrname, sizeof(addrname), "eth%daddr", i + 1);
else
strcpy(addrname, "ethaddr");
- ut_asserteq_str(addr[i], env_get(addrname));
+
+ env_addr = env_get(addrname);
+ ut_assertnonnull(env_addr);
+ ut_asserteq_str(addr[i], env_addr);
}
return 0;
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
+ */
+
+#include <nand.h>
+#include <part.h>
+#include <rand.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/rawnand.h>
+
+static int dm_test_nand(struct unit_test_state *uts, int dev, bool end)
+{
+ nand_erase_options_t opts = { };
+ struct mtd_info *mtd;
+ size_t length;
+ loff_t size;
+ char *buf;
+ int *gold;
+ u8 oob[NAND_MAX_OOBSIZE];
+ int i;
+ loff_t off = 0;
+ mtd_oob_ops_t ops = { };
+
+ /* Seed RNG for bit errors */
+ srand((off >> 32) ^ off ^ ~dev);
+
+ mtd = get_nand_dev_by_index(dev);
+ ut_assertnonnull(mtd);
+ size = mtd->erasesize * 4;
+ length = size;
+
+ buf = malloc(size);
+ ut_assertnonnull(buf);
+ gold = malloc(size);
+ ut_assertnonnull(gold);
+
+ /* Mark a block as bad */
+ ut_assertok(mtd_block_markbad(mtd, off + mtd->erasesize));
+
+ /* Erase some stuff */
+ if (end)
+ off = mtd->size - size - mtd->erasesize;
+ opts.offset = off;
+ opts.length = size;
+ opts.spread = 1;
+ opts.lim = U32_MAX;
+ ut_assertok(nand_erase_opts(mtd, &opts));
+
+ /* Make sure everything is erased */
+ memset(gold, 0xff, size);
+ ut_assertok(nand_read_skip_bad(mtd, off, &length, NULL, U64_MAX, buf));
+ ut_asserteq(size, length);
+ ut_asserteq_mem(gold, buf, size);
+
+ /* ...but our bad block marker is still there */
+ ops.oobbuf = oob;
+ ops.ooblen = mtd->oobsize;
+ ut_assertok(mtd_read_oob(mtd, mtd->erasesize, &ops));
+ ut_asserteq(0, oob[mtd_to_nand(mtd)->badblockpos]);
+
+ /* Generate some data and write it */
+ for (i = 0; i < size / sizeof(int); i++)
+ gold[i] = rand();
+ ut_assertok(nand_write_skip_bad(mtd, off, &length, NULL, U64_MAX,
+ (void *)gold, 0));
+ ut_asserteq(size, length);
+
+ /* Verify */
+ ut_assertok(nand_read_skip_bad(mtd, off, &length, NULL, U64_MAX, buf));
+ ut_asserteq(size, length);
+ ut_asserteq_mem(gold, buf, size);
+
+ /* Erase some blocks */
+ memset(((char *)gold) + mtd->erasesize, 0xff, mtd->erasesize * 2);
+ opts.offset = off + mtd->erasesize;
+ opts.length = mtd->erasesize * 2;
+ ut_assertok(nand_erase_opts(mtd, &opts));
+
+ /* Verify */
+ ut_assertok(nand_read_skip_bad(mtd, off, &length, NULL, U64_MAX, buf));
+ ut_asserteq(size, length);
+ ut_asserteq_mem(gold, buf, size);
+
+ return 0;
+}
+
+#define DM_NAND_TEST(dev) \
+static int dm_test_nand##dev##_start(struct unit_test_state *uts) \
+{ \
+ return dm_test_nand(uts, dev, false); \
+} \
+DM_TEST(dm_test_nand##dev##_start, UT_TESTF_SCAN_FDT); \
+static int dm_test_nand##dev##_end(struct unit_test_state *uts) \
+{ \
+ return dm_test_nand(uts, dev, true); \
+} \
+DM_TEST(dm_test_nand##dev##_end, UT_TESTF_SCAN_FDT)
+
+DM_NAND_TEST(0);
+DM_NAND_TEST(1);
/* Device 1 is the warm sysreset device */
ut_assertok(uclass_get_device(UCLASS_SYSRESET, 1, &dev));
ut_asserteq(-EACCES, sysreset_request(dev, SYSRESET_WARM));
- ut_asserteq(-ENOSYS, sysreset_request(dev, SYSRESET_COLD));
- ut_asserteq(-ENOSYS, sysreset_request(dev, SYSRESET_POWER));
+ ut_asserteq(-EPROTONOSUPPORT, sysreset_request(dev, SYSRESET_COLD));
+ ut_asserteq(-EPROTONOSUPPORT, sysreset_request(dev, SYSRESET_POWER));
state->sysreset_allowed[SYSRESET_WARM] = true;
ut_asserteq(-EINPROGRESS, sysreset_request(dev, SYSRESET_WARM));
/* Device 2 is the cold sysreset device */
ut_assertok(uclass_get_device(UCLASS_SYSRESET, 2, &dev));
- ut_asserteq(-ENOSYS, sysreset_request(dev, SYSRESET_WARM));
+ ut_asserteq(-EPROTONOSUPPORT, sysreset_request(dev, SYSRESET_WARM));
state->sysreset_allowed[SYSRESET_COLD] = false;
ut_asserteq(-EACCES, sysreset_request(dev, SYSRESET_COLD));
state->sysreset_allowed[SYSRESET_COLD] = true;
help
Test filesystems and the various load methods which use them.
+config SPL_UT_LOAD_NAND
+ bool "Test loading from NAND flash"
+ depends on SANDBOX && SPL_OF_REAL
+ depends on SPL_NAND_SUPPORT
+ depends on SPL_MTD
+ default y
+ help
+ Test the NAND flash load method.
+
config SPL_UT_LOAD_NET
bool "Test loading over TFTP"
depends on SANDBOX && SPL_OF_REAL
config SPL_UT_LOAD_OS
bool "Test loading from the host OS"
depends on SANDBOX && SPL_LOAD_FIT
+ select SPL_LOAD_BLOCK
default y
help
Smoke test to ensure that loading U-boot works in sandbox.
obj-y += spl_load.o
obj-$(CONFIG_SPL_UT_LOAD_FS) += spl_load_fs.o
+obj-$(CONFIG_SPL_UT_LOAD_NAND) += spl_load_nand.o
obj-$(CONFIG_SPL_UT_LOAD_NET) += spl_load_net.o
obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_load_nor.o
obj-$(CONFIG_SPL_UT_LOAD_OS) += spl_load_os.o
if (check_image_info(uts, &info_write, &info_read))
return CMD_RET_FAILURE;
} else {
- struct spl_load_info load = {
- .bl_len = 1,
- .priv = img,
- .read = spl_test_read,
- };
+ struct spl_load_info load;
+ spl_set_bl_len(&load, 1);
+ load.priv = img;
+ load.read = spl_test_read;
if (type == IMX8)
ut_assertok(spl_load_imx_container(&info_read, &load,
0));
* LZMA is too complex to generate on the fly, so let's use some data I put in
* the oven^H^H^H^H compressed earlier
*/
-static const char lzma_compressed[] = {
+const char lzma_compressed[] = {
0x5d, 0x00, 0x00, 0x80, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0x00, 0x02, 0x05, 0x55, 0x4e, 0x82, 0xbc, 0xc2, 0x42, 0xf6, 0x88,
0x6c, 0x99, 0xd6, 0x82, 0x48, 0xa6, 0x06, 0x67, 0xf8, 0x46, 0x7c, 0xe9,
0x1e, 0xff, 0xff, 0x80, 0x8e, 0x00, 0x00
};
+const size_t lzma_compressed_size = sizeof(lzma_compressed);
+
int do_spl_test_load(struct unit_test_state *uts, const char *test_name,
enum spl_test_image type, struct spl_image_loader *loader,
int (*write_image)(struct unit_test_state *, void *, size_t))
const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME;
struct blk_desc *dev_desc;
size_t fs_size, fs_data, img_size, img_data,
- data_size = SPL_TEST_DATA_SIZE;
+ plain_size = SPL_TEST_DATA_SIZE;
struct spl_image_info info_write = {
.name = test_name,
- .size = data_size,
+ .size = type == LEGACY_LZMA ? lzma_compressed_size :
+ plain_size,
}, info_read = { };
struct disk_partition part = {
.start = 1,
.boot_device = loader->boot_device,
};
void *fs;
- char *data;
+ char *data, *plain;
img_size = create_image(NULL, type, &info_write, &img_data);
ut_assert(img_size);
ut_assertnonnull(fs);
data = fs + fs_data + img_data;
- generate_data(data, data_size, test_name);
+ if (type == LEGACY_LZMA) {
+ plain = malloc(plain_size);
+ ut_assertnonnull(plain);
+ generate_data(plain, plain_size, "lzma");
+ memcpy(data, lzma_compressed, lzma_compressed_size);
+ } else {
+ plain = data;
+ generate_data(plain, plain_size, test_name);
+ }
ut_asserteq(img_size, create_image(fs + fs_data, type, &info_write,
NULL));
ut_asserteq(fs_size, create_fs(fs, img_size, filename, NULL));
ut_assertok(loader->load_image(&info_read, &bootdev));
if (check_image_info(uts, &info_write, &info_read))
return CMD_RET_FAILURE;
- ut_asserteq_mem(data, phys_to_virt(info_write.load_addr), data_size);
+ if (type == LEGACY_LZMA)
+ ut_asserteq(plain_size, info_read.size);
+ ut_asserteq_mem(plain, phys_to_virt(info_write.load_addr), plain_size);
+ if (type == LEGACY_LZMA)
+ free(plain);
free(fs);
return 0;
}
return spl_test_mmc_fs(uts, test_name, type, create_ext2, true);
}
SPL_IMG_TEST(spl_test_blk, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_blk, LEGACY_LZMA, DM_FLAGS);
+SPL_IMG_TEST(spl_test_blk, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_blk, FIT_EXTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_blk, FIT_INTERNAL, DM_FLAGS);
spl_mmc_clear_cache();
spl_fat_force_reregister();
- if (type == LEGACY &&
- spl_test_mmc_fs(uts, test_name, type, create_ext2, false))
+ if (spl_test_mmc_fs(uts, test_name, type, create_ext2, false))
return CMD_RET_FAILURE;
- if (type != IMX8 &&
- spl_test_mmc_fs(uts, test_name, type, create_fat, false))
+ if (spl_test_mmc_fs(uts, test_name, type, create_fat, false))
return CMD_RET_FAILURE;
return do_spl_test_load(uts, test_name, type,
spl_test_mmc_write_image);
}
SPL_IMG_TEST(spl_test_mmc, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_mmc, LEGACY_LZMA, DM_FLAGS);
SPL_IMG_TEST(spl_test_mmc, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_mmc, FIT_EXTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_mmc, FIT_INTERNAL, DM_FLAGS);
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
+ */
+
+#include <nand.h>
+#include <spl.h>
+#include <test/spl.h>
+#include <test/ut.h>
+
+uint32_t spl_nand_get_uboot_raw_page(void);
+
+static int spl_test_nand_write_image(struct unit_test_state *uts, void *img,
+ size_t img_size)
+{
+ uint32_t off = spl_nand_get_uboot_raw_page();
+ struct mtd_info *mtd;
+ struct erase_info erase = { };
+ size_t length;
+
+ nand_reinit();
+ mtd = get_nand_dev_by_index(0);
+ ut_assertnonnull(mtd);
+
+ /* Mark the first block as bad to test that it gets skipped */
+ ut_assertok(mtd_block_markbad(mtd, off & ~mtd->erasesize_mask));
+ off += mtd->erasesize;
+
+ erase.mtd = mtd;
+ erase.len = img_size + (off & mtd->erasesize_mask);
+ erase.len += mtd->erasesize_mask;
+ erase.len &= ~mtd->erasesize_mask;
+ erase.addr = off & ~mtd->erasesize_mask;
+ erase.scrub = 1;
+ ut_assertok(mtd_erase(mtd, &erase));
+
+ ut_assertok(mtd_write(mtd, off, img_size, &length, img));
+
+ return 0;
+}
+
+static int spl_test_nand(struct unit_test_state *uts, const char *test_name,
+ enum spl_test_image type)
+{
+ return do_spl_test_load(uts, test_name, type,
+ SPL_LOAD_IMAGE_GET(1, BOOT_DEVICE_NAND,
+ spl_nand_load_image),
+ spl_test_nand_write_image);
+}
+SPL_IMG_TEST(spl_test_nand, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_nand, LEGACY_LZMA, DM_FLAGS);
+SPL_IMG_TEST(spl_test_nand, IMX8, DM_FLAGS);
+SPL_IMG_TEST(spl_test_nand, FIT_INTERNAL, DM_FLAGS);
+#if !IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)
+SPL_IMG_TEST(spl_test_nand, FIT_EXTERNAL, DM_FLAGS);
+#endif
return ret;
}
SPL_IMG_TEST(spl_test_net, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_net, LEGACY_LZMA, DM_FLAGS);
+SPL_IMG_TEST(spl_test_net, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_net, FIT_INTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_net, FIT_EXTERNAL, DM_FLAGS);
SPL_IMG_TEST(spl_test_nor, LEGACY_LZMA, 0);
SPL_IMG_TEST(spl_test_nor, IMX8, 0);
SPL_IMG_TEST(spl_test_nor, FIT_INTERNAL, 0);
+#if !IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)
SPL_IMG_TEST(spl_test_nor, FIT_EXTERNAL, 0);
+#endif
int fd;
};
-static ulong read_fit_image(struct spl_load_info *load, ulong sector,
- ulong count, void *buf)
+static ulong read_fit_image(struct spl_load_info *load, ulong offset,
+ ulong size, void *buf)
{
struct text_ctx *text_ctx = load->priv;
- off_t offset, ret;
+ off_t ret;
ssize_t res;
- offset = sector * load->bl_len;
ret = os_lseek(text_ctx->fd, offset, OS_SEEK_SET);
if (ret != offset) {
printf("Failed to seek to %zx, got %zx (errno=%d)\n", offset,
return 0;
}
- res = os_read(text_ctx->fd, buf, count * load->bl_len);
+ res = os_read(text_ctx->fd, buf, size);
if (res == -1) {
printf("Failed to read %lx bytes, got %ld (errno=%d)\n",
- count * load->bl_len, res, errno);
+ size, res, errno);
return 0;
}
- return count;
+ return size;
}
static int spl_test_load(struct unit_test_state *uts)
int fd;
memset(&load, '\0', sizeof(load));
- load.bl_len = 512;
+ spl_set_bl_len(&load, 512);
load.read = read_fit_image;
ret = sandbox_find_next_phase(fname, sizeof(fname), true);
if (ret)
ut_assertf(0, "%s not found, error %d\n", fname, ret);
- load.filename = fname;
header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
spl_test_spi_write_image);
}
SPL_IMG_TEST(spl_test_spi, LEGACY, DM_FLAGS);
+SPL_IMG_TEST(spl_test_spi, LEGACY_LZMA, DM_FLAGS);
SPL_IMG_TEST(spl_test_spi, IMX8, DM_FLAGS);
SPL_IMG_TEST(spl_test_spi, FIT_INTERNAL, DM_FLAGS);
#if !IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
# Test Case 1b, run unsigned image if no PK
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert('\'HELLO1\' failed' in ''.join(output))
assert('efi_start_image() returned: 26' in ''.join(output))
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize db'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
'setenv -e -nv -bs -rt -at -a -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi.signed_2sigs -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld_forged.efi.signed -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert('hELLO, world!' in ''.join(output))
'setenv -e -nv -bs -rt -at -i 4000000:$filesize PK'])
assert 'Failed to set EFI variable' not in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert(not 'hELLO, world!' in ''.join(output))
assert('\'HELLO1\' failed' in ''.join(output))
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO_a host 0:1 /helloworld.efi.signed_a -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_a\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
# Test Case 1b, signed and authenticated by root CA
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO_ab host 0:1 /helloworld.efi.signed_ab -s ""',
- 'efidebug boot next 2',
+ 'efidebug boot order 2',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db_b.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 db_c.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize db',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO_abc host 0:1 /helloworld.efi.signed_abc -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'Hello, world!' in ''.join(output)
# Or,
output = u_boot_console.run_command_list([
'fatload host 0:1 4000000 dbx_c.auth',
'setenv -e -nv -bs -rt -at -i 4000000:$filesize dbx',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert 'Hello, world!' in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot add -b 1 HELLO host 0:1 /helloworld.efi -s ""',
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'bootefi bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
output = u_boot_console.run_command_list([
- 'efidebug boot next 1',
+ 'efidebug boot order 1',
'efidebug test bootmgr'])
assert 'efi_start_image() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
"""
build_dir = u_boot_console.config.build_dir
+ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to
+ # add EFI boot option when the new disk is detected. If there is no EFI
+ # System Partition exists, EFI subsystem outputs error messages and
+ # it ends up with test failure.
+ # Restart U-Boot to clear the previous state.
+ # TODO: Ideally EFI test cases need to be fixed, but it will
+ # increase the number of system reset.
+ u_boot_console.restart_uboot()
+
try:
# setup test environment
make_erofs_image(build_dir)
"""
build_dir = u_boot_console.config.build_dir
+ # If the EFI subsystem is enabled and initialized, EFI subsystem tries to
+ # add EFI boot option when the new disk is detected. If there is no EFI
+ # System Partition exists, EFI subsystem outputs error messages and
+ # it ends up with test failure.
+ # Restart U-Boot to clear the previous state.
+ # TODO: Ideally EFI test cases need to be fixed, but it will
+ # increase the number of system reset.
+ u_boot_console.restart_uboot()
+
# setup test environment
check_mksquashfs_version()
generate_sqfs_src_dir(build_dir)
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0
+# Copyright 2022 Google LLC
+# Written by Simon Glass <sjg@chromium.org>
+
+import pytest
+
+import u_boot_utils as util
+
+# This is needed for Azure, since the default '..' directory is not writeable
+TMPDIR = '/tmp/test_cmdline'
+
+@pytest.mark.slow
+@pytest.mark.boardspec('sandbox')
+def test_sandbox_cmdline(u_boot_console):
+ """Test building sandbox without CONFIG_CMDLINE"""
+ cons = u_boot_console
+
+ out = util.run_and_log(
+ cons, ['./tools/buildman/buildman', '-m', '--board', 'sandbox',
+ '-a', '~CMDLINE', '-o', TMPDIR])
+
+@pytest.mark.slow
+@pytest.mark.boardspec('sandbox')
+def test_sandbox_lto(u_boot_console):
+ """Test building sandbox without CONFIG_LTO"""
+ cons = u_boot_console
+
+ out = util.run_and_log(
+ cons, ['./tools/buildman/buildman', '-m', '--board', 'sandbox',
+ '-a', '~LTO', '-o', TMPDIR])
Args:
commit: Commit object that is being built
brd: Board object that is being built
- stage: Stage that we are at (mrproper, config, build)
+ stage: Stage that we are at (mrproper, config, oldconfig, build)
cwd: Directory where make should be run
args: Arguments to pass to make
kwargs: Arguments to pass to command.run_pipe()
# Now do the build, if everything looks OK
if result.return_code == 0:
+ if adjust_cfg:
+ oldc_args = list(args) + ['oldconfig']
+ oldc_result = self.make(commit, brd, 'oldconfig', cwd,
+ *oldc_args, env=env)
+ if oldc_result.return_code:
+ return oldc_result
result = self._build(commit, brd, cwd, args, env, cmd_list,
config_only)
if adjust_cfg:
tools.write_file(fname, b'CONFIG_SOMETHING=1')
return command.CommandResult(return_code=0,
combined='Test configuration complete')
+ elif stage == 'oldconfig':
+ return command.CommandResult(return_code=0)
elif stage == 'build':
stderr = ''
fname = os.path.join(cwd or '', out_dir, 'u-boot')
return command.CommandResult(return_code=0)
# Not handled, so abort
- print('make', stage)
+ print('_HandleMake failure: make', stage)
sys.exit(1)
# Example function to print output lines
git.openpandora.org / pandora-u-boot.git / commitdiff