]> git.openpandora.org Git - pandora-kernel.git/commitdiff
dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 13 Jan 2015 17:08:14 +0000 (19:08 +0200)
committerVinod Koul <vinod.koul@intel.com>
Thu, 5 Feb 2015 06:39:44 +0000 (22:39 -0800)
Instead of using magic number in the code the patch provides
DW_DMA_MAX_NR_MASTERS constant.

While here, restrict the reading of data width array by amount of the actual
number of AHB masters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Documentation/devicetree/bindings/dma/snps-dma.txt
arch/arc/boot/dts/abilis_tb10x.dtsi
arch/arm/boot/dts/spear13xx.dtsi
arch/avr32/mach-at32ap/at32ap700x.c
drivers/dma/dw/core.c
drivers/dma/dw/platform.c
drivers/dma/dw/regs.h
include/linux/platform_data/dma-dw.h

index d58675ea1abf2e998af99b8d69f5a2b6b1b71e2a..c261598164a7612c929092ebf2876b478a1c70f6 100644 (file)
@@ -38,7 +38,7 @@ Example:
                chan_allocation_order = <1>;
                chan_priority = <1>;
                block_size = <0xfff>;
-               data_width = <3 3 0 0>;
+               data_width = <3 3>;
        };
 
 DMA clients connected to the Designware DMA controller must use the format
index a098d7c05e967461cc200fbb52d1acb51dcee966..cfb5052239a1cffdcb3f8ac3dc07537441d55bef 100644 (file)
                        chan_allocation_order = <0>;
                        chan_priority = <1>;
                        block_size = <0x7ff>;
-                       data_width = <2 0 0 0>;
+                       data_width = <2>;
                        clocks = <&ahb_clk>;
                        clock-names = "hclk";
                };
index a6eb5436d26d45f62f336b86fb0be8f06ea560bd..40accc87e3a252580c1008fa041356a40093620e 100644 (file)
                        chan_priority = <1>;
                        block_size = <0xfff>;
                        dma-masters = <2>;
-                       data_width = <3 3 0 0>;
+                       data_width = <3 3>;
                };
 
                dma@eb000000 {
                        chan_allocation_order = <1>;
                        chan_priority = <1>;
                        block_size = <0xfff>;
-                       data_width = <3 3 0 0>;
+                       data_width = <3 3>;
                };
 
                fsmc: flash@b0000000 {
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge