Blackfin arch: use the [CS]SYNC() macros which include anomaly workarounds rather...
authorMike Frysinger <michael.frysinger@analog.com>
Wed, 25 Jul 2007 03:57:42 +0000 (11:57 +0800)
committerBryan Wu <bryan.wu@analog.com>
Wed, 25 Jul 2007 03:57:42 +0000 (11:57 +0800)
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
arch/blackfin/oprofile/op_blackfin.h
drivers/serial/bfin_5xx.c
include/asm-blackfin/mach-bf533/cdefBF532.h
include/asm-blackfin/mach-bf537/cdefBF534.h
include/asm-blackfin/mach-bf548/cdefBF54x_base.h
include/asm-blackfin/mach-bf561/cdefBF561.h

index f88f446..05dd08c 100644 (file)
@@ -68,7 +68,7 @@ static inline unsigned int ctr_read(void)
        unsigned int tmp;
 
        tmp = bfin_read_PFCTL();
-       __builtin_bfin_csync();
+       CSYNC();
 
        return tmp;
 }
@@ -76,21 +76,21 @@ static inline unsigned int ctr_read(void)
 static inline void ctr_write(unsigned int val)
 {
        bfin_write_PFCTL(val);
-       __builtin_bfin_csync();
+       CSYNC();
 }
 
 static inline void count_read(unsigned int *count)
 {
        count[0] = bfin_read_PFCNTR0();
        count[1] = bfin_read_PFCNTR1();
-       __builtin_bfin_csync();
+       CSYNC();
 }
 
 static inline void count_write(unsigned int *count)
 {
        bfin_write_PFCNTR0(count[0]);
        bfin_write_PFCNTR1(count[1]);
-       __builtin_bfin_csync();
+       CSYNC();
 }
 
 extern int pm_overflow_handler(int irq, struct pt_regs *regs);
index 66c92bc..1e79ee6 100644 (file)
@@ -173,12 +173,12 @@ void kgdb_put_debug_char(int chr)
                uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
        
        while (!(UART_GET_LSR(uart) & THRE)) {
-               __builtin_bfin_ssync();
+               SSYNC();
        }
        UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
-       __builtin_bfin_ssync();
+       SSYNC();
        UART_PUT_CHAR(uart, (unsigned char)chr);
-       __builtin_bfin_ssync();
+       SSYNC();
 }
 
 int kgdb_get_debug_char(void)
@@ -192,12 +192,12 @@ int kgdb_get_debug_char(void)
                uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
        
        while(!(UART_GET_LSR(uart) & DR)) {
-               __builtin_bfin_ssync();
+               SSYNC();
        }
        UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
-       __builtin_bfin_ssync();
+       SSYNC();
        chr = UART_GET_CHAR(uart);
-       __builtin_bfin_ssync();
+       SSYNC();
 
        return chr;
 }
@@ -1203,7 +1203,7 @@ static int __init bfin_serial_init(void)
                        IRQF_DISABLED, "BFIN_UART_RX", uart);
                pr_info("Request irq for kgdb uart port\n");
                UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
-               __builtin_bfin_ssync();
+               SSYNC();
                t.c_cflag = CS8|B57600;
                t.c_iflag = 0;
                t.c_oflag = 0;
index 74f967b..67a6dc4 100644 (file)
@@ -65,7 +65,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
        bfin_write32(SIC_IWR, IWR_ENABLE(0));
 
        bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
+       SSYNC();
 
        local_irq_save(flags);
        asm("IDLE;");
index 84e58fa..5dab41f 100644 (file)
@@ -57,7 +57,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
        bfin_write32(SIC_IWR, IWR_ENABLE(0));
 
        bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
+       SSYNC();
 
        local_irq_save(flags);
        asm("IDLE;");
index cdf29e7..10475bb 100644 (file)
@@ -60,7 +60,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
        bfin_write32(SIC_IWR2, 0);
 
        bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
+       SSYNC();
 
        local_irq_save(flags);
        asm("IDLE;");
index 73d4d65..2efcd2c 100644 (file)
@@ -67,7 +67,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
        bfin_write32(SICA_IWR1, 0);
 
        bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
+       SSYNC();
 
        local_irq_save(flags);
        asm("IDLE;");