__continue:
#endif /* CONFIG_ZBOOT_ROM_MMC || CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */
- /* Set board ID necessary for boot */
- ldr r7, 1f @ Set machine type register
- mov r8, #0 @ pass null pointer as atag
+ adr r0, dtb_info
+ ldmia r0, {r1, r3, r4, r5, r7}
+
+ sub r0, r0, r1 @ calculate the delta offset
+ add r5, r5, r0 @ _edata
+
+ ldr lr, [r5, #0] @ check if valid DTB is present
+ cmp lr, r3
+ bne 0f
+
+ add r9, r7, #31 @ rounded up to a multiple
+ bic r9, r9, #31 @ ... of 32 bytes
+
+ add r6, r9, r5 @ copy from _edata
+ add r9, r9, r4 @ to MEMORY_START
+
+1: ldmdb r6!, {r0 - r3, r10 - r12, lr}
+ cmp r6, r5
+ stmdb r9!, {r0 - r3, r10 - r12, lr}
+ bhi 1b
+
+ /* Success: Zero board ID, pointer to start of memory for atag/dtb */
+ mov r7, #0
+ mov r8, r4
b 2f
-1 : .long MACH_TYPE
+ .align 2
+dtb_info:
+ .word dtb_info
+#ifndef __ARMEB__
+ .word 0xedfe0dd0 @ sig is 0xd00dfeed big endian
+#else
+ .word 0xd00dfeed
+#endif
+ .word MEMORY_START
+ .word _edata
+ .word 0x4000 @ maximum DTB size
+0:
+ /* Failure: Zero board ID, NULL atag/dtb */
+ mov r7, #0
+ mov r8, #0 @ pass null pointer as atag
2 :
#endif /* CONFIG_ZBOOT_ROM */
*/
/dts-v1/;
-/include/ "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "skeleton.dtsi"
/ {
model = "Texas Instruments Keystone 2 SoC";
timer {
compatible = "arm,armv7-timer";
- interrupts = <1 13 0xf08>,
- <1 14 0xf08>,
- <1 11 0xf08>,
- <1 10 0x308>;
+ interrupts =
+ <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
compatible = "arm,cortex-a15-pmu";
- interrupts = <0 20 0xf01>,
- <0 21 0xf01>,
- <0 22 0xf01>,
- <0 23 0xf01>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
};
soc {
reg-io-width = <4>;
reg = <0x02530c00 0x100>;
clock-frequency = <133120000>;
- interrupts = <0 277 0xf01>;
+ interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
};
uart1: serial@02531000 {
reg-io-width = <4>;
reg = <0x02531000 0x100>;
clock-frequency = <133120000>;
- interrupts = <0 280 0xf01>;
+ interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
};
};
#size-cells = <2>;
chosen { };
aliases { };
- memory { device_type = "memory"; reg = <0 0>; };
+ memory { device_type = "memory"; reg = <0 0 0 0>; };
};
Say Y here if you intend to run this kernel on the ARM Prospector
720T.
-config ARCH_FORTUNET
- bool "FORTUNET"
-
config EP72XX_ROM_BOOT
bool "EP721x/EP731x ROM boot"
help
obj-$(CONFIG_ARCH_CDB89712) += board-cdb89712.o
obj-$(CONFIG_ARCH_CLEP7312) += board-clep7312.o
obj-$(CONFIG_ARCH_EDB7211) += board-edb7211.o
-obj-$(CONFIG_ARCH_FORTUNET) += board-fortunet.o
obj-$(CONFIG_ARCH_P720T) += board-p720t.o
static void __init autcpu12_init_late(void)
{
gpio_request_array(autcpu12_gpios, ARRAY_SIZE(autcpu12_gpios));
-
- if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) {
- /* We are need both drivers to handle NAND */
- platform_device_register(&autcpu12_nand_pdev);
- }
+ platform_device_register(&autcpu12_nand_pdev);
}
MACHINE_START(AUTCPU12, "autronix autcpu12")
{ EDB7211_LCDBL, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT" },
};
-static struct map_desc edb7211_io_desc[] __initdata = {
- { /* Memory-mapped extra keyboard row */
- .virtual = IO_ADDRESS(EDB7211_EXTKBD_BASE),
- .pfn = __phys_to_pfn(EDB7211_EXTKBD_BASE),
- .length = SZ_1M,
- .type = MT_DEVICE,
- },
-};
-
-void __init edb7211_map_io(void)
-{
- clps711x_map_io();
- iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
-}
-
/* Reserve screen memory region at the start of main system memory. */
static void __init edb7211_reserve(void)
{
.nr_irqs = CLPS711X_NR_IRQS,
.fixup = fixup_edb7211,
.reserve = edb7211_reserve,
- .map_io = edb7211_map_io,
+ .map_io = clps711x_map_io,
.init_early = clps711x_init_early,
.init_irq = clps711x_init_irq,
.init_time = clps711x_timer_init,
+++ /dev/null
-/*
- * linux/arch/arm/mach-clps711x/fortunet.c
- *
- * Derived from linux/arch/arm/mach-integrator/arch.c
- *
- * Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/initrd.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-
-#include <asm/memory.h>
-
-#include "common.h"
-
-struct meminfo memmap = {
- .nr_banks = 1,
- .bank = {
- {
- .start = 0xC0000000,
- .size = 0x01000000,
- },
- },
-};
-
-typedef struct tag_IMAGE_PARAMS
-{
- int ramdisk_ok;
- int ramdisk_address;
- int ramdisk_size;
- int ram_size;
- int extra_param_type;
- int extra_param_ptr;
- int command_line;
-} IMAGE_PARAMS;
-
-#define IMAGE_PARAMS_PHYS 0xC01F0000
-
-static void __init
-fortunet_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
-{
- IMAGE_PARAMS *ip = phys_to_virt(IMAGE_PARAMS_PHYS);
- *cmdline = phys_to_virt(ip->command_line);
-#ifdef CONFIG_BLK_DEV_INITRD
- if(ip->ramdisk_ok)
- {
- initrd_start = __phys_to_virt(ip->ramdisk_address);
- initrd_end = initrd_start + ip->ramdisk_size;
- }
-#endif
- memmap.bank[0].size = ip->ram_size;
- *mi = memmap;
-}
-
-MACHINE_START(FORTUNET, "ARM-FortuNet")
- /* Maintainer: FortuNet Inc. */
- .nr_irqs = CLPS711X_NR_IRQS,
- .fixup = fortunet_fixup,
- .map_io = clps711x_map_io,
- .init_early = clps711x_init_early,
- .init_irq = clps711x_init_irq,
- .init_time = clps711x_timer_init,
- .handle_irq = clps711x_handle_irq,
- .restart = clps711x_restart,
-MACHINE_END
unsigned i;
for (i = 0; i < ARRAY_SIZE(clps711x_syscon_res); i++)
- platform_device_register_simple("clps711x-syscon", i + 1,
+ platform_device_register_simple("syscon", i + 1,
&clps711x_syscon_res[i], 1);
}
/* Enable gpio for a range of pins. mode should be a combination of
GPIO_OUTPUT_OK | GPIO_INPUT_OK */
-static void dove_mpp_gpio_mode(int start, int end, int gpio_mode)
+static void __init dove_mpp_gpio_mode(int start, int end, int gpio_mode)
{
int i;
select HAVE_SMP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
- select HAVE_SCHED_CLOCK
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_ERRATA_798181 if SMP
help
}
struct smp_operations keystone_smp_ops __initdata = {
- .smp_init_cpus = arm_dt_init_cpu_maps,
.smp_boot_secondary = keystone_smp_boot_secondary,
};
* Return: Non zero value on failure
*/
ENTRY(keystone_cpu_smc)
- stmfd sp!, {r4-r12, lr}
+ stmfd sp!, {r4-r11, lr}
smc #0
- dsb
- ldmfd sp!, {r4-r12, pc}
+ ldmfd sp!, {r4-r11, pc}
ENDPROC(keystone_cpu_smc)
select ARM_ERRATA_798181 if SMP
config SOC_AM33XX
- bool "AM33XX support"
+ bool "TI AM33XX"
depends on ARCH_MULTI_V7
select ARCH_OMAP2PLUS
select ARM_CPU_SUSPEND if PM
{
/* TODO: Handle mode and cmd if necessary */
- am33xx_prm_rmw_reg_bits(AM33XX_GLOBAL_WARM_SW_RST_MASK,
- AM33XX_GLOBAL_WARM_SW_RST_MASK,
+ am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
+ AM33XX_RST_GLOBAL_WARM_SW_MASK,
AM33XX_PRM_DEVICE_MOD,
AM33XX_PRM_RSTCTRL_OFFSET);
static void __init am3517_crane_init(void)
{
- int ret;
-
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_serial_init();
omap_sdrc_init(NULL, NULL);
static inline void omap_init_audio(void) {}
#endif
-#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
- defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
-
-static void __init omap_init_mcpdm(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
-
- oh = omap_hwmod_lookup("mcpdm");
- if (!oh)
- return;
-
- pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0);
- WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
-}
-#else
-static inline void omap_init_mcpdm(void) {}
-#endif
-
-#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
- defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
-
-static void __init omap_init_dmic(void)
-{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
-
- oh = omap_hwmod_lookup("dmic");
- if (!oh)
- return;
-
- pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0);
- WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
-}
-#else
-static inline void omap_init_dmic(void) {}
-#endif
-
#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
omap_init_mbox();
/* If dtb is there, the devices will be created dynamically */
if (!of_have_populated_dt()) {
- omap_init_dmic();
- omap_init_mcpdm();
omap_init_mcspi();
omap_init_sham();
omap_init_aes();
static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ];
static struct irq_chip gpmc_irq_chip;
-static unsigned gpmc_irq_start;
+static int gpmc_irq_start;
static struct resource gpmc_mem_root;
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
reg |= num;
__raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET);
- reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
+ reg = __raw_readl(base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET) &
NUMERATOR_DENUMERATOR_MASK;
reg |= den;
__raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
}
#define RESCNT2 IOMEM(0xe6188020)
-static void eva_restart(char mode, const char *cmd)
+static void eva_restart(enum reboot_mode mode, const char *cmd)
{
/* Do soft power on reset */
- writel((1 << 31), RESCNT2);
+ writel(1 << 31, RESCNT2);
}
static const char *eva_boards_compat_dt[] __initdata = {
CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]),
- CLKDEV_DEV_ID("renesas_tpu_pwm", &mstp_clks[MSTP304]),
+ CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]),
CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]),
lsl r1, r1, #3 @ we will shift by cpu_id * 8 bits
ldr r2, [r0, #8] @ SCU Power Status Register
mov r3, #3
- bic r2, r2, r3, lsl r1 @ Clear bits of our CPU (Run Mode)
+ lsl r3, r3, r1
+ bic r2, r2, r3 @ Clear bits of our CPU (Run Mode)
str r2, [r0, #8] @ write back
b shmobile_invalidate_start
ENDPROC(shmobile_boot_scu)
.text
+ .align 2
.globl shmobile_scu_base
shmobile_scu_base:
.space 4
* This will be mapped at address 0 by SBAR register.
* We need _long_ jump to the physical address.
*/
+ .arm
.align 12
ENTRY(shmobile_boot_vector)
ldr r0, 2f
- ldr pc, 1f
+ ldr r1, 1f
+ bx r1
+
ENDPROC(shmobile_boot_vector)
+ .align 2
.globl shmobile_boot_fn
shmobile_boot_fn:
1: .space 4
#ifndef ZBOOT_H
#define ZBOOT_H
-#include <asm/mach-types.h>
#include <mach/zboot_macros.h>
/**************************************************
**************************************************/
#ifdef CONFIG_MACH_MACKEREL
-#define MACH_TYPE MACH_TYPE_MACKEREL
#define MEMORY_START 0x40000000
#include "mach/head-mackerel.txt"
#else
sh7372_resume_core_standby_sysc:
ldr pc, 1f
+ .align 2
.globl sh7372_cpu_resume
sh7372_cpu_resume:
1: .space 4
1:
b 1b
+ .align 2
kernel_flush:
.word v7_flush_dcache_all
#endif
dma_irq = platform_get_irq_byname(pdev, irq_name);
if (dma_irq < 0) {
dev_err(&pdev->dev, "failed: request IRQ %d", dma_irq);
+ ret = dma_irq;
goto exit_dma_lch_fail;
}
ret = setup_irq(dma_irq, &omap24xx_dma_irq);
static const struct platform_device_id syscon_ids[] = {
{ "syscon", },
-#ifdef CONFIG_ARCH_CLPS711X
- { "clps711x-syscon", },
-#endif
{ }
};
git.openpandora.org / pandora-kernel.git / commitdiff