RX-51: Add support for OMAP3 ROM Random Number Generator
authorPali Rohár <pali.rohar@gmail.com>
Fri, 20 Sep 2013 13:25:07 +0000 (15:25 +0200)
committerTony Lindgren <tony@atomide.com>
Tue, 8 Oct 2013 19:02:12 +0000 (12:02 -0700)
Adding this driver as platform device and only for RX-51 until somebody test if
it working also on other OMAP3 HS devices and until there will be generic ARM
way to deal with SMC calls.

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
[tony@atomide.com: folded in the clock alias change]
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/board-rx51-peripherals.c
arch/arm/mach-omap2/cclock3xxx_data.c
arch/arm/mach-omap2/omap-secure.c
arch/arm/mach-omap2/omap-secure.h

index c3270c0..497d260 100644 (file)
@@ -57,6 +57,8 @@
 #include "common-board-devices.h"
 #include "gpmc.h"
 #include "gpmc-onenand.h"
+#include "soc.h"
+#include "omap-secure.h"
 
 #define SYSTEM_REV_B_USES_VAUX3        0x1699
 #define SYSTEM_REV_S_USES_VAUX3 0x8
@@ -1289,6 +1291,22 @@ static void __init rx51_init_twl4030_hwmon(void)
        platform_device_register(&madc_hwmon);
 }
 
+static struct platform_device omap3_rom_rng_device = {
+       .name           = "omap3-rom-rng",
+       .id             = -1,
+       .dev    = {
+               .platform_data  = rx51_secure_rng_call,
+       },
+};
+
+static void __init rx51_init_omap3_rom_rng(void)
+{
+       if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
+               pr_info("RX-51: Registring OMAP3 HWRNG device\n");
+               platform_device_register(&omap3_rom_rng_device);
+       }
+}
+
 void __init rx51_peripherals_init(void)
 {
        rx51_i2c_init();
@@ -1309,5 +1327,6 @@ void __init rx51_peripherals_init(void)
 
        rx51_charger_init();
        rx51_init_twl4030_hwmon();
+       rx51_init_omap3_rom_rng();
 }
 
index 334b767..03a2829 100644 (file)
@@ -3275,6 +3275,7 @@ static struct omap_clk omap36xx_clks[] = {
 static struct omap_clk omap34xx_omap36xx_clks[] = {
        CLK(NULL,       "aes1_ick",     &aes1_ick),
        CLK("omap_rng", "ick",          &rng_ick),
+       CLK("omap3-rom-rng",    "ick",  &rng_ick),
        CLK(NULL,       "sha11_ick",    &sha11_ick),
        CLK(NULL,       "des1_ick",     &des1_ick),
        CLK(NULL,       "cam_mclk",     &cam_mclk),
index 146a7c4..5ac122e 100644 (file)
@@ -135,3 +135,14 @@ u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
                                      FLAG_START_CRITICAL,
                                      1, acr, 0, 0, 0);
 }
+
+/**
+ * rx51_secure_rng_call: Routine for HW random generator
+ */
+u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag)
+{
+       return rx51_secure_dispatcher(RX51_PPA_HWRNG,
+                                     0,
+                                     NO_FLAG,
+                                     3, ptr, count, flag, 0);
+}
index 51b59c6..f6cabb0 100644 (file)
@@ -65,6 +65,7 @@ extern int omap_secure_ram_reserve_memblock(void);
 extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
                                  u32 arg1, u32 arg2, u32 arg3, u32 arg4);
 extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
+extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
 
 #ifdef CONFIG_OMAP4_ERRATA_I688
 extern int omap_barrier_reserve_memblock(void);