#include <command.h>
#include <malloc.h>
#include <flash.h>
+#include <mtd/cfi_flash.h>
#include <asm/4xx_pci.h>
#include <pci.h>
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
extern void lxt971_no_sleep(void);
-extern ulong flash_get_size (ulong base, int banknum);
-
-int flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
/* fpga configuration data - gzip compressed and generated by bin2c */
const unsigned char fpgadata[] =
int board_early_init_r(void)
{
if (gd->board_type >= 8)
- flash_banks = 1;
+ cfi_flash_num_flash_banks = 1;
return 0;
}
#include <miiphy.h>
#include <asm/mmu.h>
#include <pci.h>
+#include <flash.h>
+#include <mtd/cfi_flash.h>
DECLARE_GLOBAL_DATA_PTR;
#define INITIAL_CS_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_12 | \
CSCONFIG_COL_BIT_9)
-/* Global variable used to store detected number of banks */
-int tqm834x_num_flash_banks;
-
/* External definitions */
ulong flash_get_size (ulong base, int banknum);
-extern flash_info_t flash_info[];
/* Local functions */
static int detect_num_flash_banks(void);
ulong bank2_size;
ulong total_size;
- tqm834x_num_flash_banks = 2; /* assume two banks */
+ cfi_flash_num_flash_banks = 2; /* assume two banks */
/* Get bank 1 and 2 information */
bank1_size = flash_get_size(CONFIG_SYS_FLASH_BASE, 0);
* we got the some data reading from Flash.
* There is only one mirrored bank.
*/
- tqm834x_num_flash_banks = 1;
+ cfi_flash_num_flash_banks = 1;
total_size = bank1_size;
}
}
}
- debug("Number of flash banks detected: %d\n", tqm834x_num_flash_banks);
+ debug("Number of flash banks detected: %d\n", cfi_flash_num_flash_banks);
/* set OR0 and BR0 */
set_lbc_or(0, CONFIG_SYS_OR_TIMING_FLASH |
#if defined(CONFIG_CMD_IMLS)
#include <flash.h>
+#include <mtd/cfi_flash.h>
extern flash_info_t flash_info[]; /* info for FLASH chips */
static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#endif
#include <flash.h>
#if !defined(CONFIG_SYS_NO_FLASH)
+#include <mtd/cfi_flash.h>
extern flash_info_t flash_info[]; /* info for FLASH chips */
* reading and writing ... (yes there is such a Hardware).
*/
-#ifndef CONFIG_SYS_FLASH_BANKS_LIST
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-#endif
-
static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
static uint flash_verbose = 1;
-/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
-#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-#else
-# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
-#endif
-
flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
/*
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
#endif
+#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
+int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
+#endif
+
static phys_addr_t __cfi_flash_bank_addr(int i)
{
return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
/*
* FLASH organization
*/
-#ifndef __ASSEMBLY__
-extern int flash_banks;
-#endif
-
#define CONFIG_SYS_FLASH_BASE 0xFE000000
#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS flash_banks /* max num of flash banks */
- /* updated in board_early_init_r */
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
#define CONFIG_SYS_FLASH_QUIET_TEST 1
#define CONFIG_SYS_FLASH_INCREMENT 0x01000000
#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CONFIG_SYS_FLASH_BANKS_LIST { 0xFF800000 }
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
/* What should the base address of the main FLASH be and how big is
* it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk
* The main FLASH is whichever is connected to *CS0.
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
* defined as tqm834x_num_flash_banks.
*/
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
-#ifndef __ASSEMBLY__
-extern int tqm834x_num_flash_banks;
-#endif
-#define CONFIG_SYS_MAX_FLASH_BANKS (tqm834x_num_flash_banks)
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
#endif
} flash_info_t;
+extern flash_info_t flash_info[]; /* info for FLASH chips */
+
typedef unsigned long flash_sect_t;
/*
u8 minor_version;
} __attribute__((packed));
+#ifndef CONFIG_SYS_FLASH_BANKS_LIST
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+#endif
+
+/*
+ * CFI_MAX_FLASH_BANKS only used for flash_info struct declaration.
+ *
+ * Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined
+ */
+#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
+#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
+#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
+/* board code can update this variable before CFI detection */
+extern int cfi_flash_num_flash_banks;
+#else
+#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
+#endif
+
void flash_write_cmd(flash_info_t * info, flash_sect_t sect,
uint offset, u32 cmd);