board: gateworks: venice: add imx8mm-gw7901 support
authorTim Harvey <tharvey@gateworks.com>
Wed, 30 Jun 2021 23:50:02 +0000 (16:50 -0700)
committerStefano Babic <sbabic@denx.de>
Sat, 10 Jul 2021 16:12:41 +0000 (18:12 +0200)
The Gateworks GW7901 is an ARM based single board computer (SBC)
featuring:
 - i.MX8M Mini SoC
 - LPDDR4 DRAM
 - eMMC FLASH
 - SPI FRAM
 - Gateworks System Controller (GSC)
 - Atmel ATECC Crypto Authentication
 - USB 2.0
 - Microchip GbE Switch
 - Multiple multi-protocol RS232/RS485/RS422 Serial ports
 - onboard 802.11ac WiFi / BT
 - microSD socket
 - miniPCIe socket with PCIe, USB 2.0 and dual SIM sockets
 - Wide range DC power input
 - 802.3at PoE

To add support for this board:
 - add dts from Linux (accepted for v5.14)
 - add SPL PMIC config

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
arch/arm/dts/Makefile
arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/imx8mm-venice-gw7901.dts [new file with mode: 0644]
board/gateworks/venice/spl.c
configs/imx8mm_venice_defconfig

index 59d8078..db3891e 100644 (file)
@@ -865,6 +865,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
        imx8mm-venice-gw71xx-0x.dtb \
        imx8mm-venice-gw72xx-0x.dtb \
        imx8mm-venice-gw73xx-0x.dtb \
+       imx8mm-venice-gw7901.dtb \
        imx8mm-verdin.dtb \
        phycore-imx8mm.dtb \
        imx8mn-ddr4-evk.dtb \
diff --git a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi
new file mode 100644 (file)
index 0000000..6992d91
--- /dev/null
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Gateworks Corporation
+ */
+
+&{/soc@0} {
+       u-boot,dm-pre-reloc;
+       u-boot,dm-spl;
+};
+
+&clk {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       /delete-property/ assigned-clock-rates;
+};
+
+&osc_24m {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&aips1 {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&aips2 {
+       u-boot,dm-spl;
+};
+
+&aips3 {
+       u-boot,dm-spl;
+};
+
+&iomuxc {
+       u-boot,dm-spl;
+};
+
+&gpio1 {
+       u-boot,dm-spl;
+};
+
+&gpio2 {
+       u-boot,dm-spl;
+};
+
+&gpio3 {
+       u-boot,dm-spl;
+};
+
+&gpio4 {
+       u-boot,dm-spl;
+};
+
+&gpio5 {
+       u-boot,dm-spl;
+};
+
+&uart2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_uart2 {
+       u-boot,dm-spl;
+};
+
+&usdhc2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+       u-boot,dm-spl;
+};
+
+&usdhc3 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+       u-boot,dm-spl;
+};
+
+&i2c1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_i2c1 {
+       u-boot,dm-spl;
+};
+
+&i2c2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_i2c2 {
+       u-boot,dm-spl;
+};
+
+&fec1 {
+       phy-reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+       phy-reset-duration = <1>;
+       phy-reset-post-delay = <1>;
+};
+
+&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
+       u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
+       u-boot,dm-spl;
+};
+
+&pinctrl_pmic {
+       u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm-venice-gw7901.dts b/arch/arm/dts/imx8mm-venice-gw7901.dts
new file mode 100644 (file)
index 0000000..0216fac
--- /dev/null
@@ -0,0 +1,1020 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2020 Gateworks Corporation
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/leds/common.h>
+
+#include "imx8mm.dtsi"
+
+/ {
+       model = "Gateworks Venice GW7901 i.MX8MM board";
+       compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
+
+       aliases {
+               ethernet0 = &fec1;
+               ethernet1 = &lan1;
+               ethernet2 = &lan2;
+               ethernet3 = &lan3;
+               ethernet4 = &lan4;
+               usb0 = &usbotg1;
+               usb1 = &usbotg2;
+       };
+
+       chosen {
+               stdout-path = &uart2;
+       };
+
+       memory@40000000 {
+               device_type = "memory";
+               reg = <0x0 0x40000000 0 0x80000000>;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               user-pb {
+                       label = "user_pb";
+                       gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+               };
+
+               user-pb1x {
+                       label = "user_pb1x";
+                       linux,code = <BTN_1>;
+                       interrupt-parent = <&gsc>;
+                       interrupts = <0>;
+               };
+
+               key-erased {
+                       label = "key_erased";
+                       linux,code = <BTN_2>;
+                       interrupt-parent = <&gsc>;
+                       interrupts = <1>;
+               };
+
+               eeprom-wp {
+                       label = "eeprom_wp";
+                       linux,code = <BTN_3>;
+                       interrupt-parent = <&gsc>;
+                       interrupts = <2>;
+               };
+
+               tamper {
+                       label = "tamper";
+                       linux,code = <BTN_4>;
+                       interrupt-parent = <&gsc>;
+                       interrupts = <5>;
+               };
+
+               switch-hold {
+                       label = "switch_hold";
+                       linux,code = <BTN_5>;
+                       interrupt-parent = <&gsc>;
+                       interrupts = <7>;
+               };
+       };
+
+       led-controller {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       label = "led01_red";
+                       gpios = <&leds_gpio 0 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-1 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "led01_grn";
+                       gpios = <&leds_gpio 1 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-2 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       label = "led02_red";
+                       gpios = <&leds_gpio 2 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-3 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "led02_grn";
+                       gpios = <&leds_gpio 3 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-4 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       label = "led03_red";
+                       gpios = <&leds_gpio 4 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-5 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "led03_grn";
+                       gpios = <&leds_gpio 5 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-6 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       label = "led04_red";
+                       gpios = <&leds_gpio 8 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-7 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "led04_grn";
+                       gpios = <&leds_gpio 9 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-8 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       label = "led05_red";
+                       gpios = <&leds_gpio 10 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-9 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "led05_grn";
+                       gpios = <&leds_gpio 11 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-a {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_RED>;
+                       label = "led06_red";
+                       gpios = <&leds_gpio 12 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               led-b {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "led06_grn";
+                       gpios = <&leds_gpio 13 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+
+       regulator-ioexp {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_ioexp>;
+               compatible = "regulator-fixed";
+               regulator-name = "ioexp";
+               gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               startup-delay-us = <100>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       regulator-isouart {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_isouart>;
+               compatible = "regulator-fixed";
+               regulator-name = "iso_uart";
+               gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
+               startup-delay-us = <100>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       reg_usb2_vbus: regulator-usb2 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usb2>;
+               compatible = "regulator-fixed";
+               regulator-name = "usb_usb2_vbus";
+               gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       reg_wifi: regulator-wifi {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_wl>;
+               compatible = "regulator-fixed";
+               regulator-name = "wifi";
+               gpio = <&gpio3 25 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               startup-delay-us = <100>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+};
+
+&ddrc {
+       operating-points-v2 = <&ddrc_opp_table>;
+
+       ddrc_opp_table: opp-table {
+               compatible = "operating-points-v2";
+
+               opp-25M {
+                       opp-hz = /bits/ 64 <25000000>;
+               };
+
+               opp-100M {
+                       opp-hz = /bits/ 64 <100000000>;
+               };
+
+               opp-750M {
+                       opp-hz = /bits/ 64 <750000000>;
+               };
+       };
+};
+
+&ecspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1>;
+       cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <40000000>;
+               status = "okay";
+       };
+};
+
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec1>;
+       phy-mode = "rgmii-id";
+       local-mac-address = [00 00 00 00 00 00];
+       status = "okay";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       gsc: gsc@20 {
+               compatible = "gw,gsc";
+               reg = <0x20>;
+               pinctrl-0 = <&pinctrl_gsc>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-controller;
+               #interrupt-cells = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               adc {
+                       compatible = "gw,gsc-adc";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       channel@6 {
+                               gw,mode = <0>;
+                               reg = <0x06>;
+                               label = "temp";
+                       };
+
+                       channel@8 {
+                               gw,mode = <1>;
+                               reg = <0x08>;
+                               label = "vdd_bat";
+                       };
+
+                       channel@82 {
+                               gw,mode = <2>;
+                               reg = <0x82>;
+                               label = "vin_aux1";
+                               gw,voltage-divider-ohms = <22100 1000>;
+                       };
+
+                       channel@84 {
+                               gw,mode = <2>;
+                               reg = <0x84>;
+                               label = "vin_aux2";
+                               gw,voltage-divider-ohms = <22100 1000>;
+                       };
+
+                       channel@86 {
+                               gw,mode = <2>;
+                               reg = <0x86>;
+                               label = "vdd_vin";
+                               gw,voltage-divider-ohms = <22100 1000>;
+                       };
+
+                       channel@88 {
+                               gw,mode = <2>;
+                               reg = <0x88>;
+                               label = "vdd_3p3";
+                               gw,voltage-divider-ohms = <10000 10000>;
+                       };
+
+                       channel@8c {
+                               gw,mode = <2>;
+                               reg = <0x8c>;
+                               label = "vdd_2p5";
+                               gw,voltage-divider-ohms = <10000 10000>;
+                       };
+
+                       channel@8e {
+                               gw,mode = <2>;
+                               reg = <0x8e>;
+                               label = "vdd_0p95";
+                       };
+
+                       channel@90 {
+                               gw,mode = <2>;
+                               reg = <0x90>;
+                               label = "vdd_soc";
+                       };
+
+                       channel@92 {
+                               gw,mode = <2>;
+                               reg = <0x92>;
+                               label = "vdd_arm";
+                       };
+
+                       channel@98 {
+                               gw,mode = <2>;
+                               reg = <0x98>;
+                               label = "vdd_1p8";
+                       };
+
+                       channel@9a {
+                               gw,mode = <2>;
+                               reg = <0x9a>;
+                               label = "vdd_1p2";
+                       };
+
+                       channel@9c {
+                               gw,mode = <2>;
+                               reg = <0x9c>;
+                               label = "vdd_dram";
+                       };
+
+                       channel@a2 {
+                               gw,mode = <2>;
+                               reg = <0xa2>;
+                               label = "vdd_gsc";
+                               gw,voltage-divider-ohms = <10000 10000>;
+                       };
+               };
+       };
+
+       gpio: gpio@23 {
+               compatible = "nxp,pca9555";
+               reg = <0x23>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-parent = <&gsc>;
+               interrupts = <4>;
+       };
+
+       eeprom@50 {
+               compatible = "atmel,24c02";
+               reg = <0x50>;
+               pagesize = <16>;
+       };
+
+       eeprom@51 {
+               compatible = "atmel,24c02";
+               reg = <0x51>;
+               pagesize = <16>;
+       };
+
+       eeprom@52 {
+               compatible = "atmel,24c02";
+               reg = <0x52>;
+               pagesize = <16>;
+       };
+
+       eeprom@53 {
+               compatible = "atmel,24c02";
+               reg = <0x53>;
+               pagesize = <16>;
+       };
+
+       rtc@68 {
+               compatible = "dallas,ds1672";
+               reg = <0x68>;
+       };
+};
+
+&i2c2 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       pmic@4b {
+               compatible = "rohm,bd71847";
+               reg = <0x4b>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
+               interrupt-parent = <&gpio3>;
+               interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
+               rohm,reset-snvs-powered;
+               #clock-cells = <0>;
+               clocks = <&osc_32k 0>;
+               clock-output-names = "clk-32k-out";
+
+               regulators {
+                       /* vdd_soc: 0.805-0.900V (typ=0.8V) */
+                       BUCK1 {
+                               regulator-name = "buck1";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <1250>;
+                       };
+
+                       /* vdd_arm: 0.805-1.0V (typ=0.9V) */
+                       BUCK2 {
+                               regulator-name = "buck2";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <1250>;
+                               rohm,dvs-run-voltage = <1000000>;
+                               rohm,dvs-idle-voltage = <900000>;
+                       };
+
+                       /* vdd_0p9: 0.805-1.0V (typ=0.9V) */
+                       BUCK3 {
+                               regulator-name = "buck3";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* vdd_3p3 */
+                       BUCK4 {
+                               regulator-name = "buck4";
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* vdd_1p8 */
+                       BUCK5 {
+                               regulator-name = "buck5";
+                               regulator-min-microvolt = <1605000>;
+                               regulator-max-microvolt = <1995000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* vdd_dram */
+                       BUCK6 {
+                               regulator-name = "buck6";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1400000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* nvcc_snvs_1p8 */
+                       LDO1 {
+                               regulator-name = "ldo1";
+                               regulator-min-microvolt = <1600000>;
+                               regulator-max-microvolt = <1900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* vdd_snvs_0p8 */
+                       LDO2 {
+                               regulator-name = "ldo2";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* vdda_1p8 */
+                       LDO3 {
+                               regulator-name = "ldo3";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       LDO4 {
+                               regulator-name = "ldo4";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       LDO6 {
+                               regulator-name = "ldo6";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&i2c3 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "okay";
+
+       leds_gpio: gpio@20 {
+               compatible = "nxp,pca9555";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       switch: switch@5f {
+               compatible = "microchip,ksz9897";
+               reg = <0x5f>;
+               pinctrl-0 = <&pinctrl_ksz>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+               phy-mode = "rgmii-id";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       lan1: port@0 {
+                               reg = <0>;
+                               label = "lan1";
+                               local-mac-address = [00 00 00 00 00 00];
+                       };
+
+                       lan2: port@1 {
+                               reg = <1>;
+                               label = "lan2";
+                               local-mac-address = [00 00 00 00 00 00];
+                       };
+
+                       lan3: port@2 {
+                               reg = <2>;
+                               label = "lan3";
+                               local-mac-address = [00 00 00 00 00 00];
+                       };
+
+                       lan4: port@3 {
+                               reg = <3>;
+                               label = "lan4";
+                               local-mac-address = [00 00 00 00 00 00];
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "cpu";
+                               ethernet = <&fec1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+       };
+
+       crypto@60 {
+               compatible = "atmel,atecc508a";
+               reg = <0x60>;
+       };
+};
+
+&i2c4 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
+       rts-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+       cts-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+       dtr-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+       dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+       dcd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+/* console */
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
+       cts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
+       rts-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_uart4_gpio>;
+       cts-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
+       rts-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&usbotg1 {
+       dr_mode = "host";
+       disable-over-current;
+       status = "okay";
+};
+
+&usbotg2 {
+       dr_mode = "host";
+       vbus-supply = <&reg_usb2_vbus>;
+       status = "okay";
+};
+
+/* SDIO WiFi */
+&usdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       bus-width = <4>;
+       non-removable;
+       vmmc-supply = <&reg_wifi>;
+       status = "okay";
+};
+
+/* microSD */
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       vmmc-supply = <&reg_3p3v>;
+       status = "okay";
+};
+
+/* eMMC */
+&usdhc3 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3         0x40000041 /* DIG2_OUT */
+                       MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4         0x40000041 /* DIG2_IN */
+                       MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6       0x40000041 /* DIG1_IN */
+                       MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7       0x40000041 /* DIG1_OUT */
+                       MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30        0x40000041 /* SIM2DET# */
+                       MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29        0x40000041 /* SIM1DET# */
+                       MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5    0x40000041 /* SIM2SEL */
+               >;
+       };
+
+       pinctrl_fec1: fec1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
+                       MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
+                       MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
+                       MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
+                       MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
+                       MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
+                       MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
+                       MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
+                       MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
+                       MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
+                       MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
+                       MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
+                       MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
+                       MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
+                       MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18               0x19 /* IRQ# */
+                       MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19               0x19 /* RST# */
+               >;
+       };
+
+       pinctrl_gsc: gscgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16       0x159
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL          0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA          0x400001c3
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c3
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA          0x400001c3
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA          0x400001c3
+               >;
+       };
+
+       pinctrl_ksz: kszgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18       0x41
+                       MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19       0x41 /* RST# */
+               >;
+       };
+
+       pinctrl_pmic: pmicgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20        0x41
+               >;
+       };
+
+       pinctrl_reg_isouart: regisouartgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13      0x40000041
+               >;
+       };
+
+       pinctrl_reg_ioexp: regioexpgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21       0x40000041
+               >;
+       };
+
+       pinctrl_reg_wl: regwlgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25       0x40000041
+               >;
+       };
+
+       pinctrl_reg_usb2: regusb1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2        0x41
+                       MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17       0x140
+                       MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC     0x140
+               >;
+       };
+
+       pinctrl_spi1: spi1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK    0x82
+                       MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI    0x82
+                       MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO    0x82
+                       MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9       0x140
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX     0x140
+                       MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX     0x140
+                       MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1       0x140
+                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10      0x140
+                       MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11      0x140
+                       MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12      0x140
+                       MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14      0x140
+               >;
+       };
+
+       pinctrl_uart1_gpio: uart1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0       0x40000041 /* RS422# */
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3       0x40000041 /* RS485# */
+                       MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5       0x40000041 /* RS232# */
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
+                       MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
+               >;
+       };
+
+       pinctrl_uart3: uart3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX     0x140
+                       MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX     0x140
+                       MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9        0x140
+                       MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10       0x140
+               >;
+       };
+
+       pinctrl_uart3_gpio: uart3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6        0x40000110 /* RS232# */
+                       MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7        0x40000110 /* RS422# */
+                       MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8        0x40000110 /* RS485# */
+               >;
+       };
+
+       pinctrl_uart4: uart4grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX     0x140
+                       MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX     0x140
+                       MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11     0x140
+                       MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12     0x140
+               >;
+       };
+
+       pinctrl_uart4_gpio: uart4gpiogrp {
+               fsl,pins = <
+
+                       MX8MM_IOMUXC_ECSPI2_SCLK_GPIO5_IO10     0x40000041 /* RS232# */
+                       MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13      0x40000041 /* RS422# */
+                       MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27       0x40000041 /* RS485# */
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK         0x190
+                       MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD         0x1d0
+                       MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0     0x1d0
+                       MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1     0x1d0
+                       MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2     0x1d0
+                       MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3     0x1d0
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x190
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d0
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
+               >;
+       };
+
+       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x194
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d4
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
+               >;
+       };
+
+       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x196
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d6
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
+               >;
+       };
+
+       pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12        0x1c4
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
+               >;
+       };
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK       0x190
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD       0x1d0
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0   0x1d0
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1   0x1d0
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2   0x1d0
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3   0x1d0
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4     0x1d0
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5    0x1d0
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6    0x1d0
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7      0x1d0
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE   0x190
+               >;
+       };
+
+       pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK       0x194
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD       0x1d4
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0   0x1d4
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1   0x1d4
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2   0x1d4
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3   0x1d4
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4     0x1d4
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5    0x1d4
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6    0x1d4
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7      0x1d4
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE   0x194
+               >;
+       };
+
+       pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK       0x196
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD       0x1d6
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0   0x1d6
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1   0x1d6
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2   0x1d6
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3   0x1d6
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4     0x1d6
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5    0x1d6
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6    0x1d6
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7      0x1d6
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE   0x196
+               >;
+       };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B    0xc6
+               >;
+       };
+};
+
+&cpu_alert0 {
+       temperature = <95000>;
+       hysteresis = <2000>;
+       type = "passive";
+};
+
+&cpu_crit0 {
+       temperature = <105000>;
+       hysteresis = <2000>;
+       type = "critical";
+};
index ea500d4..8c35775 100644 (file)
@@ -26,6 +26,7 @@
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
 
+#include <power/bd71837.h>
 #include <power/mp5416.h>
 
 #include "gsc.h"
@@ -88,8 +89,23 @@ int board_early_init_f(void)
  * Note that we can not use pmic dm drivers here as we have a generic
  * venice dt that does not have board-specific pmic's defined.
  *
- * Instead we must use dm_i2c.
+ * Instead we must use dm_i2c so we a helpers to give us
+ * clrsetbit functions we would otherwise have if we could use PMIC dm
+ * drivers.
  */
+static int dm_i2c_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
+{
+       int ret;
+       u8 val;
+
+       ret = dm_i2c_read(dev, reg, &val, 1);
+       if (ret)
+               return ret;
+       val = (val & ~clr) | set;
+
+       return dm_i2c_write(dev, reg, &val, 1);
+}
+
 static int power_init_board(void)
 {
        const char *model = gsc_get_model();
@@ -117,6 +133,43 @@ static int power_init_board(void)
                                 BIT(7) | MP5416_VSET_SW3_SVAL(920000));
        }
 
+       else if (!strncmp(model, "GW7901", 6)) {
+               ret = uclass_get_device_by_name(UCLASS_I2C, "i2c@30a30000", &bus);
+               if (ret) {
+                       printf("PMIC    : failed I2C2 probe: %d\n", ret);
+                       return ret;
+               }
+               ret = dm_i2c_probe(bus, 0x4b, 0, &dev);
+               if (ret) {
+                       printf("PMIC    : failed probe: %d\n", ret);
+                       return ret;
+               }
+               puts("PMIC    : BD71847\n");
+
+               /* unlock the PMIC regs */
+               dm_i2c_reg_write(dev, BD718XX_REGLOCK, 0x1);
+
+               /* set switchers to forced PWM mode */
+               dm_i2c_clrsetbits(dev, BD718XX_BUCK1_CTRL, 0, 0x8);
+               dm_i2c_clrsetbits(dev, BD718XX_BUCK2_CTRL, 0, 0x8);
+               dm_i2c_clrsetbits(dev, BD718XX_1ST_NODVS_BUCK_CTRL, 0, 0x8);
+               dm_i2c_clrsetbits(dev, BD718XX_2ND_NODVS_BUCK_CTRL, 0, 0x8);
+               dm_i2c_clrsetbits(dev, BD718XX_3RD_NODVS_BUCK_CTRL, 0, 0x8);
+               dm_i2c_clrsetbits(dev, BD718XX_4TH_NODVS_BUCK_CTRL, 0, 0x8);
+
+               /* increase VDD_0P95 (VDD_GPU/VPU/DRAM) to 0.975v for 1.5Ghz DDR */
+               dm_i2c_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
+
+               /* increase VDD_SOC to 0.85v before first DRAM access */
+               dm_i2c_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
+
+               /* increase VDD_ARM to 0.92v for 800 and 1600Mhz */
+               dm_i2c_reg_write(dev, BD718XX_BUCK2_VOLT_RUN, 0x16);
+
+               /* Lock the PMIC regs */
+               dm_i2c_reg_write(dev, BD718XX_REGLOCK, 0x11);
+       }
+
        return 0;
 }
 
index daffcc4..3961db0 100644 (file)
@@ -58,7 +58,7 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x imx8mm-venice-gw73xx-0x"
+CONFIG_OF_LIST="imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x imx8mm-venice-gw73xx-0x imx8mm-venice-gw7901"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y