ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5

Since SYSRAM set the L2 cache latency on EXYNOS5 SoCs,
no longer need that in the kernel. It helps to reduce
booting time (no need cache disable and cache enable).

Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --cc arch/arm/mach-exynos/common.c
Simple merge