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MIPS: Alchemy: DB1xxx: Explicitly set 50MHz clock for I2C/SPI units.
authorManuel Lauss <manuel.lauss@gmail.com>
Wed, 20 Aug 2014 19:36:32 +0000 (21:36 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 22 Sep 2014 11:35:47 +0000 (13:35 +0200)
Add an explicit call to set the desired rate to get the correct
clock routing for the PSC clocks.  It wasn't broken before, but
now it's less affected by bootloader changes.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7554/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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