powerpc/85xx: Fix PCIe IDSEL for Px020RDB
authorPrabhakar Kushwaha <prabhakar@freescale.com>
Wed, 20 Apr 2011 04:12:44 +0000 (09:42 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 19 May 2011 06:15:42 +0000 (01:15 -0500)
PCIe device in legacy mode can trigger interrupts using the wires #INTA,
#INTB ,#INTC and #INTD. PCI devices are obligated to use #INTx for
interrupts under legacy mode.  Each PCI slot or device is typically wired
to different inputs on the interrupt controller.

So, Define interrupt-map and interrupt-map-mask properties for device tree
to of map each PCI interrupt signal to the inputs of the interrupt
controller.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/p1020rdb.dts
arch/powerpc/boot/dts/p2020rdb.dts
arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
arch/powerpc/boot/dts/p2020rdb_camp_core1.dts

index 7ed4793..d6a8ae4 100644 (file)
        pci0: pcie@ffe09000 {
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x0 */
+                       0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                       0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                       0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                       0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                       >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
        pci1: pcie@ffe0a000 {
                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x0 */
+                       0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                       0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                       0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                       0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                       >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
index 60a0a8c..3782a58 100644 (file)
        pci1: pcie@ffe09000 {
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x0 */
+                       0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                       0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                       0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                       0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                       >;
                        pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
        pci2: pcie@ffe0a000 {
                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x0 */
+                       0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                       0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                       0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                       0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                       >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
index 72c912f..fc8dddd 100644 (file)
        pci1: pcie@ffe09000 {
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x0 */
+                       0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                       0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                       0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                       0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                       >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
index eb572cc..261c34b 100644 (file)
        pci2: pcie@ffe0a000 {
                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x0 */
+                       0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                       0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                       0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                       0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                       >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;