drm/radeon: fix typo in CP DMA register headers

Wrong bit offset for SRC endian swapping.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

diff --cc drivers/gpu/drm/radeon/evergreend.h
Simple merge

diff --cc drivers/gpu/drm/radeon/r600d.h
Simple merge

diff --cc drivers/gpu/drm/radeon/sid.h
Simple merge