Merge branch 'next-s5pv210' into for-next
authorKukjin Kim <kgene.kim@samsung.com>
Fri, 6 Aug 2010 12:31:35 +0000 (21:31 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Fri, 6 Aug 2010 12:31:35 +0000 (21:31 +0900)
21 files changed:
arch/arm/mach-s5p6440/Kconfig
arch/arm/mach-s5p6440/Makefile
arch/arm/mach-s5p6440/include/mach/map.h
arch/arm/mach-s5p6440/mach-smdk6440.c
arch/arm/mach-s5p6440/setup-i2c0.c
arch/arm/mach-s5p6440/setup-i2c1.c [new file with mode: 0644]
arch/arm/mach-s5p6442/Kconfig
arch/arm/mach-s5p6442/clock.c
arch/arm/mach-s5p6442/include/mach/map.h
arch/arm/mach-s5p6442/mach-smdk6442.c
arch/arm/mach-s5pc100/Kconfig
arch/arm/mach-s5pc100/Makefile
arch/arm/mach-s5pc100/clock.c
arch/arm/mach-s5pc100/cpu.c
arch/arm/mach-s5pc100/include/mach/irqs.h
arch/arm/mach-s5pc100/include/mach/map.h
arch/arm/mach-s5pc100/include/mach/regs-clock.h
arch/arm/mach-s5pc100/mach-smdkc100.c
arch/arm/mach-s5pc100/setup-ide.c [new file with mode: 0644]
arch/arm/mach-s5pc100/setup-keypad.c [new file with mode: 0644]
arch/arm/mach-s5pc100/setup-sdhci.c

index f066fae..153f8c9 100644 (file)
@@ -13,13 +13,22 @@ config CPU_S5P6440
        help
          Enable S5P6440 CPU support
 
+config S5P6440_SETUP_I2C1
+       bool
+       help
+         Common setup code for i2c bus 1.
+
 config MACH_SMDK6440
        bool "SMDK6440"
        select CPU_S5P6440
        select SAMSUNG_DEV_TS
        select SAMSUNG_DEV_ADC
+       select S3C_DEV_RTC
+       select S3C_DEV_I2C1
        select S3C_DEV_WDT
+       select HAVE_S3C_RTC
        select HAVE_S3C2410_WATCHDOG
+       select S5P6440_SETUP_I2C1
        help
          Machine support for the Samsung SMDK6440
 
index be3c53a..c3fe4d3 100644 (file)
@@ -22,3 +22,4 @@ obj-$(CONFIG_MACH_SMDK6440)   += mach-smdk6440.o
 # device support
 obj-y                          += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
+obj-$(CONFIG_S5P6440_SETUP_I2C1)       += setup-i2c1.o
index 44011b9..6cc5cbc 100644 (file)
@@ -38,7 +38,6 @@
 #define S5P_PA_TIMER           S5P6440_PA_TIMER
 
 #define S5P6440_PA_RTC         (0xEA100000)
-#define S5P_PA_RTC             S5P6440_PA_RTC
 
 #define S5P6440_PA_WDT         (0xEA200000)
 #define S5P_PA_WDT             S5P6440_PA_WDT
@@ -53,6 +52,7 @@
 #define S5P_SZ_UART            SZ_256
 
 #define S5P6440_PA_IIC0                (0xEC104000)
+#define S5P6440_PA_IIC1                (0xEC20F000)
 
 #define S5P6440_PA_SPI0                0xEC400000
 #define S5P6440_PA_SPI1                0xEC500000
@@ -77,6 +77,8 @@
 /* compatibiltiy defines. */
 #define S3C_PA_UART            S5P6440_PA_UART
 #define S3C_PA_IIC             S5P6440_PA_IIC0
+#define S3C_PA_RTC             S5P6440_PA_RTC
+#define S3C_PA_IIC1            S5P6440_PA_IIC1
 #define S3C_PA_WDT             S5P6440_PA_WDT
 
 #define SAMSUNG_PA_ADC         S5P6440_PA_ADC
index 8291fec..8c83d8f 100644 (file)
@@ -15,6 +15,7 @@
 #include <linux/timer.h>
 #include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/i2c.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -37,6 +38,7 @@
 #include <mach/regs-clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/iic.h>
 #include <plat/pll.h>
 #include <plat/adc.h>
 #include <plat/ts.h>
@@ -88,10 +90,21 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
 static struct platform_device *smdk6440_devices[] __initdata = {
        &s5p6440_device_iis,
        &s3c_device_adc,
+       &s3c_device_rtc,
+       &s3c_device_i2c0,
+       &s3c_device_i2c1,
        &s3c_device_ts,
        &s3c_device_wdt,
 };
 
+static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
+       { I2C_BOARD_INFO("24c08", 0x50), },
+};
+
+static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
+       /* To be populated */
+};
+
 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
        .delay                  = 10000,
        .presc                  = 49,
@@ -109,6 +122,14 @@ static void __init smdk6440_machine_init(void)
 {
        s3c24xx_ts_set_platdata(&s3c_ts_platform);
 
+       /* I2C */
+       s3c_i2c0_set_platdata(NULL);
+       s3c_i2c1_set_platdata(NULL);
+       i2c_register_board_info(0, smdk6440_i2c_devs0,
+                       ARRAY_SIZE(smdk6440_i2c_devs0));
+       i2c_register_board_info(1, smdk6440_i2c_devs1,
+                       ARRAY_SIZE(smdk6440_i2c_devs1));
+
        platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
 }
 
index 69e8a66..2c99d14 100644 (file)
 
 struct platform_device; /* don't need the contents */
 
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
 #include <plat/iic.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
-       /* Will be populated later */
+       s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2));
+       s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP);
+       s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2));
+       s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s5p6440/setup-i2c1.c b/arch/arm/mach-s5p6440/setup-i2c1.c
new file mode 100644 (file)
index 0000000..9a1537f
--- /dev/null
@@ -0,0 +1,30 @@
+/* linux/arch/arm/mach-s5p6440/setup-i2c1.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com/
+ *
+ * I2C1 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/gpio.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <plat/gpio-cfg.h>
+#include <plat/iic.h>
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+{
+       s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6));
+       s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
+       s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
+       s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
+}
index 0fd41b4..7cd2843 100644 (file)
@@ -19,6 +19,8 @@ config CPU_S5P6442
 config MACH_SMDK6442
        bool "SMDK6442"
        select CPU_S5P6442
+       select S3C_DEV_WDT
+       select HAVE_S3C2410_WATCHDOG
        help
          Machine support for Samsung SMDK6442
 
index 087e57f..dcd20f1 100644 (file)
@@ -360,6 +360,12 @@ static struct clk init_clocks[] = {
                .parent         = &clk_pclkd1,
                .enable         = s5p6442_clk_ip3_ctrl,
                .ctrlbit        = (1<<19),
+       }, {
+               .name           = "watchdog",
+               .id             = -1,
+               .parent         = &clk_pclkd1,
+               .enable         = s5p6442_clk_ip3_ctrl,
+               .ctrlbit        = (1 << 22),
        }, {
                .name           = "timers",
                .id             = -1,
index 32ca424..281d256 100644 (file)
@@ -42,6 +42,8 @@
 
 #define S5P6442_PA_SYSTIMER    (0xEA100000)
 
+#define S5P6442_PA_WATCHDOG    (0xEA200000)
+
 #define S5P6442_PA_UART                (0xEC000000)
 
 #define S5P_PA_UART0           (S5P6442_PA_UART + 0x0)
@@ -65,6 +67,7 @@
 #define S5P6442_PA_PCM1                0xF2500000
 
 /* compatibiltiy defines. */
+#define S3C_PA_WDT             S5P6442_PA_WATCHDOG
 #define S3C_PA_UART            S5P6442_PA_UART
 #define S3C_PA_IIC             S5P6442_PA_IIC0
 
index ebcf997..6e061be 100644 (file)
@@ -66,6 +66,7 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
 
 static struct platform_device *smdk6442_devices[] __initdata = {
        &s5p6442_device_iis0,
+       &s3c_device_wdt,
 };
 
 static void __init smdk6442_map_io(void)
index b2a11df..25ca7c6 100644 (file)
@@ -25,6 +25,16 @@ config S5PC100_SETUP_I2C1
        help
          Common setup code for i2c bus 1.
 
+config S5PC100_SETUP_IDE
+       bool
+       help
+         Common setup code for S5PC100 IDE GPIO configurations
+
+config S5PC100_SETUP_KEYPAD
+       bool
+       help
+         Common setup code for KEYPAD GPIO configurations.
+
 config S5PC100_SETUP_SDHCI
        bool
        select S5PC100_SETUP_SDHCI_GPIO
@@ -39,14 +49,24 @@ config S5PC100_SETUP_SDHCI_GPIO
 config MACH_SMDKC100
        bool "SMDKC100"
        select CPU_S5PC100
+       select SAMSUNG_DEV_ADC
        select S3C_DEV_FB
        select S3C_DEV_I2C1
+       select SAMSUNG_DEV_IDE
        select S3C_DEV_HSMMC
        select S3C_DEV_HSMMC1
        select S3C_DEV_HSMMC2
+       select SAMSUNG_DEV_KEYPAD
+       select S3C_DEV_RTC
+       select SAMSUNG_DEV_TS
+       select S3C_DEV_WDT
+       select HAVE_S3C2410_WATCHDOG
        select S5PC100_SETUP_FB_24BPP
        select S5PC100_SETUP_I2C1
+       select S5PC100_SETUP_IDE
+       select S5PC100_SETUP_KEYPAD
        select S5PC100_SETUP_SDHCI
+       select HAVE_S3C_RTC
        help
          Machine support for the Samsung SMDKC100
 
index 543f3de..a021ed1 100644 (file)
@@ -19,6 +19,8 @@ obj-$(CONFIG_CPU_S5PC100)     += dma.o
 
 obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)   += setup-fb-24bpp.o
 obj-$(CONFIG_S5PC100_SETUP_I2C1)       += setup-i2c1.o
+obj-$(CONFIG_S5PC100_SETUP_IDE)                += setup-ide.o
+obj-$(CONFIG_S5PC100_SETUP_KEYPAD)     += setup-keypad.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI)      += setup-sdhci.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
 
index e3fed4c..084abd1 100644 (file)
@@ -737,7 +737,7 @@ static struct clk init_clocks_disable[] = {
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 7),
        }, {
-               .name           = "keyif",
+               .name           = "keypad",
                .id             = -1,
                .parent         = &clk_div_d1_bus.clk,
                .enable         = s5pc100_d1_5_ctrl,
@@ -1078,7 +1078,7 @@ static struct clksrc_clk clksrcs[] = {
                .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
        }, {
                .clk    = {
-                       .name           = "mmc_bus",
+                       .name           = "sclk_mmc",
                        .id             = 0,
                        .ctrlbit        = (1 << 12),
                        .enable         = s5pc100_sclk1_ctrl,
@@ -1089,7 +1089,7 @@ static struct clksrc_clk clksrcs[] = {
                .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
        }, {
                .clk    = {
-                       .name           = "mmc_bus",
+                       .name           = "sclk_mmc",
                        .id             = 1,
                        .ctrlbit        = (1 << 13),
                        .enable         = s5pc100_sclk1_ctrl,
@@ -1100,7 +1100,7 @@ static struct clksrc_clk clksrcs[] = {
                .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
        }, {
                .clk    = {
-                       .name           = "mmc_bus",
+                       .name           = "sclk_mmc",
                        .id             = 2,
                        .ctrlbit        = (1 << 14),
                        .enable         = s5pc100_sclk1_ctrl,
index 7b5bdbc..799d22f 100644 (file)
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
+#include <plat/ata-core.h>
 #include <plat/iic-core.h>
 #include <plat/sdhci.h>
+#include <plat/adc-core.h>
 #include <plat/onenand-core.h>
 
 #include <plat/s5pc100.h>
@@ -87,11 +89,14 @@ void __init s5pc100_map_io(void)
        s5pc100_default_sdhci1();
        s5pc100_default_sdhci2();
 
+       s3c_adc_setname("s3c64xx-adc");
+
        /* the i2c devices are directly compatible with s3c2440 */
        s3c_i2c0_setname("s3c2440-i2c");
        s3c_i2c1_setname("s3c2440-i2c");
 
        s3c_onenand_setname("s5pc100-onenand");
+       s3c_cfcon_setname("s5pc100-pata");
 }
 
 void __init s5pc100_init_clocks(int xtal)
index 28aa551..bfcc0b9 100644 (file)
@@ -38,7 +38,7 @@
 #define IRQ_IEMIEC             S5P_IRQ_VIC1(6)
 #define IRQ_ONENAND            S5P_IRQ_VIC1(7)
 #define IRQ_NFC                        S5P_IRQ_VIC1(8)
-#define IRQ_CFC                        S5P_IRQ_VIC1(9)
+#define IRQ_CFCON              S5P_IRQ_VIC1(9)
 #define IRQ_UART0              S5P_IRQ_VIC1(10)
 #define IRQ_UART1              S5P_IRQ_VIC1(11)
 #define IRQ_UART2              S5P_IRQ_VIC1(12)
index cadae43..c018697 100644 (file)
@@ -61,6 +61,8 @@
 
 #define S5PC100_PA_ONENAND     (0xE7100000)
 
+#define S5PC100_PA_CFCON       (0xE7800000)
+
 /* DMA */
 #define S5PC100_PA_MDMA                (0xE8100000)
 #define S5PC100_PA_PDMA0       (0xE9000000)
@@ -72,6 +74,9 @@
 
 #define S5PC100_PA_SYSTIMER    (0xEA100000)
 
+#define S5PC100_PA_WATCHDOG    (0xEA200000)
+#define S5PC100_PA_RTC         (0xEA300000)
+
 #define S5PC100_PA_UART                (0xEC000000)
 
 #define S5P_PA_UART0           (S5PC100_PA_UART + 0x0)
 #define S5PC100_PA_PCM0                0xF2400000
 #define S5PC100_PA_PCM1                0xF2500000
 
+#define S5PC100_PA_TSADC       (0xF3000000)
+
 /* KEYPAD */
 #define S5PC100_PA_KEYPAD      (0xF3100000)
 
 #define S3C_PA_HSMMC1          S5PC100_PA_HSMMC(1)
 #define S3C_PA_HSMMC2          S5PC100_PA_HSMMC(2)
 #define S3C_PA_KEYPAD          S5PC100_PA_KEYPAD
+#define S3C_PA_WDT             S5PC100_PA_WATCHDOG
 #define S3C_PA_TSADC           S5PC100_PA_TSADC
 #define S3C_PA_ONENAND         S5PC100_PA_ONENAND
 #define S3C_PA_ONENAND_BUF     S5PC100_PA_ONENAND_BUF
 #define S3C_SZ_ONENAND_BUF     S5PC100_SZ_ONENAND_BUF
+#define S3C_PA_RTC             S5PC100_PA_RTC
+
+#define SAMSUNG_PA_ADC         S5PC100_PA_TSADC
+#define SAMSUNG_PA_CFCON       S5PC100_PA_CFCON
+#define SAMSUNG_PA_KEYPAD      S5PC100_PA_KEYPAD
 
 #endif /* __ASM_ARCH_C100_MAP_H */
index 5d27d28..bc92da2 100644 (file)
 #define S5P_CLKDIV1_PCLKD1_SHIFT       (16)
 
 #define S5PC100_SWRESET                S5PC100_REG_OTHERS(0x000)
+#define S5PC100_MEM_SYS_CFG    S5PC100_REG_OTHERS(0x200)
 
 #define S5PC100_SWRESET_RESETVAL       0xc100
 
+#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON  0x30
+
 #endif /* __ASM_ARCH_REGS_CLOCK_H */
index af22f82..83a5d64 100644 (file)
@@ -22,6 +22,7 @@
 #include <linux/i2c.h>
 #include <linux/fb.h>
 #include <linux/delay.h>
+#include <linux/input.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <plat/s5pc100.h>
 #include <plat/fb.h>
 #include <plat/iic.h>
+#include <plat/ata.h>
+#include <plat/adc.h>
+#include <plat/keypad.h>
+#include <plat/ts.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
@@ -149,16 +154,51 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = {
        .setup_gpio     = s5pc100_fb_gpio_setup_24bpp,
 };
 
+static struct s3c_ide_platdata smdkc100_ide_pdata __initdata = {
+       .setup_gpio     = s5pc100_ide_setup_gpio,
+};
+
+static uint32_t smdkc100_keymap[] __initdata = {
+       /* KEY(row, col, keycode) */
+       KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
+       KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
+       KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
+       KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
+};
+
+static struct matrix_keymap_data smdkc100_keymap_data __initdata = {
+       .keymap         = smdkc100_keymap,
+       .keymap_size    = ARRAY_SIZE(smdkc100_keymap),
+};
+
+static struct samsung_keypad_platdata smdkc100_keypad_data __initdata = {
+       .keymap_data    = &smdkc100_keymap_data,
+       .rows           = 2,
+       .cols           = 8,
+};
+
 static struct platform_device *smdkc100_devices[] __initdata = {
+       &s3c_device_adc,
+       &s3c_device_cfcon,
        &s3c_device_i2c0,
        &s3c_device_i2c1,
        &s3c_device_fb,
        &s3c_device_hsmmc0,
        &s3c_device_hsmmc1,
        &s3c_device_hsmmc2,
+       &s3c_device_ts,
+       &s3c_device_wdt,
        &smdkc100_lcd_powerdev,
        &s5pc100_device_iis0,
+       &samsung_device_keypad,
        &s5pc100_device_ac97,
+       &s3c_device_rtc,
+};
+
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+       .delay                  = 10000,
+       .presc                  = 49,
+       .oversampling_shift     = 2,
 };
 
 static void __init smdkc100_map_io(void)
@@ -170,6 +210,8 @@ static void __init smdkc100_map_io(void)
 
 static void __init smdkc100_machine_init(void)
 {
+       s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
        /* I2C */
        s3c_i2c0_set_platdata(NULL);
        s3c_i2c1_set_platdata(NULL);
@@ -177,6 +219,9 @@ static void __init smdkc100_machine_init(void)
        i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 
        s3c_fb_set_platdata(&smdkc100_lcd_pdata);
+       s3c_ide_set_platdata(&smdkc100_ide_pdata);
+
+       samsung_keypad_set_platdata(&smdkc100_keypad_data);
 
        /* LCD init */
        gpio_request(S5PC100_GPD(0), "GPD");
diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c
new file mode 100644 (file)
index 0000000..8357567
--- /dev/null
@@ -0,0 +1,70 @@
+/* linux/arch/arm/mach-s5pc100/setup-ide.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * S5PC100 setup information for IDE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <mach/regs-clock.h>
+#include <plat/gpio-cfg.h>
+
+void s5pc100_ide_setup_gpio(void)
+{
+       u32 reg;
+       u32 gpio = 0;
+
+       /* Independent CF interface, CF chip select configuration */
+       reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f);
+       writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG);
+
+       /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
+       for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+               s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+       }
+
+       /*CF_Data[0 - 7] */
+       for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+               s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+       }
+
+       /* CF_Data[8 - 15] */
+       for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+               s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+       }
+
+       /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
+       for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+               s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
+       }
+
+       /* EBI_OE, EBI_WE */
+       for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++)
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
+
+       /* CF_OE, CF_WE */
+       for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+       }
+
+       /* CF_CD */
+       s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2));
+       s3c_gpio_setpull(S5PC100_GPK3(5), S3C_GPIO_PULL_NONE);
+}
diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c
new file mode 100644 (file)
index 0000000..d0837a7
--- /dev/null
@@ -0,0 +1,34 @@
+/* linux/arch/arm/mach-s5pc100/setup-keypad.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com/
+ *
+ * GPIO configuration for S5PC100 KeyPad device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/gpio.h>
+#include <plat/gpio-cfg.h>
+
+void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
+{
+       unsigned int gpio;
+       unsigned int end;
+
+       /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
+       end = S5PC100_GPH3(rows);
+       for (gpio = S5PC100_GPH3(0); gpio < end; gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+       }
+
+       /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
+       end = S5PC100_GPH2(cols);
+       for (gpio = S5PC100_GPH2(0); gpio < end; gpio++) {
+               s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
+               s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+       }
+}
index ea7ff19..f16946e 100644 (file)
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
 char *s5pc100_hsmmc_clksrcs[4] = {
-       [0] = "hsmmc",
-       [1] = "hsmmc",
-       /* [2] = "mmc_bus", not yet successfully used yet */
-       /* [3] = "48m", - note not successfully used yet */
+       [0] = "hsmmc",          /* HCLK */
+       /* [1] = "hsmmc",       - duplicate HCLK entry */
+       [2] = "sclk_mmc",       /* mmc_bus */
+       /* [3] = "48m",         - note not successfully used yet */
 };