/*
* Calculate the next alarm time given the requested alarm time mask
* and the current time.
- *
- * FIXME: for now, we just copy the alarm time because we're lazy (and
- * is therefore buggy - setting a 10am alarm at 8pm will not result in
- * the alarm triggering.)
*/
void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm)
{
+ unsigned long next_time;
+ unsigned long now_time;
+
next->tm_year = now->tm_year;
next->tm_mon = now->tm_mon;
next->tm_mday = now->tm_mday;
next->tm_hour = alrm->tm_hour;
next->tm_min = alrm->tm_min;
next->tm_sec = alrm->tm_sec;
+
+ rtc_tm_to_time(now, &now_time);
+ rtc_tm_to_time(next, &next_time);
+
+ if (next_time < now_time) {
+ /* Advance one day */
+ next_time += 60 * 60 * 24;
+ rtc_time_to_tm(next_time, next);
+ }
}
static inline int rtc_read_time(struct rtc_ops *ops, struct rtc_time *tm)
ldr r6, [r2, #TI_CPU_DOMAIN]!
#endif
#if __LINUX_ARM_ARCH__ >= 6
-#ifdef CONFIG_CPU_MPCORE
+#ifdef CONFIG_CPU_32v6K
clrex
#else
strex r5, r4, [ip] @ Clear exclusive monitor
#include <linux/personality.h>
#include <linux/ptrace.h>
#include <linux/kallsyms.h>
+#include <linux/delay.h>
#include <linux/init.h>
#include <asm/atomic.h>
__die(str, err, thread, regs);
bust_spinlocks(0);
spin_unlock_irq(&die_lock);
+
+ if (panic_on_oops) {
+ printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
+ ssleep(5);
+ panic("Fatal exception");
+ }
+
do_exit(SIGSEGV);
}
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
- if (data->pullup_pin)
+ if (data->pullup_pin) {
at91_set_gpio_output(data->pullup_pin, 0);
+ at91_set_multi_drive(data->pullup_pin, 1);
+ }
udc_data = *data;
platform_device_register(&at91rm9200_udc_device);
}
EXPORT_SYMBOL(at91_set_deglitch);
+/*
+ * enable/disable the multi-driver; This is only valid for output and
+ * allows the output pin to run as an open collector output.
+ */
+int __init_or_module at91_set_multi_drive(unsigned pin, int is_on)
+{
+ void __iomem *pio = pin_to_controller(pin);
+ unsigned mask = pin_to_mask(pin);
+
+ if (!pio)
+ return -EINVAL;
+
+ __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
+ return 0;
+}
+EXPORT_SYMBOL(at91_set_multi_drive);
+
/*--------------------------------------------------------------------------*/
if (line < 0)
return -EINVAL;
- if (type & IRQT_BOTHEDGE) {
+ switch (type){
+ case IRQT_BOTHEDGE:
int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
irq_type = IXP4XX_IRQ_EDGE;
- } else if (type & IRQT_RISING) {
+ break;
+ case IRQT_RISING:
int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
irq_type = IXP4XX_IRQ_EDGE;
- } else if (type & IRQT_FALLING) {
+ break;
+ case IRQT_FALLING:
int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
irq_type = IXP4XX_IRQ_EDGE;
- } else if (type & IRQT_HIGH) {
+ break;
+ case IRQT_HIGH:
int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
irq_type = IXP4XX_IRQ_LEVEL;
- } else if (type & IRQT_LOW) {
+ break;
+ case IRQT_LOW:
int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
irq_type = IXP4XX_IRQ_LEVEL;
- } else
+ break;
+ default:
return -EINVAL;
-
+ }
ixp4xx_config_irq(irq, irq_type);
if (line >= 8) { /* pins 8-15 */
static void __exit nslu2_power_exit(void)
{
+ if (!(machine_is_nslu2()))
+ return;
+
free_irq(NSLU2_RB_IRQ, NULL);
free_irq(NSLU2_PB_IRQ, NULL);
}
.num_resources = 0,
};
+static struct platform_device nslu2_beeper = {
+ .name = "ixp4xx-beeper",
+ .id = NSLU2_GPIO_BUZZ,
+ .num_resources = 0,
+};
+
static struct resource nslu2_uart_resources[] = {
{
.start = IXP4XX_UART1_BASE_PHYS,
&nslu2_i2c_controller,
&nslu2_flash,
&nslu2_uart,
+ &nslu2_beeper,
};
static void nslu2_power_off(void)
int i;
int myslot = -1;
unsigned long val;
+ void __iomem *local_pci_cfg_base;
+
+ val = __raw_readl(SYS_PCICTL);
+ if (!(val & 1)) {
+ printk("Not plugged into PCI backplane!\n");
+ ret = -EIO;
+ goto out;
+ }
if (nr == 0) {
sys->mem_offset = 0;
goto out;
}
- __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28,PCI_IMAP0);
- __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28,PCI_IMAP1);
- __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28,PCI_IMAP2);
-
- __raw_writel(1, SYS_PCICTL);
-
- val = __raw_readl(SYS_PCICTL);
- if (!(val & 1)) {
- printk("Not plugged into PCI backplane!\n");
- ret = -EIO;
- goto out;
- }
-
/*
* We need to discover the PCI core first to configure itself
* before the main PCI probing is performed
*/
- for (i=0; i<32; i++) {
+ for (i=0; i<32; i++)
if ((__raw_readl(VERSATILE_PCI_VIRT_BASE+(i<<11)+DEVICE_ID_OFFSET) == VP_PCI_DEVICE_ID) &&
(__raw_readl(VERSATILE_PCI_VIRT_BASE+(i<<11)+CLASS_ID_OFFSET) == VP_PCI_CLASS_ID)) {
myslot = i;
-
- __raw_writel(myslot, PCI_SELFID);
- val = __raw_readl(VERSATILE_PCI_CFG_VIRT_BASE+(myslot<<11)+CSR_OFFSET);
- val |= (1<<2);
- __raw_writel(val, VERSATILE_PCI_CFG_VIRT_BASE+(myslot<<11)+CSR_OFFSET);
break;
}
- }
if (myslot == -1) {
printk("Cannot find PCI core!\n");
ret = -EIO;
- } else {
- printk("PCI core found (slot %d)\n",myslot);
- /* Do not to map Versatile FPGA PCI device
- into memory space as we are short of
- mappable memory */
- pci_slot_ignore |= (1 << myslot);
- ret = 1;
+ goto out;
}
+ printk("PCI core found (slot %d)\n",myslot);
+
+ __raw_writel(myslot, PCI_SELFID);
+ local_pci_cfg_base = (void *) VERSATILE_PCI_CFG_VIRT_BASE + (myslot << 11);
+
+ val = __raw_readl(local_pci_cfg_base + CSR_OFFSET);
+ val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
+ __raw_writel(val, local_pci_cfg_base + CSR_OFFSET);
+
+ /*
+ * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
+ */
+ __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
+ __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
+ __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
+
+ /*
+ * Do not to map Versatile FPGA PCI device into memory space
+ */
+ pci_slot_ignore |= (1 << myslot);
+ ret = 1;
+
out:
return ret;
}
return pci_scan_bus(sys->busnr, &pci_versatile_ops, sys);
}
-/*
- * V3_LB_BASE? - local bus address
- * V3_LB_MAP? - pci bus address
- */
void __init pci_versatile_preinit(void)
{
-}
+ __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0);
+ __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28, PCI_IMAP1);
+ __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28, PCI_IMAP2);
-void __init pci_versatile_postinit(void)
-{
-}
+ __raw_writel(PHYS_OFFSET >> 28, PCI_SMAP0);
+ __raw_writel(PHYS_OFFSET >> 28, PCI_SMAP1);
+ __raw_writel(PHYS_OFFSET >> 28, PCI_SMAP2);
+ __raw_writel(1, SYS_PCICTL);
+}
/*
* map the specified device/slot/pin to an IRQ. Different backplanes may need to modify this.
int irq;
int devslot = PCI_SLOT(dev->devfn);
- /* slot, pin, irq
- 24 1 27
- 25 1 28 untested
- 26 1 29
- 27 1 30 untested
- */
-
- irq = 27 + ((slot + pin + 2) % 3); /* Fudged */
+ /* slot, pin, irq
+ * 24 1 27
+ * 25 1 28
+ * 26 1 29
+ * 27 1 30
+ */
+ irq = 27 + ((slot + pin - 1) & 3);
- printk("map irq: slot %d, pin %d, devslot %d, irq: %d\n",slot,pin,devslot,irq);
+ printk("PCI map irq: slot %d, pin %d, devslot %d, irq: %d\n",slot,pin,devslot,irq);
return irq;
}
.setup = pci_versatile_setup,
.scan = pci_versatile_scan_bus,
.preinit = pci_versatile_preinit,
- .postinit = pci_versatile_postinit,
};
static int __init versatile_pci_init(void)
*/
.align 5
ENTRY(v6_early_abort)
-#ifdef CONFIG_CPU_MPCORE
+#ifdef CONFIG_CPU_32v6K
clrex
#else
strex r0, r1, [sp] @ Clear the exclusive monitor
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
-# Last update: Mon Jan 9 12:56:42 2006
+# Last update: Mon Feb 20 10:18:02 2006
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
eb42x MACH_EB42X EB42X 891
iq331es MACH_IQ331ES IQ331ES 892
cosydsp MACH_COSYDSP COSYDSP 893
-uplat7d MACH_UPLAT7D UPLAT7D 894
+uplat7d_proto MACH_UPLAT7D UPLAT7D 894
ptdavinci MACH_PTDAVINCI PTDAVINCI 895
mbus MACH_MBUS MBUS 896
nadia2vb MACH_NADIA2VB NADIA2VB 897
ak3220m MACH_AK3320M AK3320M 925
duramax MACH_DURAMAX DURAMAX 926
n35 MACH_N35 N35 927
+pronghorn MACH_PRONGHORN PRONGHORN 928
+fundy MACH_FUNDY FUNDY 929
+logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930
+cpu777 MACH_CPU777 CPU777 931
+simicon9201 MACH_SIMICON9201 SIMICON9201 932
+leap2_hpm MACH_LEAP2_HPM LEAP2_HPM 933
+cm922txa10 MACH_CM922TXA10 CM922TXA10 934
+sandgate MACH_PXA PXA 935
+sandgate2 MACH_SANDGATE2 SANDGATE2 936
+sandgate2g MACH_SANDGATE2G SANDGATE2G 937
+sandgate2p MACH_SANDGATE2P SANDGATE2P 938
+fred_jack MACH_FRED_JACK FRED_JACK 939
+ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940
+nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941
+netdcu8 MACH_NETDCU8 NETDCU8 942
+ml675050_cpu_boa MACH_ML675050_CPU_BOA ML675050_CPU_BOA 943
+ng_fvx538 MACH_NG_FVX538 NG_FVX538 944
+ng_fvs338 MACH_NG_FVS338 NG_FVS338 945
+pnx4103 MACH_PNX4103 PNX4103 946
+hesdb MACH_HESDB HESDB 947
+xsilo MACH_XSILO XSILO 948
+espresso MACH_ESPRESSO ESPRESSO 949
+emlc MACH_EMLC EMLC 950
+sisteron MACH_SISTERON SISTERON 951
+rx1950 MACH_RX1950 RX1950 952
+tsc_venus MACH_TSC_VENUS TSC_VENUS 953
+ds101j MACH_DS101J DS101J 954
+mxc300_30ads MACH_MXC30030ADS MXC30030ADS 955
+fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956
+dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957
+gesbc9312 MACH_GESBC9312 GESBC9312 958
cifs_small_buf_release(iov[0].iov_base);
else if(resp_buf_type == CIFS_LARGE_BUFFER)
cifs_buf_release(iov[0].iov_base);
- } else /* return buffer to caller to free */ /* BB FIXME how do we tell caller if it is not a large buffer */ {
- *buf = iov[0].iov_base;
+ } else if(resp_buf_type != CIFS_NO_BUFFER) {
+ /* return buffer to caller to free */
+ *buf = iov[0].iov_base;
if(resp_buf_type == CIFS_SMALL_BUFFER)
*pbuf_type = CIFS_SMALL_BUFFER;
else if(resp_buf_type == CIFS_LARGE_BUFFER)
*pbuf_type = CIFS_LARGE_BUFFER;
- }
+ } /* else no valid buffer on return - leave as null */
/* Note: On -EAGAIN error only caller can retry on handle based calls
since file handle passed in no longer valid */
conjunction with 52K kvec constraint on arch with 4K
page size */
- if(cifs_sb->rsize < PAGE_CACHE_SIZE) {
- cifs_sb->rsize = PAGE_CACHE_SIZE;
- /* Windows ME does this */
- cFYI(1,("Attempt to set readsize for mount to less than one page (4096)"));
+ if(cifs_sb->rsize < 2048) {
+ cifs_sb->rsize = 2048;
+ /* Windows ME may prefer this */
+ cFYI(1,("readsize set to minimum 2048"));
}
cifs_sb->mnt_uid = volume_info.linux_uid;
cifs_sb->mnt_gid = volume_info.linux_gid;
extern int at91_set_gpio_input(unsigned pin, int use_pullup);
extern int at91_set_gpio_output(unsigned pin, int value);
extern int at91_set_deglitch(unsigned pin, int is_on);
+extern int at91_set_multi_drive(unsigned pin, int is_on);
/* callable at any time */
extern int at91_set_gpio_value(unsigned pin, int value);
#error "Do not include this directly, instead #include <asm/hardware.h>"
#endif
-#define NAS100D_SDA_PIN 6
-#define NAS100D_SCL_PIN 5
+#define NAS100D_SDA_PIN 5
+#define NAS100D_SCL_PIN 6
/*
* NAS100D PCI IRQs
/*
* These are the command types.
*/
-#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_TYPE)
+#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK)
unsigned int retries; /* max number of retries */
unsigned int error; /* command error */
git.openpandora.org / pandora-kernel.git / commitdiff