clk: qcom: Add support for phase locked loops (PLLs)

Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

diff --cc drivers/clk/qcom/Makefile
Simple merge

diff --cc drivers/clk/qcom/clk-pll.c
Simple merge

diff --cc drivers/clk/qcom/clk-pll.h
Simple merge