clk/exynos5420: add gate clock for mixer sysmmu
authorRahul Sharma <rahul.sharma@samsung.com>
Thu, 29 Aug 2013 05:37:06 +0000 (11:07 +0530)
committerMike Turquette <mturquette@linaro.org>
Fri, 30 Aug 2013 00:47:45 +0000 (17:47 -0700)
Adding sysmmu clock for mixer for exynos5420.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Documentation/devicetree/bindings/clock/exynos5420-clock.txt
drivers/clk/samsung/clk-exynos5420.c

index 596a368..5758a69 100644 (file)
@@ -180,6 +180,7 @@ clock which they consume.
   fimc_lite3           495
   aclk_g3d             500
   g3d                  501
+  smmu_mixer           502
 
 Example 1: An example of a clock controller node is listed below.
 
Simple merge